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Operating Range 5.5-V Contain Flip-Flops With Single-Rail Outputs Appl


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SN54AHC174, SN74AHC174 D-TYPE FLIP-FLOPS WITH CLEAR
Operating Range 5.5-V Contain Flip-Flops With Single-Rail Outputs Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators Latch-Up Performance Exceeds JESD Protection Exceeds JESD 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
SN54AHC174 PACKAGE SN74AHC174 DGV, PACKAGE (TOP VIEW)
SN54AHC174 PACKAGE (TOP VIEW)
'AHC174 devices positive-edge-triggered D-type flip-flops with direct clear (CLR) input designed 5.5-V operation. Information data inputs that meets setup time requirements transferred outputs positive-going edge clock (CLK) pulse. Clock triggering occurs particular voltage level directly related transition time positive-going edge CLK. When either high level, input effect output. ORDERING INFORMATION
PDIP SOIC -40°C 85°C SSOP TSSOP TVSOP CDIP -55°C 125°C LCCC PACKAGE Tube Tube Tape reel Tube Tape reel Tape reel Tape reel Tube Tube Tube
internal connection ORDERABLE PART NUMBER SN74AHC174N SN74AHC174D SN74AHC174DR SN74AHC174NSR SN74AHC174DBR SN74AHC174PWR SN74AHC174DGVR SNJ54AHC174J SNJ54AHC174W SNJ54AHC174FK AHC174 HA174 HA174 HA174 SNJ54AHC174J SNJ54AHC174W SNJ54AHC174FK
Copyright 2002, Texas Instruments Incorporated
description
Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package.
Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. POST OFFICE 655303
DALLAS, TEXAS 75265
TOP-SIDE MARKING SN74AHC174N AHC174
SN54AHC174, SN74AHC174 D-TYPE FLIP-FLOPS WITH CLEAR
FUNCTION TABLE (each flip-flop) INPUTS OUTPUT
logic diagram (positive logic)
Five Other Channels numbers shown DGV, packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, Input voltage range, (see Note Output voltage range, (see Note Input clamp current, Output clamp current, VCC) Continuous output current, VCC) Continuous current through Package thermal impedance, (see Note package 73°C/W package 82°C/W package 120°C/W package 67°C/W package 64°C/W package 108°C/W Storage temperature range, Tstg -65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD 51-7.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AHC174, SN74AHC174 D-TYPE FLIP-FLOPS WITH CLEAR
recommended operating conditions (see Note
SN54AHC174 Supply voltage High-level input voltage Low-level input voltage Input voltage Output voltage High-level output current Low-level output current 3.85 1.65 SN74AHC174 3.85 1.65 UNIT
Input transition rise fall rate
Operating free-air temperature NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS GND, 2.58 3.94 0.36 0.36 25°C SN54AHC174 2.48 SN74AHC174 2.48 0.44 0.44 UNIT
products compliant MIL-PRF-38535, this parameter production tested
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AHC174, SN74AHC174 D-TYPE FLIP-FLOPS WITH CLEAR
timing requirements over recommended operating free-air temperature range, (unless otherwise noted)
25°C Pulse duration Setup time before Hold time, data after high Data inactive SN54AHC174 SN74AHC174 UNIT
timing requirements over recommended operating free-air temperature range, (unless otherwise noted)
25°C Pulse duration Setup time before Hold time, data after high Data inactive SN54AHC174 SN74AHC174 UNIT
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER fmax tPHL tPLH tPHL tPHL tPLH tPHL FROM (INPUT) (OUTPUT) LOAD CAPACITANCE 25°C 170* 4.5* 5.8* 5.8* 11.4* 14.9 14.5 14.5 1.5** SN54AHC174 13.5* 16.5 16.5 SN74AHC174 13.5 16.5 16.5 UNIT
tsk(o) products compliant MIL-PRF-38535, this parameter production tested. products compliant MIL-PRF-38535, this parameter does apply.
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AHC174, SN74AHC174 D-TYPE FLIP-FLOPS WITH CLEAR
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER fmax tPHL tPLH tPHL tPHL tPLH tPHL FROM (INPUT) (OUTPUT) LOAD CAPACITANCE 130* 25°C 240* 4.1* 4.1* 7.6* 7.2* 7.2* SN54AHC174 110* 8.5* 8.5* 10.5 10.5 SN74AHC174 10.5 10.5 UNIT
tsk(o) products compliant MIL-PRF-38535, this parameter production tested. products compliant MIL-PRF-38535, this parameter does apply.
operating characteristics, 25°C
PARAMETER Power dissipation capacitance TEST CONDITIONS load, 15.2 UNIT
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AHC174, SN74AHC174 D-TYPE FLIP-FLOPS WITH CLEAR
PARAMETER MEASUREMENT INFORMATION
Open
From Output Under Test (see Note
Test Point
From Output Under Test (see Note
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain
Open
LOAD CIRCUIT TOTEM-POLE OUTPUTS
LOAD CIRCUIT 3-STATE OPEN-DRAIN OUTPUTS Timing Input Data Input VOLTAGE WAVEFORMS SETUP HOLD TIMES tPZL tPZH Output Waveform (see Note tPLZ tPHZ
Input
VOLTAGE WAVEFORMS PULSE DURATION
Input tPLH In-Phase Output tPHL Out-of-Phase Output
tPHL
Output Control
tPLH
Output Waveform (see Note
VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS ENABLE DISABLE TIMES LOW- HIGH-LEVEL ENABLING
NOTES: includes probe capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. input pulses supplied generators having following characteristics: MHz, outputs measured time with input transition measurement.
Figure Load Circuit Voltage Waveforms
POST OFFICE 655303
DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. Customers should obtain latest relevant information before placing orders should verify that such information current complete. products sold subject TI's terms conditions sale supplied time order acknowledgment. warrants performance hardware products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques used extent deems necessary support this warranty. Except where mandated government requirements, testing parameters each product necessarily performed. assumes liability applications assistance customer product design. Customers responsible their products applications using components. minimize risks associated with customer products applications, customers should provide adequate design operating safeguards. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right relating combination, machine, process which products services used. Information published regarding third-party products services does constitute license from such products services warranty endorsement thereof. such information require license from third party under patents other intellectual property third party, license from under patents other intellectual property Reproduction information data books data sheets permissible only reproduction without alteration accompanied associated warranties, conditions, limitations, notices. Reproduction this information with alteration unfair deceptive business practice. responsible liable such altered documentation. Resale products services with statements different from beyond parameters stated that product service voids express implied warranties associated product service unfair deceptive business practice. responsible liable such statements.
Mailing Address: Texas Instruments Post Office 655303 Dallas, Texas 75265
Copyright 2002, Texas Instruments Incorporated

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