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HE80000 SERIES HE80128S Introduction HE80128S member Jess Te
Top Searches for this datasheetHE80128S HE80000 SERIES HE80128S Introduction HE80128S member Jess Tech HE8000 series 8-bit CMOS micro-controller. This chip Power Speech Controller. built-in internal Op-Amp, 7-bit converter output module provide speech output interface. built-in 384K store around seconds speech data (8KHz sampling rate ADPCM). external SRAM Flash recording function. HE80128S provides very simple effective instruction set, each instruction byte occupies only clock cycle time, therefore, suitable apply high performance systems. HE80128S Features Operating Voltage: Operation frequency Range: size: size: Dual Clock: 2.4V 5.2V 8MHz 5.0V 4MHz 2.4V 384K Bytes Bytes Normal(Fast) clock: 32.768K 8MHz Slow clock: 32.768KHz Operating Mode: DUAL FASTSLOWIDLESLEEP Built-in WATCH TIMER bi-directional pins, PUSH-PULL OPEN DRAIN output selected mask option Built-in internal Op-Amp Built-in Converter Built-in output circuit Provides internal external interrupt Provides 16-bit timer time base) Instruction Instructions,4 types Addressing Mode, individual Pointer (24-bit) (8-bit) table access. Multi-channel voice function. C.HE80128S Application Power Speech Controller provides around seconds speech time Interface Light, Sound, Temperature Humidity sensor controlling application. external SRAM Flash recording function. 2002 V2.4 HE80128S HE80000 SERIES Assignment Name Function Description External Fast Clock pin. Mask Option settings Connecting crystal MO_FCK/SCKN=00Slow Clock only generate 32.768KHz 01Illegal 8MHz frequency. 10Dual Clock 11Fast Clock only MO_FOSCE=0Internal fast oscillation 1External fast oscillation External Slow Clock pin. MO_FXTAL=0RC osc. Fast Clock Connecting with 32768Hz 1X'tal osc. Fast Clock crystal resistor slow MO_SXTAL=0RC 32768Hz Clock clock providing clock 1X'tal 32768Hz Clock source display, switch among different operation TIMER1, Time-Base mode (NORMAL, SLOW, IDEL SLEEP). Dual other internal blocks. Clock mode, main system clock still Fast Clock. 32768Hz clock Timer only. Level trigger, active low. Except using this pin, using mask option (MO_PORE=1) could enable build-in power-on reset circuit. System reset signal Besides, MO_WDTE Watch Timer MO_WDTE =0Disable Watch Timer =1Enable Watch Timer Test Pin. Please bond this test point debugging. Leave this floating 8-pin bi-directional Mask Option port. PRTD[7.2] wake- MO_DPP[7:0] Push-pull pin. PRTD[7.6] Open-drain. external interrupt pin. Output must before reading whenever them input tri-state structure). positive output bit-2 register (PWM turn drive speaker buzzer directly. negative output bit-2 register (PWM turn drive speaker buzzer PWM. directly. voice output bit-1 register turn output, bit-0 register (DAO turn DAO. Negative input comparator Positive input Individual internal Op-Amp. comparator Output comparator Adding 0.1mF capacitor by-pass capacitor between Positive Power Input necessary Power Ground Input FXI, SXI, RSTP_N TSTP_P PRTD[7:0] PWMP PWMN OPIN OPIP 2002 V2.4 HE80128S HE80000 SERIES Diagram 2002 V2.4 HE80128S HE80000 SERIES Bonding Location Number Name OPIN OPIP RSTP_N TSTP_P PRTD[7] Coordinate -544.55 -681.50 -818.45 -955.40 -1092.35 -1229.30 -1366.25 1375.50 1375.50 1375.50 1375.50 1375.50 1375.50 1375.50 1375.50 1375.50 1375.50 1375.50 1375.50 Coordinate Number 1562.60 1562.60 1562.60 1562.60 1562.60 1562.60 1562.60 -1540.20 -1388.40 -1252.30 -1115.35 -978.40 -841.45 -704.50 -567.55 -421.60 -293.65 -156.70 -19.75 117.20 Name PRTD[6] PRTD[5] PRTD[4] PRTD[3] PRTD[2] PRTD[1] PRTD[0] PWMP PWMN Coordinate 1375.50 1375.50 1375.50 1375.50 1375.50 1375.50 1298.20 1161.25 1014.70 877.75 740.80 603.85 466.90 329.95 193.00 43.25 -120.10 -270.65 -407.60 Coordinate 254.15 391.10 528.05 665.00 801.95 938.90 1562.60 1562.60 1562.60 1562.60 1562.60 1562.60 1562.60 1562.60 1562.60 1562.60 1562.60 1562.60 1562.60 1375.50 2002 V2.4 HE80128S HE80000 SERIES Electrical Characteristics Absolute Maximum Rating Item Supply Voltage Input Voltage Output Voltage Operating Temperature Storage Temperature Sym. Rating -0.5V -0.5V Vdd+0.5V -0.5V Vdd+0.5V 700C -500C 1000C Condition Recommended Operating Conditions Item Supply Voltage Input Voltage Operating Frequency Operating Temperature Storage Temperature Rating 2.4V 5.2V 0.0V 0.1Vdd 8MHz Fmax 4MHz 700C -500C 1000C Sym. Condition =5.0V =2.4V 2002 V2.4 HE80128S HE80000 SERIES Test condition:TEMP=25, VDD=3V+/-10%, GND=0V PARAMETER CONDITION IFast ISlow IIdle ISleep IoHPW NORMAL Mode Current SLOW Mode Current IDLE Mode Current Sleep Mode Current Output Drive Current System System System System PWMP, PWMN*2 ext. 32.768K X'tal 32.769K X'tal VDD=3V; Voh=2V UNIT 0.75 IoLPW Output Sink Current PWMP, PWMN*2 VDD=3V; VoL=1V pins pins Threshold=2/3VDD(input from high) Threshold=1/3VDD(input from high low) VoL=2.0V VoL=0.4V ViL=GND, pull high Internally ViL=GND, pull high Internally user IoVO Output Current Input High Voltage Input Voltage VDD=3V;VO=0~2V,Data= Vhys Input Hysteresis Width Output Drive Current Output Sink Current IiL_1 Input Current IiL_2 Input Current Note: I/O, RSTP_N pull-high*1 pull-low*1 RSTP_N Drive Current Spec. Push-Pull port only Sink Current Spec. both Push-Pull Open-Drain port. This Spec. base driver only. There five build-in driver, user multiply number driver used driver current total amount current.( IoHPWMIoLPWM N=0,1,2,3,4,5) just 2002 V2.4 HE80128S HE80000 SERIES Application Circuit Important Note accessing address large than 64KB, users must update first, then TPL. Only this order, pre-charge circuit will work correctly. waiting necessary before instruction executed since Data speed ROM. Users emulate this accessing process ICE. delay should added firmware. Please bonds TSTP_P, RSTP_N PRTD[7:0] with test point (can soldered probed) can, then JESS some testing PCB. Neither connection necessary TSTP_P. following figure example (Testing point with through hole.) 2002 V2.4 HE80128S HE80000 SERIES SUPPLEMENTARY SPECIFICATION HE80 Series application Description: HE80 application, following points must bare mind. output direct drive buzzer. direct drive speaker, must above speaker. speaker application, must capacitors between IC's ground output, below figure. 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