Semiconductor ML9044 MATRIX CONTROLLER DRIVER This version:

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E2B0055-19-61 Semiconductor
Semiconductor ML9044
MATRIX CONTROLLER DRIVER
This version: Jun. 1999 ML9044
GENERAL DESCRIPTION
ML9044 used combination with 8-bit 4-bit microcontroller controls operation character type matrix LCD.
FEATURES
Easy interfacing with 8-bit 4-bit microcontroller Switchable between serial parallel interfaces Dot-matrix controller/driver small dots) large dots) font Built-in circuit allowing automatic resetting power-on Built-in common signal drivers segment signal drivers Built-in character generation capable generating small characters dots) large characters dots) Creation character patterns programming: small character patterns dots) large character patterns dots) Built-in oscillation circuit using external internal resistors Program-selectable duties: duty line: dots cursor arbitrator), 1/12 duty line: dots cursor arbitrator), 1/17 duty lines: dots cursor arbitrator) Built-in bias dividing resistors drive Bi-directional transfer segment outputs Bi-directional transfer common outputs Equipped with 120-dot arbitrator Display shifting each line Built-in contrast control circuit Built-in voltage multiplier circuit Chip (Gold Bump) Product name ML9044CVWA
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OSC1 OSCR OSC2
BLOCK DIAGRAM
Semiconductor
Timing generator Cursor blink controller Instruction decoder (ID) 17-bit shift register Common signal driver COM17 COM1
V5IN
Instruction register (IR)
Rarallelserial converter
Character generator (CGRAM)
buffer
SEG1
Data register (DR)
Character
Segment Signa driver
generator Address Display data (DDRAM) Arbitrator (ABRAM) (CGROM) counter
120-bit shift register
120-bit latch
Test circuit Busy flag (BF)
(ADC) Expansion
bias voltage dividing circuit
Expansion Instruction register (ER) Voltage multiplier circuit
Instruction decoder (ED)
SEG120
ML9044
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Semiconductor
ML9044
CIRCUITS
Applied pins SSR, CSR, BEB, P/S, SHT,
Applied pins
Applied pins R/W, RS1,
Output Enable signal Applied pins
Output Enable signal Applied pins
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Semiconductor
ML9044
DESCRIPTIONS
Symbol Mode. This should open Serial Mode. RS0, input pins with pull-up resistor- select register Parallel Mode. Name register Data register Instruction register Expansion Instruction register Description input with pull-up resistor select Read ("H") Write ("L") Parallel
This should open Serial Mode. input data input/output between ML9044 activating instructions Parallel Mode. This should open Serial Mode. input/output pins transfer data lower-order bits between ML9044 Parallel Mode. Each equipped with pull-up resistor. These lines used 4-bit interface. This should open Serial Mode. input/output pins transfer data upper bits between ML9044 Parallel Mode. Each equipped with pull-up resistor. This should open Serial Mode. OSC1 OSC2 OSCR clock oscillation pins required drive signals operation ML9044 instructions sent from CPU. input external clock, OSC1 should used. OSCR OSC2 pins should open. start oscillation with external resistor, resistor should connected between OSC1 OSC2 pins. OSCR should open. start oscillation with internal resistor, OSC2 OSCR pins should short-circuited outside ML9044. OSC1 should open. COM1 COM17 common signal output pins. duty, non-selectable voltage waveforms output COM10 COM17. 1/12 duty, non-selectable voltage waveforms output COM13 COM17. SEG1 SEG120 segment signal output pins.
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Semiconductor
ML9044
Symbol
Description input select transfer direction common signal output data. Refer Expansion Instruction Codes section about bit. duty 1/12 1/12 1/17 1/17 1/12 1/12 1/17 1/17 shift direction COM1 COM9 COM2 COM9, COM1 COM1 COM12 COM2 COM12, COM1 COM1 COM17 COM2 COM17, COM1 COM9 COM1 COM8 COM1, COM9 COM12 COM1 COM11 COM1, COM12 COM17 COM1 COM16 COM1, COM17 arbitrator's common COM9 COM1 COM12 COM1 COM17 COM1 COM1 COM9 COM1 COM12 COM1 COM17
input select transfer direction segment signal output data. "L": Data transfer from SEG1 SEG120 "H": Data transfer from SEG120 SEG1
V3A, V3B,
pins output bias voltages LCD. bias pins shorted. bias pins shorted.
input enable disable voltage multiplier circuit. disables voltage multiplier circuit. enables voltage multiplier circuit. voltage multiplier circuit doubles input voltage outputs V5IN pin. voltage multiplier circuit used only when generating level lower than GND.
V5IN
input voltage voltage multiplier. pins supply drive voltage. drive voltage supplied when voltage multiplier used (BEB internal contrast adjusting circuit also used. this time, V5IN should open. drive voltage supplied V5IN when voltage multiplier used (BEB internal contrast adjusting circuit used. this time, should open. When voltage multiplier used (BEB V5IN pins should open (the multiplied voltage output V5IN pin). this case, internal contrast adjusting circuit used automatically.
connect positive capacitor voltage multiplier. connect negative capacitor used voltage multiplier.
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Semiconductor
ML9044
Symbol power supply pin. ground level input pin.
Description input pins test circuits (normally open). Equipped with pull-down resistor.
input select parallel serial interface. selects parallel interface. selects serial interface.
enable this serial mode. enables this disables this This should open parallel mode.
input shift clock serial mode. Data inputting carried synchronizing with rising edge this clock signal. Data outputting from carried synchronizing with falling edge this clock signal. This should open parallel mode.
input DATA serial mode. Data inputting this carried synchronizing with rising edge signal. This should open parallel mode.
output DATA serial mode. Data inputting this carried synchronizing with falling edge signal. This should open parallel mode.
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Semiconductor
ML9044
ABSOLUTE MAXIMUM RATINGS
Parameter Supply Voltage Driving Voltage Symbol Condition 25°C 25°C Rating -0.3 +6.5 VDD+0.3 Unit
(GND Applicable pins V5IN, V3A, R/W, SHT, CSR, P/S, SSR, RS0,
Input Voltage
25°C
-0.3 VDD+0.3
RS1, BEB, DB7,
Storage Temperature
TSTG
+125
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage Driving Voltage Input Voltage Operating Temperature Symbol VDD-V5 (See Note) Condition Range VDD-1.40 VDD-3.5
(GND Unit Applicable pins VDD-GND VDD-V5 (V5IN) VDD-VIN
Note:
This voltage should applied across following voltages output (V3B) pins: bias {VDD-(VDD-V5)/4} ±0.15V V3B= {VDD-(VDD-V5)/2} ±0.15V {VDD-3 (VDD-V5)/4 ±0.15V bias {VDD-(VDD-V5)/5} ±0.15V {VDD-2 (VDD-V5)/5} ±0.15V V3B= {VDD-3 (VDD-V5)/5} ±0.15V {VDD-4 (VDD-V5)/5} ±0.15V voltages (V3B), pins should satisfy VDD>V1>V2>V3A(V3B)>V4>V5. (Higher Lower) apply short-circuiting across output pins across output input/output power supply output mode.
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Semiconductor
ML9044
ELECTRICAL CHARACTERISTICS
Characteristics
Parameter Input Voltage Input Voltage Input Voltage Input Voltage Output Voltage Output Voltage Voltage Drop Symbol VIH1 VIL1 VIH2 VIL2 -0.1mA +0.1mA -13mA +13mA IOCH -4mA IOCMH ±4mA IOCML ±4mA IOCL +4mA IOSH -4mA IOSMH ±4mA IOSML ±4mA IOSL +4mA VDD, Excluding current flowing through pull-up resistor output driving Input Current II2| VDD, Excluding current flowing through pull-down resistor Supply Current Bias Resistor
Oscillation Frequency External Resistor Oscillation Frequency Internal Resistor
(GND 2.5V 5.5V, +85°C) Condition 0.8VDD -0.3 0.8VDD -0.3 0.75VDD 0.9VDD Note Note 0.2VDD 0.2VDD 0.2VDD 0.1VDD
SSR, CSR, BEB,
Unit
Applicable R/W, RS0, RS1, SHT, P/S,
OSC1, SSR, CSR, DB7, OSC2 COM1 COM17
Output Voltage VOH1 VOL1 VOL2 VCMH VCML Voltage Drop VSMH VSML Input Leakage Current Input Current II1| Output Voltage VOH2
SEG1 SEG120
SHT, P/S, R/W, RS0, DB7,
fosc1 fosc2 fduty
Note
VDD, V3A, V3B, OSC1, OSC2 OSC1, OSC2, OSCR OSC1
120kW±2% OSC1: Open OSC2, OSCR: Open Input from OSC1
Note Note
OSC2 OSCR: Short-circuited
External Clock
Clock Input Frequency
Input Clock Duty
Input Clock Rise Time
Note Note Note
Input Clock Fall Time
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Semiconductor
ML9044
(GND 2.5V 5.5V, +85°C) Parameter Control Range Driving Voltage internal variable resistor)
Bias Voltage Driving External Input
Symbol VLCD VLCD VLCD1 VLCD2
Condition bias V5IN bias V5IN bias
Unit
Applicable
2VIN +1.2V VDD/2 V5IN
2VIN
Note bias
Voltage Multiplier Output Voltage Voltage Multipler Input Voltage
V5OUT
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Semiconductor Note
ML9044
Applied voltage drop occurring between VDD, pins common pins (COM1 COM17) when current flows flows common pin. Also applied voltage drop occurring between VDD, (V3B) pins segment pins (SEG1 SEG120) when current flows flows common pin. current flows when output level flows when output level
Note
Applied current flowing into when external clock (fosc2 kHz) internal oscillation OSC1 under following conditions: (V3B) Open SSR, CSR, BEB: (fixed) Other input pins: (fixed) Other output pins: load
Note
Note
OSC1 OSC1 OSCR OSC2 120kW±2% OSCR
OSC2
wire between OSC1 wire between OSC2 should short possible. Keep OSCR open.
wire between OSC2 OSCR should short possible. Keep OSC1 open.
Note
waveform
Applied pulses entering from OSC1 fduty tHW/ (tHW tLW)
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Semiconductor Note
0.7VDD 0.3VDD 0.7VDD 0.3VDD
ML9044
Applied pulses entering from OSC1
Note
bias, pins short-circuited. open. bias, pins short-circuited. open.
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Semiconductor
ML9044
Switching Characteristics (The following ratings subject change after evaluation.) Parallel Interface Mode timing input from (see timing output (see shown below: WRITE MODE (Timing input from CPU)
(VDD 5.5V, +85°C) Parameter R/W, RS0, Setup time Pulse Width R/W, RS0, Hold time Rise Time Fall Time Pulse Width Cycle Time Input Data Hold time Input Data Setup time Symbol 1000 Unit
RS1,
Input Data
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Semiconductor READ MODE (Timing output CPU)
ML9044
(VDD 5.5V, +85°C) Parameter R/W, RS1, Setup Time Pulse Width R/W, RS1, Hold Time Rise Time Fall Time Pulse Width Cycle Time Output Data Delay Time Output Data Hold Time Symbol 1000 Unit
RS1,
Output Data
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Semiconductor Serial Interface Mode
ML9044
(VDD 5.5V, +85°C) Parameter Cycle Time Setup Time Hold Time Setup Time Hold Time Pulse Width Pulse Width Rise Time Fall Time Setup Time Hold Time Data Output Delay Time Data Output Hold Time Symbol tSCY tCSU tSSU tSWH tSWL tDISU tDIH tDOD tCDH Unit
tSCY tCSU tSSU tSWL tDIH tDOD tCDH tSWH
tDISU tDOD
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Semiconductor
ML9044
FUNCTIONAL DESCRIPTION
Instruction Register (IR), Data Register (DR), Expansion Instruction Register (ER) These registers selected setting level Register Selection input pins RS1. selected when both "H". selected when "H". selected when both "L". (When "L", ML9044 selected.) stores instruction code address code display data (DDRAM) character generator (CGRAM). microcontroller (CPU) write cannot read from stores contrast adjusting code address code arbitrator (ABRAM). write read from stores data written DDRAM, ABRAM CGRAM also stores data read from DDRAM, AMRAM CGRAM. data written automatically written DDRAM, ABRAM CGRAM. When address code written data specified address automatically transferred from DDRAM, ABRAM CGRAM data DDRAM, ABRAM CGRAM checked allowing read data stored After writes data data next address DDRAM, ABRAM CGRAM selected ready next writing CPU. Similarly, after reads data data next address DDRAM, ABRAM CGRAM ready next reading CPU. Writing reading from these registers controlled changing status W(Read/Write) pin.
Table status register operation
Writing Reading Busy flag (BF) address counter (ADC) Writing Reading from Writing Reading contrast code Operation
Busy Flag (BF) status Busy Flag (BF) indicates that ML9044 carrying internal operation. When "1", instruction ignored. When "H", "H", data output DB7. instructions should input when "0". When "1", output code address counter (ADC) undefined.
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Semiconductor
ML9044
Address Counter (ADC) address counter provides read/write address DDRAM, ABRAM CGRAM also provides cursor display address. When instruction code specifying DDRAM, ABRAM CGRAM address setting input pre-defined register, register selects specified DDRAM, ABRAM CGRAM transfers address code ADC. address data automatically incremented decremented) after display data written read from DDRAM, ABRAM CGRAM. data output when "H", "L", "0". Timing Generator timing generator generates timing signals internal operation ML9044 activated instruction sent from operation internal circuits ML9041 such DDRAM, ABRAM, CGRAM CGROM. Timing signals generated that internal operation carried displaying will interfered internal operation initiated accessing from CPU. example, when writes data DDRAM, display corresponding written data affected.
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Semiconductor
ML9044
Display Data (DDRAM) This stores display data represented 8-bit character coding (see Table DDRAM addresses correspond display positions (digits) shown below. DDRAM addresses ADC) represented hexadecimal.
Hexadecimal (Example) Representation DDRAM address
Hexadecimal
Relationship between DDRAM addresses display positions (1-line display mode)
Digit
Right
Display position address (hexadecimal)
Left
1-line display mode, ML9044 display characters from digit digit While DDRAM addresses "00" "4F" character codes, area used display used area general data. When display shifted instruction, relationship between display DDRAM address changes shown below:
Digit
(Display shifted right)
Digit (Display shifted left)
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Semiconductor
ML9044
Relationship between DDRAM addresses display positions (2-line display mode) 2-line mode, ML9044 display characters characters line) from digit digit
Digit Line Line
Display position address (hexadecimal)
Note: DDRAM address digit first line consecutive DDRAM address digit second line. When display shifted instruction, relationship between display DDRAM address changes shown below:
(Display shifted right)
Digit Line Line Digit Line Line
(Display shifted left)
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Semiconductor
ML9044
Character Generator (CGROM) CGROM generates small character patterns dots, patterns) large character patterns dots, patterns) from 8-bit character code signals DDRAM. Table relationship between 8-bit character codes character patterns. When 8-bit character code corresponding character pattern CGROM written DDRAM, character pattern displayed display position specified DDRAM address.
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Semiconductor Character Generator (CGRAM)
ML9044
CGRAM used generate user-specific character patterns that CGROM. CGRAM bytes bits) store small character patterns dots) large character patterns dots). When displaying character pattern stored CGRAM, write 8-bit character code hex.) assigned Table DDRAM. This enables outputting character pattern display position corresponding DDRAM address. cursor blink also displayed even when CGRAM ABRAM address ADC. Therefore, cursor blink display should inhibited while holding CGRAM ABRAM address. following describes character patterns written read from CGRAM. Small character patterns dots) (See Table 3-1.) method writing character patterns CGRAM from three CGRAM address bits select lines constituting character pattern. First, mode increment decrement from CPU, then input CGRAM address. Write each line character pattern code CGRAM through DB7. data lines correspond CGRAM data bits respectively (see Table 3.1). Input data represents status represents status. Since automatically incremented decremented after data written CGRAM, necessary CGRAM address again. bottom line character pattern (the CGRAM address bits "1", which means hexadecimal) cursor line. ON/OFF pattern this line ORed with cursor pattern displaying LCD. Therefore, pattern data cursor position should zeros display cursor. Whereas data given CGRAM data bits output display data, data given CGRAM data bits not. Therefore, CGRAM data bits used area. method displaying CGRAM character patterns CGRAM selected when higher-order bits character code zeros. Since character code used, character pattern Table selected using character code "00" "08" hexadecimal. When 8-bit character code corresponding character pattern CGRAM written DDRAM, character pattern displayed display position specified DDRAM address. (The DDRAM data bits correspond CGRAM address bits respectively.)
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Semiconductor Large character patterns dots) (See Table 3-2.) method writing character patterns CGRAM from
ML9044
four CGRAM address bits select lines constituting character pattern. First, mode increment decrement from CPU, then input CGRAM address. Write each line character pattern code CGRAM through DB7. data lines correspond CGRAM data bits respectively (see Table Input data represents status represents status. Since automatically incremented decremented after data written CGRAM, necessary CGRAM address again. bottom line character pattern (the CGRAM address bits "1", which means hexadecimal) cursor line. ON/OFF pattern this line ORed with cursor pattern displaying LCD. Therefore, pattern data cursor position should zeros display cursor. Whereas data given CGRAM data bits with CGRAM addresses hexadecimal (set CGRAM address bits output display data LCD, data given CGRAM data bits CGRAM addresses hexadecimal not. These bits written read area. method displaying CGRAM character patterns CGRAM selected when higher-order bits character code zeros. Since bits character code used, character pattern Table selected with character code "00", "01", "08" "09" hexadecimal. When 8-bit character code corresponding character pattern CGRAM written DDRAM, character pattern displayed display position specified DDRAM address. (The DDRAM data bits correspond CGRAM address bits respectively.)
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Semiconductor
ML9044
Arbitrator (ABRAM) arbitrator RAM(ABRAM) stores arbitrator display data. ABRAM address with relationship illustrated below. valid address area (00H 17H). Although address exceeding (17H) address already exceed automatic increment decrement processing, address valid address area ignored. cursor blink also displayed even when CGRAM ABRAM address ADC. Therefore, cursor blink display should inhibited while hoding CGRAM ABRAM address.
Hexadecimal
Hexadecimal
arbitrator store maximum dots arbitrator Display-ON data units dots. arbitrator display shifted instructions following relationship with display positions:.
Configuration input display data Input data
*Don't Care
Relationship between display-ON data segment pins 5XSn+1 5XSn+5
Display data ABRAM address
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Semiconductor
Table Relationship between character codes character patterns ML9044
Lower bits Upper bits 0000
0010
0011
0100
0101
0110
0111
1010
1011
1100
1101
1110
1111
0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110
ML9044
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1111
Semiconductor Table
ML9044
Relationship between CGRAM address bits, CGRAM data bits (character pattern) DDRAM data bits (character code) character mode. (Examples)
address
data (Character pattern)
data
(Character code)
543210
76543210
0000 0010 1110
10001 10001 10001 10001 10001 01110 00000 10010 10100 11000 10100 10010 10001 00000 00100 00100 00100 00100 00100 01110 00000
Don't Care
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Semiconductor Table
ML9044
Relationship between CGRAM address bits, CGRAM data bits (character pattern) DDRAM data bits (character code) character mode (Examples)
address
data (Character pattern)
76543210
data
(Character code)
543210
76543210
01111 10010 01111 11111 00010 00000 00000 00000 00000 00000 01111 10001 10001 10001 01111 00001 00001 01110 00000 00000 11011 01010 10001 10001 01110 00000 00000 00000 00000
Don't Care
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Semiconductor
ML9044
Cursor/Blink Control Circuit This circuit generates cursor blink LCD. operation this circuit controlled program CPU. cursor/blink display carried position corresponding DDRAM address (Address Counter). example, when stores value "07" (hexadecimal), cursor blink displayed follows:
Digit 1-line display mode
Cursor/blink position
Digit 2-line display mode First line
Second line
Cursor/blink position
Note:
cursor blink also displayed even when CGRAM ABRAM address ADC. Therefore, cursor blink display should inhibited while holding CGRAM ABRAM address.
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Semiconductor Display Circuit (COM1 COM17, SEG1 SEG120, CSR)
ML9044
ML9044 common signal outputs segment signal outputs display characters 1-line display mode) characters 2-line display mode). character pattern converted into serial data transferred series through shift register. transfer direction serial data determined pin. shift direction common signals determined pin. following tables show transfer shift directions:
duty 1/12 1/12 1/17 1/17 1/12 1/12 1/17 1/17
Transfer direction SEG1 SEG120 SEG120 SEG1 Shift direction COM1 COM9 COM2 COM9, COM1 COM1 COM12 COM2 COM12, COM1 COM1 COM17 COM2 COM17, COM1 COM9 COM1 COM8 COM1, COM9 COM12 COM1 COM11 COM1, COM12 COM17 COM1 COM16 COM1, COM17 arbitrator's common COM9 COM1 COM12 COM1 COM17 COM1 COM1 COM9 COM1 COM12 COM1 COM17
Refer Expansion Instruction Codes section about bit. Signals input pins should determined power-on kept unchanged.
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Semiconductor Built-in Reset Circuit
ML9044
ML9044 automatically initialized when power turned During initialization, Busy Flag (BF) ML9041 does accept instruction from (other than Read instruction). Busy Flag about after becomes higher. During this initialization, ML9044 performs following instructions: Display clearing interface data length bits "1") 1-line display "0") Font size dots "0") counting Increment (I/D "1") Display shifting None "0") Display "0") Cursor "0") Blinking "0") Arbitrator Displayed lower line "0") Setting (hexadecimal) Contrast Data
built-in reset circuit, power supply conditions shown below should satisfied. Otherwise, built-in reset circuit work properly. such case, initialize ML9044 with instructions from CPU. battery always requires such initialization from CPU. (See "Initial Setting Instructions")
2.5V
0.2V 100ms
0.2V tOFF tOFF
0.2V
Figure Power-on Power-off Waveform
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Semiconductor with
ML9044
Parallel interface mode ML9044 transfer either bits once bits twice data interfacing with 8-bit 4-bit microcontroller (CPU). 8-bit interface data length ML9044 uses data lines time transfer data from CPU. 4-bit interface data length ML9044 uses only higher-order data lines twice transfer 8-bit data from CPU. ML9044 first transfers higher-order bits 8-bit data (DB4 case 8-bit interface data length) then lower-order bits data (DB0 case 8-bit interface data length). lower-order bits data should always transferred even when only transfer higher-order bits data required. (Example: Reading Busy Flag) transfers bits data complete transfer 8-bit data. Therefore, when only access made, following data transfer cannot completed properly.
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Semiconductor
ML9044
Busy (Internal operation)
Busy
Busy ADC6 ADC5 ADC4 ADC3 ADC2 ADC1 ADC0
Writing (Instruction Register)
Reading (Busy Flag) (Address Counter)
Writing (Data Register)
Figure 8-Bit Data Transfer
Busy (Internal operation)
Busy
Busy ADC6 ADC5 ADC4 Reading (Busy Flag) (Address Counter)
ADC3 ADC2 ADC1 ADC0
Writing (Instruction Register)
Writing (Data Register)
Figure 4-Bit Data Transfer
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Semiconductor Serial Interface Mode
ML9044
Serial Mode, ML9044 interfaces with SHT, pins. Writing reading operations executed units bits after signal falls down. signal rises before completion 16-bit unit access, this access ignored. When "1", ML9044 cannot accept other instructions. Before inputting instruction, check that "0". access when ignored. Data format LSB-first. Examples Access Serial Mode WRITE MODE
READ MODE
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Semiconductor Instruction Codes Table Instruction Codes
Instruction Code Function Clears displayed digits Display Clear sets DDRAM address address counter. arbitrator data cleared. Sets DDRAM address address Cursor Home counter shifts display back original. content DDRAM remains unchanged. Determines direction movement Entry Mode Setting cursor whether shift display. This instruction executed when data written read. Sets display ON/OFF (D), cursor Displya ON/OFF Control ON/OFF cursor-position character blinking ON/OFF. Cursor/Display Shift Moves cursor shifts display without changing content DDRAM. Sets interface data length (DL), Function Setting number display lines type character font (F). Sets CGRAM address. After that, CGRAM Address Setting CGRAM data transferred from CPU. Sets DDRAM address. After that DDRAM DDRAM Address Setting data transferred from CPU. Reads Busy Flag (indicating that Busy Flag/Address Read ML9044 operating) content address counter. Writes data DDRAM, ABRAM CGRAM. Reads data from DDRAM, ABRAM CGRAM.
ML9044
Execution Time 270kHz 1.52
1.52
Data Write Data Read Arbitrator Display Line Contrast Control Data Write Contrast Control Data Read
WRITE DATA READ DATA
Sets arbitrator display line. Writes data control contrast LCD. Reads data control contrast LCD. Sets ABRAM address. After that
WRITE (Contrast Data) DATA READ (Contrast Data) DATA
ABRAM address setting
(Decrement) (Moves cursor.) (Left shift) (4-bit data) line) dots) (Ready accept instruction)
ABRAM data transferred from CPU.
Display data Character generator ABRAM Arbitrator data CGRAM address DDRAM address (Corresponds cursor address) ABRAM address Address counter (Used DDRAM, ABRAM CGRAM)
execution time dependent upon frequencies
(Increment) (Shifts display.) (Shifts display.) (Right shift) (8-bit data) lines) dots) (Busy)
(Enables blinking.) (Displyas corsor.) (Displays character pattern.) (Arbitrator Displays arbitrator (Arbitrator Displays upper line) arbitrator lower line)
Don't Care 32/54
Semiconductor
ML9044
Instruction Codes instruction code signal sent from access ML9044. ML9044 starts operation instructed code received. busy status ML9044 rather longer than cycle time CPU, since internal processing ML9044 starts timing which does affect display LCD. busy status (Busy Flag "1"), ML9044 executes Busy Flag Read instruction only. Therefore, should ensure that Busy Flag before sending instruction code ML9044. Display Clear
Instruction Code
When this instruction executed, display including arbitrator display cleared entry mode "Increment". value (Display shifting) remains unchanged. position cursor blink being displayed moves left left line 2-line display mode). Note: DDRAM ABRAM data turn "20" "00" hexadecimal, respectively. value address counter (ADC) turns corresponding address "00" (hexadecimal) DDRAM. execution time this instruction 1.52 (maximum) oscillation frequency kHz.
Cursor Home
Instruction code:
Don't Care
When this instruction executed, cursor blink position moves left left line 2-line display mode). display been shifted, display returns original display position before shifting. Note: value address counter (ADC) goes corresponding address "00" (hexadecimal) DDRAM). execution time this instruction 1.52 (maximum) oscillation frequency kHz.
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Semiconductor Entry Mode Setting
Instruction code:
ML9044
When set, cursor blink shifts right character position (ID= "1"; increment) left character position (I/D= "0"; decrement) after 8-bit character code written read from DDRAM. same time, address counter (ADC) also incremented (when "1"; increment) decremented (when "0"; decrement). After character pattern code written read from CGRAM, address counter (ADC) incremented (when "1"; increment) decremented (when "0"; decrement). Also after data written read from ABRAM, address counter (ADC) incremented (when "1"; increment) decremented (when "0"; decrement). When "1", cursor blink stops entire display shifts left (I/D "1") right (I/D "0") character position after character code written DDRAM. case "1",when character code read from DDRAM, when character pattern data written read from CGRAM when data written read from ABRAM, normal read/write carried without shifting entire display. (The entire display does shift, cursor blink shifts right (I/D "1") left (I/D "0") character position.) When "0", display does shift, normal write/read performed. Note: execution time this instruction (maximum) oscillation frequency kHz. Display Mode Setting
Instruction code:
(DB2) this instruction determines whether display character patterns LCD. When "1", character patterns displayed LCD. When "0", character patterns displayed cursor/blink setting also canceled. Note: Unlike Display Clear instruction, this instruction does change character code DDRAM ABRAM.
When (DB1) "0", cursor turns off. When both bits "1", cursor turns When (DB0) "0", blinking canceled. When both bits "1", blinking performed. Blinking mode, dots including those cursor, character pattern cursor alternately displayed. Note: execution time this instruction (maximum) oscillation frequency 270kHz. 34/54
Semiconductor Cursor/Display Shift
Instruction code:
ML9044
FDon't Care
"0", This instruction shifts left cursor blink positions (decrements content "0", This instruction shifts right cursor blink positions (increments content "1", This instruction shifts left entire display character position. cursor blink positions move left together with entire display. Arbitrator display shifted. (The content remains unchanged.) "1", This instruction shifts right entire display character position. cursor blink positions move right together with entire display. Arbitrator display shifted. (The content remains unchanged.) 2-line mode, cursor blink moves from first line second line when cursor digit (27; hex) first line shifted right. When entire display shifted, character pattern, cursor blink will move between lines (from line line vice versa). Note: execution time this instruction oscillation frequency (OSC) kHz. Function Setting
Instruction code:
Don't Care
When "DL" (DB4) this instruction "1", data transfer from performed once bits DB0. When "DL" (DB4) this instruction "0", data transfer from performed twice bits DB4. 2-line display mode selected when (DB3) this instruction "1". line display mode selected when "0". character font represented dots selected when (DB2) this instruction "1". character font represented dots selected when "0". After ML9044 powered this initial setting should carried before execution instruction except Busy Flag Read. After this initial setting, instructions other than instruction executed. Serial Mode, setting ignored.
Number display lines Font size Duty 1/12 1/17 1/17 Number biases Number common signals
Note:
execution time this instruction oscillation frequency (OSC) kHz. 35/54
Semiconductor CGRAM Address Setting
Instruction code:
ML9044
This instruction sets character data corresponding CGRAM address represented bits (binary). CGRAM addresses valid until DDRAM ABRAM addresses set. writes reads character patterns starting from represented CGRAM address bits instruction code that time. Note: execution time this instruction oscillation frequency (OSC) kHz.
DDRAM Address Setting
Instruction code:
This instruction sets character data corresponding DDRAM address represented bits (binary). DDRAM addresses valid until CGRAM ABRAM addresses set. writes reads character patterns starting from represented DDRAM address bits instruction code that time. 1-line mode (the "1"), DDRAM address represented bits (binary) should range "00" "4F" hexadecimal. 2-line mode (the "2"), DDRAM address represented bits (binary) should range "00" "27" "40" "67" hexadecimal. address other than above input, ML9044 cannot properly write character code read from DDRAM. Note: execution time this instruction oscillation frequency (OSC) kHz.
DDRAM/ABRAM/CGRAM Data Write
Instruction code:
This instruction writes data represented bits (binary) DDRAM, ABRAM CGRAM. After data written, cursor, blink display shifts according Cursor/Display Shift instruction (see 5)). Note: execution time this instruction oscillation frequency (OSC) kHz.
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Semiconductor Busy Flag/Address Counter Read (Execution time:
Instruction code:
ML9044
"BF" (DB7) this instruction tells whether ML9044 busy internal operation "1") "0"). When "BF" "1", ML9044 cannot accept other instructions. Before inputting instruction, check that "BF" "0". When "BF" "0", ML9044 outputs correct value address counter. value address counter equal DDRAM, ABRAM CGRAM address. Which DDRAM, ABRAM CGRAM addresses counter determined preceding address setting. When "BF" "1", value address counter always correct because have been incremented decremented during internal operation. DDRAM/ABRAM/CGRAM Data Read
Instruction code:
character code read from DDRAM, Display-ON data from ABRAM character pattern from CGRAM. DDRAM, ABRAM CGRAM selected preceding address setting. After data read, address counter (ADC) incremented decremented Transfer Mode Setting instruction (see Note: Conditions reading correct data
DDRAM, ABRAM CGRAM Setting instruction input before this data read instruction input. When reading character code from DDRAM, Cursor/Display Shift instruction (see input before this Data Read instruction input. When more consecutive Data Read instructions executed, following read data correct. Correct data output under conditions other than cases (1), above. Note: execution time this instruction oscillation frequency (OSC) kHz.
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Semiconductor Expansion Instruction Codes
ML9044
busy status ML9044 rather longer than cycle time CPU, since internal processing ML9044 starts timing which does affect display LCD. busy status (Busy Flag "1"), ML9041 executes Busy Flag Read instruction only. Therefore, should ensure that Busy Flag before sending expansion instruction code ML9044. Arbitrator Display Line
Exparsion Instruction codes:
This expansion instruction code sets Arbitrator display line. relationship between status this common outputs follows:
duty 1/12 1/12 1/17 1/17 1/12 1/12 1/17 1/17 Shift direction COM1 COM9 COM2 COM9, COM1 COM1 COM12 COM2 COM12, COM1 COM1 COM17 COM2 COM17, COM1 COM9 COM1 COM8 COM1, COM9 COM12 COM1 COM11 COM1, COM12 COM17 COM1 COM16 COM1, COM17 Arbitrator's comon COM9 COM1 COM12 COM1 COM17 COM1 COM1 COM9 COM1 COM12 COM1 COM17
Contrast Adjusting Data Write
Exparsion Instraction codes:
This instruction writes contrast adjusting data contrast register. After contrast adjusting data written register, potential (VLCD) output varies according data written. VLCD becomes maximum when content contrast register "1F" (hexadecimal) becomes minimum when "00" (hexadecimal). Note: execution time this instruction oscillation frequency (OSC) kHz.
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Semiconductor Contrast Adjusting Data Read
Exparsion Instruction code:
ML9044
This instruction reads contrast adjusting data from contrast register. Note: execution time this instruction oscillation frequency (OSC) kHz. ABRAM Address Setting
Exparsion Instruction code:
This instruction sets character data corresponding ABRAM address represented bits (binary). ABRAM addresses valid until CGRAM DDRAM addresses set. writes reads character patterns starting from represented ABRAM address bits instruction code that time. ABRAM address represented bits (binary) should range "00" "13" hexadecimal. address other than above input, ML9044 cannot properly write character code read from DDRAM. Note: execution time this instruction oscillation frequency (OSC) kHz.
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Semiconductor Drive Waveforms
ML9044
waveforms signal waveforms display) vary according duty 1/12 1/17 duties). below. relationship between duty ratio frame frequency follows:
Duty ratio 1/12 1/17 Frame Frequency 75.0Hz 56.3Hz 79.4Hz
Note:
oscillation frequency (OSC)
Driving 24-character line (1/9 duty, under conditions 1-line display mode character font dots
COM1 Character COM8 COM9 Cursor Arbitrator
SEG1 ML9044
SEG120
COM10 COM17 output Display-OFF common signals.
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Semiconductor
ML9044
Driving 24-character line (1/12 duty, under conditions 1-line display mode character font dots
COM1 Character COM11 COM12
Cursor Arbitrator SEG1 MSM9044 SEG120
COM13 COM17 output Display-OFF common signals. Driving 24-character line (1/17 duty, under conditions 2-line display mode character font dots
COM1 Character COM8 COM9 Character COM16 COM17 Cursor Arbitrator Cursor
SEG1 MSM9044
SEG120
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Semiconductor
ML9044
EXAMPLES VLCD GENERATION CIRCUITS
With 1/4bias, built-in contrast adjusting circuit voltage multiplier
ML9044
V5IN
Reference potential voltage multiplien
With bias, built-in contrast adjusting circuit level input from external circuit
ML9044
V5IN level
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Semiconductor Waveforms Duty
COM1 (CSR COM2 (CSR COM9 (CSR COM8 (CSR (first character line)
ML9044
frame
COM2 (CSR COM3 (CSR COM8 (CSR COM7 (CSR (second character line)
Display turning-off waveform
COM8 (CSR COM9 (CSR COM2 (CSR COM1 (CSR (cursor line)
COM9 (CSR COM1 (CSR COM1 (CSR COM9 (CSR (arbitrator line)
COM10 COM17
Display turning-on waveform
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Semiconductor Waveforms 1/12 Duty
COM1 (CSR COM2 (CSR COM12 (CSR COM11 (CSR (first character line)
ML9044
frame
COM2 (CSR COM3 (CSR COM11 (CSR COM10 (CSR (second character line)
Display turning-off waveform
COM11 (CSR COM12 (CSR COM2 (CSR COM1 (CSR (cursor line)
COM12 (CSR COM1 (CSR COM1 (CSR COM12 (CSR (arbitrator line)
COM13 COM17
Display turning-on waveform
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Semiconductor Waveforms 1/17 Duty
COM1 (CSR COM2 (CSR COM17 (CSR COM16 (CSR (first character line)
ML9044
(V3B)
frame
COM2 (CSR COM3 (CSR COM16 (CSR COM15 (CSR (second character line)
(V3B)
COM16 (CSR COM17 (CSR COM2 (CSR COM1 (CSR (corsor line)
(V3B)
COM17 (CSR COM1 (CSR COM1 (CSR COM17 (CSR (arbitrator line)
(V3B)
Display turning-off waveform
(V3B)
Display turning-on waveform
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Semiconductor Initial Setting Instructions
ML9044
Data transfer from using bits Turn power. Wait more after reached 2.5V higher. bits" with Function Setting instruction. Wait more. bits" with Function Setting instruction. Wait more. bits" with Function Setting instruction. Check Busy Flag Busy wait more). bits", "Number lines" "Font size" with Function Setting instruction. (After this, number lines font size cannot changed.) Check Busy Flag Busy. Execute Display Mode Setting Instruction, Display Clear Instruction, Entry Mode Setting instruction Arbitrator Display Line Setting Instruction. Check Busy Flag Busy. Initialization completed. example instruction code
Don't Care
Data transfer from using bits Turn power. Wait more after reached 2.5V higher. bits" with Function Setting instruction. Wait more. bits" with Function Setting instruction. Wait more. bits" with Function Setting instruction. Check Busy Flag Busy wait longer). bits" with Function Setting instruction. Wait longer. bits", "Number lines" "Font size" with Initial Setting instruction. (After this, number lines font size cannot changed.) Check Busy Flag Busy. Execute Display Mode Setting Instruction, Display Clear Instruction, Entry Mode Setting instruction Arbitrator Display Line Setting Instruction Check Busy Flag Busy. Initialization completed. example instruction code
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Semiconductor example instruction code
ML9044
13), check Busy Flag Busy before executing each instruction. Data transfer from using serial Turn power. Wait more after reached 2.5V higher. "Number lines" "Font size" with Function Setting Instruction. Execute Display Mode Setting Instruction, Display Clear Instruction, Entry Mode Instruction Arbitrator Display Line Setting Instruction. Check busy flag Busy. Initialization completed. check Busy Flag Busy before executing each instruction.
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Semiconductor
ML9044
Relationship Between Character Codes Character patterns
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Semiconductor
ML9044
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Semiconductor
ML9044
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Semiconductor
ML9044
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Semiconductor
ML9044
CONFIGURATION
Layout Chip Size Chip Thickness Bump Size Bump Size
10.62 2.55mm 625±20mm 72mm 96mm
Coordinates
Symbol V5IN (mm) -5103 -4914 -4725 -4536 -4347 -4158 -3969 -3780 -3591 -3402 -3213 -3024 -2835 -2646 -2457 -2268 -2079 -1890 -1701 -1512 (mm) -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 Symbol OSC2 OSCR OSC1 COM1 COM2 (mm) -1323 -1134 -945 -756 -567 -378 -189 1134 1323 1512 1701 1890 2079 2268 (mm) -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8
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Semiconductor
ML9044
Symbol COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 COM17 DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY SEG120 SEG119 SEG118 SEG117 SEG116 SEG115 SEG114 SEG113 SEG112 SEG111 SEG110 SEG109 SEG108 SEG107 SEG106 SEG105 SEG104 SEG103
(mm) 2457 2646 2835 3024 3213 3402 3591 3780 3969 4158 4347 4536 4725 4914 5103 5184 5184 5184 5184 5184 5184 5184 4998 4914 4830 4746 4662 4578 4494 4410 4326 4242 4158 4074 3990 3906 3822 3738 3654 3570
(mm) -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -1099.8 -720 -480 -240 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8
Symbol SEG102 SEG101 SEG100 SEG99 SEG98 SEG97 SEG96 SEG95 SEG94 SEG93 SEG92 SEG91 SEG90 SEG89 SEG88 SEG87 SEG86 SEG85 SEG84 SEG83 SEG82 SEG81 SEG80 SEG79 SEG78 SEG77 SEG76 SEG75 SEG74 SEG73 SEG72 SEG71 SEG70 SEG69 SEG68 SEG67 SEG66 SEG65 SEG64 SEG63
(mm) 3486 3402 3318 3234 3150 3066 2982 2898 2814 2730 2646 2562 2478 2394 2310 2226 2142 2058 1974 1890 1806 1722 1638 1554 1470 1386 1302 1218 1134 1050
(mm) 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8
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Semiconductor
ML9044
Symbol SEG62 SEG61 SEG60 SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28
(mm) -126 -210 -294 -378 -462 -546 -630 -714 -798 -882 -966 -1050 -1134 -1218 -1302 -1386 -1470 -1554 -1638 -1722 -1806 -1890 -1974 -2058 -2142 -2226 -2310 -2394 -2478 -2562 -2646 -2730
(mm) 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8
Symbol SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY DUMMY
(mm) -2814 -2898 -2982 -3066 -3150 -3234 -3318 -3402 -3486 -3570 -3654 -3738 -3822 -3906 -3990 -4074 -4158 -4242 -4326 -4410 -4494 -4578 -4662 -4746 -4830 -4914 -4998 -5184 -5184 -5184 -5184 -5184 -5184 -5184
(mm) 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 1087.8 -240 -480 -720
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E2Y0002-29-62
NOTICE
information contained herein change without notice owing product and/or technical improvements. Before using product, please make sure that information being referred up-to-date. outline action examples application circuits described herein have been chosen explanation standard action performance product. When planning product, please ensure that external conditions reflected actual circuit, assembly, program designs. When designing your product, please product below specified maximum ratings within specified operating ranges including, limited operating voltage, power dissipation, operating temperature. assumes responsibility liability whatsoever failure unusual unexpected operation resulting from misuse, neglect, improper installation, repair, alteration accident, improper handling, unusual physical electrical stress including, limited exposure parameters beyond specified maximum ratings operation outside specified operating range. Neither indemnity against license third party's industrial intellectual property right, etc. granted connection with product and/or information drawings contained herein. responsibility assumed infringement third party's right which result from thereof. products listed this document intended general electronics equipment commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products authorized system application that requires special enhanced quality reliability characteristics system application where failure such system application result loss damage property, death injury humans. Such applications include, limited traffic automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, life-support systems. Certain products this document need government approval before they exported particular countries. purchaser assumes responsibility determining legality export these products will take appropriate necessary steps their expense these. part contents contained herein reprinted reproduced without prior permission. MS-DOS registered trademark Microsoft Corporation.
Copyright 1999 Electric Industry Co., Ltd.
Printed Japan

Semiconductor ML9044 MATRIX CONTROLLER DRIVER This version:

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