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Semiconductor MSM9223 This version: Sep. 1999 MSM9223 Previous ve
Top Searches for this datasheetE2C0044-19-96 Semiconductor Semiconductor MSM9223 This version: Sep. 1999 MSM9223 Previous version: Aug. 1999 27-Bit Duplex/Triplex Controller/Driver with Digital Dimming, Keyscan MSM9223 full CMOS controller/driver Duplex Triplex vacuum fluorescent display tube. conststs 27-segment driver outputs 3-grid pre-driver outputs, that drive directly 81-segment VFD. MSM9223 features digital dimming function, 6-ch ADC, keyscan circuit encoder type switch interface. MSM9223 provides interface with microcontroller only three signal lines: DATA I/O, CLOCK FEATURES Supply voltage (VDD) Duplex/Triplex selectable Applicable tube 18.5V (Built-in regulator logic) Grids Anodes tube Grids Anodes tube 27-segment driver outputs IOH=-5mA VOH=VDD-0.8V (SEG1 IOH=-10mA VOH=VDD-0.8V (SEG20 3-grid pre-driver outputs IOL=10mA VOL=2V Built-in digital dimming circuit (10-bit resolution) Built-in 6-ch converter Built-in keyscan circuit Interface circuit encoder type rotary switch Built-in oscillation circuit (external Built-in Power-On-Reset circuit Package: 64-pin plastic (QFP64-P-1420-1.00-BK) Product name: MSM9223GS-BK 1/24 Semiconductor MSM9223 BLOCK DIAGRAM SEG1 SEG27 GRID1 GRID2 GRID3 D-GND (5V) VREG (5V) L-GND Regulator Power Reset Segment Driver Grid Driver in1-27 Out1-27 Segment Control in1-27 in1-27 Mode Select in1-3 Out1-27 Segment Latch in1-27 Out1-27 Segment Latch in1-27 Out1-27 Segment Latch in1-27 CLOCK DATA Control Out1-3 3bit Shift Register Out1-27 27bit Shift Register in1-10 Dimming Latch Out1-10 OSCO 10bit Digital Dimming SYNC OUT1 DUP/TRI Timing Generator SYNC OUT2 6ch, 8bit Converter Scan Encoder Switch Interface COL1 COL5 ROW1 ROW5 2/24 Semiconductor MSM9223 CONFIGURATION (TOP VIEW) SEG21 SEG20 SEG19 SEG18 SEG24 SEG23 SEG22 SEG17 SEG25 SEG26 SEG27 GRID1 GRID2 GRID3 ROW1 ROW2 ROW3 ROW4 ROW5 D-GND DUP/TRI OSCO L-GND DATA COL1 COL2 COL3 COL4 COL5 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 VREG CLOCK SYNC OUT2 SYNC OUT1 connection 64-pin Plastic 3/24 Semiconductor MSM9223 DESCRIPTIONS Symbol D-GND L-GND VREG SEG1 Type Power supply pins. Pin1 pin51 should connected externally. D-GND ground driver circuit. L-GND ground logic circuit. Pins should connected externally. output internal logic portion external logic circuit. Reference voltage (5V) output converter. Segment (anode) signal output pins tube. These pins directly connected tube. External circuit required. Segment (anode) signal output pins tube. SEG20 These pins directly connected tube. External circuit required. Inverted Grid signal output pins. GRID1 pre-driver, external circuit requiend. CLOCK DATA Chip Select input pin. Data input/output operation valid when this High level. Serial clock input pin. Data input and/or output through DATA rising edge serial clock. Description Serial data input/output pin. Data input comes from shift register rising edge serial clock. Interrupt signal output microcontroller. When matrix pressed released, scanning started. After completion cycle, this goes high level keeps high level until keyscan stop mode selected. Duplex/Triplex operation select input pin. DUP/TRI Duplex (1/2 duty) operation selected when this level. Triplex (1/3 duty) operation selected when this level. Analog voltage input 8-bit converter. Input encoder type rotary switch. Each input chattering absorption function 620ns typical. Return inputs from matrix. These pins active low. When matrix inactive sate, these pins high level through internal pull-up resistors. inputs have cahttering absorption function keyscans. switch scanning outputs. Normally level output through these pin. When switch matrix COL1 ROW1 depressed released, scanning started continued until keyscan stop mode selected. When keyscan stop mode selected, outputs ROW1 back level. 4/24 Semiconductor MSM9223 Symbol Type Dimming pulse output. Description Connect this slave side pin. Synchronous signal input. Connect these pins SYNC SYNC pins slave side. oscillator connecting pins. Connect resistor (R2) between OSC0 pins, SYNC OSC0 capacitor (C2) between OSC0 GND, OSC0 capacitor (C3) between GND. stabilization. 5/24 Semiconductor MSM9223 ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Input Voltage Power Dissipation Storage Temperature Symbol TSTG Output Current Condition 85°C SEG1 SEG20 GRID1 OUT, SYNC OUT1, SYNC OUT2 Rating -0.3 -0.3 +6.0 +150 -10.0 +2.0 -20.0 +2.0 -7.0 +20.0 -2.0 +2.0 Unit RECOMMENDED OPERATING CONDITIONS Parameter Driver Supply Voltage High Level Input Voltage Level Input Voltage Clock Frequency Oscillation Frequency Frame Frequency Operating Temperature Symbol fOSC Condition inputs except OSC0 inputs except OSC0 10kW±5%, 27pF±5% 10kW±5% 27pF±5% Duty Duty Min. Typ. 13.0 Max. 18.5 Unit 6/24 Semiconductor MSM9223 ELECTRICAL CHARACTERISTICS Characteristics (Ta=-40 +85°C, VDD=8.0 18.5V) Parameter High Level Input Voltage Level Input Voltage High Level Input Current Level Input Current Symbol Applied IIH1 IIH2 IIL1 IIL2 VOH1 VOH2 High Level Output Voltage VOH3 VOH4 VOL1 Level Output Voltage VOL2 VOL3 VOL4 Supply Current Supply Voltage Logic SEG1 SEG20 GRID1 SEG1 SEG20 GRID1 VDD=9.5V VDD=9.5V Condition VIH=3.8V VIH=3.8V VIL=0.0V VIL=0.0V IOH1=-5mA IOH2=-10mA IOH3=-5mA IOH4=-200mA Output Open IOL1=500mA IOL2=500mA IOL3=10mA IOL4=300mA fOSC=3.3MHz, load C3=0.01mF±10%, IO=0 -10mA Min. -5.0 -100 -5.0 -300 VDD-0.8 VDD-0.8 VDD-0.8 Max. +5.0 -5.0 +5.0 Unit CLOCK, DATA DUP/TRI, COL1 CLOCK, DATA DUP/TRI, COL1 DATA I/O, INT, OUT, SYNC OUT1, SYNC OUT2 DATA I/O, INT, OUT, SYNC OUT1, SYNC OUT2, ROW1 7/24 Semiconductor Characteristics MSM9223 (Ta=-40 +85°C, VDD=8.0 18.5V) Parameter Clock Frequency Clock Pulse Width Data Setup Time Data Hold Time Time Setup Time (CS-Clock) Hold Time (Clock-CS) DATA Output Delay Time (Clock-DATA I/O) Output Slew Rate Time Rise Time Time Wait Time Symbol tCSL tCSS tCSH tPRZ tPOF tRSOFF CL=100pF Condition R2=10kW±5%, C2=27pF±5% tR=20% tF=80% Min. Max. Unit Mounted unit Mounted unit, VDD=0.0V 8/24 Semiconductor MSM9223 TIMING DIAGRAM Data Input Timing tCSS 1/fC CLOCK DATA (INPUT) VALID VALID VALID VALID tCSH tCSL -3.8V -0.8V -3.8V -0.8V -3.8V -0.8V Data Output Timing tCSS tCSH CLOCK DATA (OUTPUT) -3.8V -0.8V -3.8V -0.8V -3.8V -0.8V Reset Timing tPRZ tRSOFF tPOF -0.8VDD -0.0V -3.8V -0.0V Driver Output Timing SEG1-27, GRID1-3 -0.8VDD -0.2VDD 9/24 Semiconductor Converter Characteristics MSM9223 +85°C, 18.0 Parameter Conversion Accuracy Reference Voltage (VREG) Output Current Input Voltage Range Conversion Time/Channel Condition 10kW±5%, 27pF±5% Min. Typ. Max. VREG Unit Keyscan Characteristics +85°C, 18.0 Parameter Keyscan Cycle Time Keyscan Pulse Width Condition 10kW±5%, 27pF±5% 10kW±5%, 27pF±5% Min. Typ. Max. Unit Keyscan Timing Keyscan Cycle Time ROW1 Keyscan Pulse Width ROW2 ROW3 ROW4 ROW5 10/24 Semiconductor Output Timing (Duplex Operation) (The dimming data 1016/1024) *1bit time=4/fOSC MSM9223 2048bit times display cycle) GRID1 1016bit times 8bit times GRID2 1016bit times D-GND GRID3 3bit times SEG1-27 1019bit times 5bit times 1019bit times 5bit times 1019bit times 1019bit times 5bit times SYNC OUT1 1019bit times 1029bit times 5bit times SYNC OUT2 1029bit times 1019bit times 5bit times 1019bit times 5bit times 1019bit times 5bit times 1019bit times 5bit times 1029bit times 5bit times 5bit times L-GND L-GND L-GND 5bit times 5bit times D-GND D-GND 1016bit times 8bit times 8bit times D-GND Output Timing (Triplex Operation) (The dimming data 1016/1024) *1bit time=4/fOSC 3072bit times display cycle) GRID1 1016bit times 8bit times 8bit times D-GND GRID2 1016bit times 8bit times D-GND 5bit times D-GND 5bit times D-GND GRID3 3bit times SEG1-27 1019bit times 5bit times 1019bit times 5bit times 1019bit times 1019bit times 5bit times SYNC OUT1 1019bit times 1029bit times 5bit times SYNC OUT2 1029bit times 1019bit times 1016bit times 5bit times 1019bit times 5bit times 1019bit times 5bit times 1019bit times 5bit times 1019bit times 5bit times 5bit times L-GND L-GND L-GND 11/24 Semiconductor Output Timing (Duplex Operation) (The dimming data 64/1024) *1bit time=4/fOSC MSM9223 2048bit times display cycle) GRID1 64bit times 960bit times GRID2 64bit times D-GND GRID3 3bit times 957bit times SEG1-27 67bit times 957bit times 67bit times 957bit times SYNC OUT1 67bit times 957bit times SYNC OUT2 1981bit times 67bit times 1981bit times 957bit times 1981bit times L-GND 67bit times 957bit times 67bit times 957bit times L-GND 67bit times 957bit times 67bit times 957bit times L-GND 957bit times 67bit times 957bit times 957bit times D-GND D-GND 960bit times 64bit times 960bit times D-GND Output Timing (Triplex Operation) (The dimming data 64/1024) *1bit time=4/fOSC 3072bit times display cycle) GRID1 64bit times 960bit times 960bit times 64bit times 960bit times D-GND GRID2 D-GND 64bit times 957bit times 67bit times D-GND 957bit times 67bit times D-GND GRID3 3bit times 957bit times SEG1-27 67bit times 957bit times 67bit times 957bit times SYNC OUT1 67bit times 957bit times SYNC OUT2 1981bit times 67bit times 1981bit times 957bit times 67bit times 957bit times 67bit times 957bit times 957bit times 957bit times 67bit times 957bit times 67bit times L-GND L-GND L-GND 12/24 Semiconductor MSM9223 FUNCTIONAL DESCRIPTION Power-on Reset When power turned MSM9223 initialized internal power-on reset circuit. status internal circuit after initialization follows: contents shift registers latches "0". digital dimming duty cycle "0". segment outputs level. grid outputs High level. outputs level. output level. Data Input Output Data input output through DATA-I/O valid only when High level. input data DATA shifted into shift register rising edge serial clock. data automatically loaded latches when level. 10-bit dimming data D10) 27-bit segment data S27) used inputting dimming data display data. transfer these data, mode data must sent after each these data succeddingly. output data from DATA output from shift register rising edge serial clock. MSM9223 outputs 48-bit (6ch 8bits) data (A11 A68) 29-bit data (S11 S55, Q3). receive these data, mode data mast sent first then must once level again High level. Then inputting serial clocks, these data output from DATA pin. When level, DATA returns input pin. stop keyscan, only mode data must sent. After mode data transfer, scanning stopped immediately. Mode Data MSM9223 seven function modes. function mode selected mode data M2). relation between function mode mode data follows: FUNCTION MODE OPERATING MODE Segment Data GRID1-3 Input Segment Data GRID1 Input Segment Data GRID2 Input Segment Data GRID3 Input Digital Dimming Data Input Keyscan Stop Switch Data Output Data Output FUNCTION DATA 13/24 Semiconductor MSM9223 Segment Data Input [Function Mode: MSM9223 receives segment data when function mode selected. same segment data transferred segment data latch correspond GRID same time when function mode selected. segment data transferred only segment data latch that selected mode data, when function mode selected. Segment output (SEG1 becomes High level when segment data High level. [Data Format] Input Data bits Segment Data bits Mode Data bits Input Data Segment Data (27bits) Mode Data (3bits) [Bit correspondence between segment output segment data] Segment data Segment data 14/24 Semiconductor MSM9223 Digital Dimming Data Input [Function Mode: MSM9223 receives digital dimming data when function mode selected. output duty changes range 0/1024 (0%) 1016/1024 (99.2%) each grid. 10-bit digital dimming data input from LSB. [Data Format] Input Data bits Digital Dimming Data: bits Mode Data bits Input Data Digital Dimming Data (10bits) Mode Data (3bits) (MSB) (LSB) Dimming Data Duty Cycle 0/1024 1/1024 1015/1024 1016/1024 1016/1024 1016/1024 15/24 Semiconductor MSM9223 Keyscan Stop [Function Mode: MSM9223 stops scanning when function mode selected. select this mode, only mode data needed. actual time range between receipt keyscan stop command ceasing scanning 2.4ms 3.6ms [Input Data Format] Input Data Mode Data Input Data bits bits Mode Data (3bits) Switch Data Output [Function Mode: MSM9223 output switch data when function mode selected. select this mode, only mode data needed. When MSM9223 recieves this mode, DATA changed output pin. 29-bit switch data come from DATA synchronizing with rise edge clock. When level, DATA returns input pin. R1=0, implies Right rotation knob (Clockwise) R1=1, implies Left rotation knob (Counter Clockwise) Contact Count bits (LSB) (MSB) [Input Data Format] Input Data Mode Data Input Data bits bits Mode Data (3bits) [Output Data Format] Output Data bits push swithc Data bits Encoder switch Data bits Output Data Output Data i=ROW1 j=COL1 Sij=1 Switch Sij=0 Switch 16/24 Semiconductor MSM9223 Data Output [Function Mode: MSM9223 output data when function mode selected. select this mode, only mode data needed. When MSM9223 recieves this mode, DATA changed output pin. 48-bit data come from DATA synchronizeing with rise edge clock. When level, DATA returns input pin. [Input Data Format] Input Data Mode Data Input Data bits bits Mode Data (3bits) [Output Data Format] Output Data Data Output Data Output Data Output Data bits bits (LSB) (MSB) (MSB) (LSB) (LSB) (MSB) (LSB) (MSB) (LSB) (MSB) (LSB) (MSB) 17/24 Semiconductor MSM9223 rotary encoder switch function. figure shows, rotary encoder switch circuit consisted Phase detection, Interrupt generation, Up/down counter, Direction latch Parallel-in serial-out shift register. Phase Detection DOWN Interrupt Generation UP/DOWN Counter Direction Latch P-in/S-out Shift Registor Output data Fig.1 Rotary Encoder Switch Circuit Phase detection 1-1) Clockwise input have chattering absorption circuit 620ns (typ.). When signal input fig. phase detection circuit outputs signal after chattering absorption period. this time, output also goes high level, this signal used interrupt. stays High level until switch data-output mode selected. chattering absorption time (internal) Fig.2 Input Output Timing Case Clockwise. 18/24 Semiconductor MSM9223 1-2) counter clockwise When signal input fig. phase detection circuit outputs Down signal after chattering absorption period. this time, output also goes High level. stays High level until switch data-output mode selected. chattering absorption time DOWN (internal) Fig.3 Input Output Timing Case Counter Clockwise. UP/DOWN COUNTER When UP/DOWN COUNTER input counts when input DOWN, counts down. overcounte "111" occurs UP/DOWN COUNTER stays "111". Fig.4 Direction latch When Direction latch input DOWN output goes "1". pulse input counts value change plus value, output goes "0". Fig.5 19/24 Semiconductor MSM9223 P-in/S-out shift resistor When switch data output mode selected goes data send shift resistor, up/down counter reset signal goes "L". Data ROW1 ROW2 ROW5 Rotary CLOCK When goes up/down counter reset goes "L". Fig.6 20/24 Semiconductor MSM9223 Keyscan Keyscanning started only when depression release detected order minimize noise caused scanning signal. Then, keyscanning continued until keyscan stop mode sent from microcomputer. goes high level completion 1-cycle scanning after keyscan start, (high level) signal sent from used interrupt signal. [Keyscan Timing] Cycle Depress/Release Keyscan stop mode selected. Note: Keyscanning cannot stopped selecting keyscan stop mode only once keyscanning started after depression release detected, then depressed released again before keyscan stop mode selected. stop keyscanning, required select keyscan stop mode once again. Depress Depress Release Keyscan Keyscan MODE5 MODE5 Keyscan stop MODE5 MODE5 21/24 Semiconductor Circuit duplex tube with segments Grid Anode) APPLICATION CIRCUITS SEG1 SEG27 GRID1 GRID2 GRID3 VDISP SEG1 SEG32 GRID1 GRID2 GRID3 MSM9223 VDISP DUP/TRI VREG matrix ROW1 COL1 MSM9210 (SLAVE) DUP/TRI Duplex Tube Microcontroller SYNC SYNC DATA CLOCK OSC0 L-GND SYNC SYNC DATA CLOCK L-GND SYNC SYNC MSM9223 22/24 Semiconductor Circuit triplex tube with segments Grid Anode) SEG1 SEG27 GRID1 GRID2 GRID3 VDISP SEG1 SEG32 GRID1 GRID2 GRID3 MSM9223 VDISP VREG matrix ROW1 COL1 DUP/TRI Microcontroller MSM9210 (SLAVE) DUP/TRI Triplex Tube SYNC SYNC DATA CLOCK OSC0 L-GND SYNC SYNC DATA CLOCK L-GND SYNC SYNC MSM9223 23/24 Semiconductor MSM9223 PACKAGE DIMENSIONS (Unit QFP64-P-1420-1.00-BK Mirror finish Package material Lead frame material treatment Solder plate thickness Package weight Epoxy resin alloy Solder plating more 1.25 TYP. Notes Mounting Surface Mount Type Package SOP, QFP, TSOP, SOJ, (PLCC), surface mount type packages, which very susceptible heat reflow mounting humidity absorbed storage. Therefore, before perform reflow mounting, contact Oki's responsible sales person product name, package name, number, package code desired mounting conditions (reflow method, temperature times). 24/24 E2Y0002-29-62 NOTICE information contained herein change without notice owing product and/or technical improvements. Before using product, please make sure that information being referred up-to-date. outline action examples application circuits described herein have been chosen explanation standard action performance product. When planning product, please ensure that external conditions reflected actual circuit, assembly, program designs. When designing your product, please product below specified maximum ratings within specified operating ranges including, limited operating voltage, power dissipation, operating temperature. assumes responsibility liability whatsoever failure unusual unexpected operation resulting from misuse, neglect, improper installation, repair, alteration accident, improper handling, unusual physical electrical stress including, limited exposure parameters beyond specified maximum ratings operation outside specified operating range. Neither indemnity against license third party's industrial intellectual property right, etc. granted connection with product and/or information drawings contained herein. responsibility assumed infringement third party's right which result from thereof. products listed this document intended general electronics equipment commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products authorized system application that requires special enhanced quality reliability characteristics system application where failure such system application result loss damage property, death injury humans. Such applications include, limited traffic automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, life-support systems. Certain products this document need government approval before they exported particular countries. purchaser assumes responsibility determining legality export these products will take appropriate necessary steps their expense these. part contents contained herein reprinted reproduced without prior permission. MS-DOS registered trademark Microsoft Corporation. Copyright 1999 Electric Industry Co., Ltd. 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