Dual VCXO Clock Generator Features Description Dual pha

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Dual VCXO Clock Generator Features Description Dual pha

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FS6209
Dual VCXO Clock Generator
Features
Description
Dual phase-locked loop (PLL) device output clock frequencies On-chip tunable voltage-controlled crystal oscillator (VCXO) allows precise system frequency tuning 3.3V supply voltage Small circuit board footprint (8-pin 0.150 SOIC) Custom frequency selections available contact your local Sales Representative more information
Figure Configuration
XTUNE
XOUT CLKB CLKA
FS6209 monolithic CMOS clock generator designed minimize cost component count digital video/audio systems. core FS6209 circuitry that implements voltage-controlled crystal oscillator when external resonator (nominally 13.5MHz) attached. VCXO allows device frequencies precisely adjusted systems that have frequency matching requirements, such digital satellite receivers. high-resolution phase-locked loops generate output clocks (CLKA CLKB) through array postdividers. frequencies ratiometrically derived from VCXO frequency. locking output frequencies together eliminate unpredictable artifacts video systems reduce electromagnetic interference (EMI) frequency harmonic stacking.
8-pin (0.150) SOIC
Figure Block Diagram
FS6209
Table Crystal Output Frequencies
DEVICE FS6209-01 fXIN (MHz) 13.5 CLKA (MHz) 54.0000 CLKB (MHz) 22.5792
(+1.12ppm)
NOTE: Contact custom frequencies
VCXO XOUT XTUNE DIVIDER ARRAY
CLKA
CLKB
FS6209
American Microsystems, Inc. reserves right change detail specifications required permit improvements design products.
ISO9001
2.28.02
FS6209
Dual VCXO Clock Generator
Table Descriptions
Key: Analog Input; Analog Output; Digital Input; Input with Internal Pull-Up; Input with Internal Pull-Down; Digital Input/Output; DI-3 Three-Level Digital Input, Digital Output; Power/Ground; Active
TYPE
NAME XTUNE CLKA CLKB XOUT VCXO Feedback Power Supply (+3.3V) VCXO Tune Ground Clock Output Clock Output Ground VCXO Drive
DESCRIPTION
Functional Block Description
Phase-Locked Loop (PLL)
on-chip PLLs standard frequency- phaselocked loop architecture. multiplies reference oscillator desired frequency ratio integers. frequency multiplication exact with zero synthesis error.
Voltage-Controlled Crystal Oscillator (VCXO)
VCXO provides tunable, low-jitter frequency reference rest FS6209 system components. Loading capacitance crystal internal FS6209. external components (other than resonator itself) required operation VCXO. Continuous fine-tuning VCXO frequency accomplished varying voltage XTUNE pin. total change (from extreme other) effective loading capacitance nominal. When using crystal with VCXO, important that crystal load capacitance specified Table Operating Conditions matched load capacitance presented VCXO. crystal must specified with correct load capacitance obtain maximum tuning range.
oscillator operates crystal resonator parallel-resonant mode. Crystal warping, "pulling" crystal oscillation frequency, accomplished altering effective load capacitance presented crystal oscillator circuit. actual amount that changing load capacitance alters oscillator frequency will dependent characteristics crystal well oscillator circuit itself. Specifically, motional capacitance crystal (usually referred crystal manufacturers C1), static capacitance crystal (C0), load capacitance (CL) oscillator determine warping capability crystal oscillator circuit. simple formula obtain warping capability crystal oscillator
ppm)
where extremes applied load capacitance. EXAMPLE: crystal with following parameters used. With 0.02pF, 5pF, 10pF, 22.66pF, coarse tuning range
0.02 (22.66 22.66
ISO9001
2.28.02
FS6209
Dual VCXO Clock Generator
Electrical Specifications
Table Absolute Maximum Ratings
Stresses above those listed under Absolute Maximum Ratings cause permanent damage device. These conditions represent stress rating only, functional operation device these other conditions above operational limits noted this specification implied. Exposure maximum rating conditions extended conditions affect device performance, functionality, reliability.
PARAMETER Supply Voltage (VSS ground) Input Voltage, Output Voltage, Input Clamp Current, VDD) Output Clamp Current, VDD) Storage Temperature Range (non-condensing) Ambient Temperature Range, Under Bias Junction Temperature Lead Temperature (soldering, 10s) Input Static Discharge Voltage Protection (MIL-STD 883E, Method 3015.7)
SYMBOL
MIN. VSS-0.5 VSS-0.5 VSS-0.5
MAX. VDD+0.5 VDD+0.5
UNITS
CAUTION: ELECTROSTATIC SENSITIVE DEVICE
Permanent damage resulting loss functionality performance occur this device subjected high-energy electrostatic discharge.
Table Operating Conditions
PARAMETER Supply Voltage Ambient Operating Temperature Range Crystal Resonator Frequency Crystal Resonator Motional Capacitance Crystal Loading Capacitance SYMBOL fXTAL C1(xtal) CL(xtal) Fundamental Mode CONDITIONS/DESCRIPTION 3.3V MIN. 13.5 TYP. MAX. UNITS
ISO9001
2.28.02
FS6209
Dual VCXO Clock Generator
Table Electrical Specifications
Unless otherwise stated, 3.3V 10%, load output, ambient temperature range 70°C. Parameters denoted with asterisk represent nominal characterization data production tested specific limits. Where given, characterization data from typical. Negative currents indicate current flows device.
PARAMETER Overall Supply Current, Dynamic, with Loaded Outputs Supply Current, Static Voltage Controlled Crystal Oscillator Crystal Loading Capacitance Crystal Resonator Motional Capacitance VCXO Tuning Range VCXO Tuning Characteristic Crystal Drive Level Crystal Oscillator Feedback (XIN) Threshold Bias Voltage High-Level Input Current Low-Level Input Current Crystal Oscillator Drive (XOUT) High-Level Output Source Current Low-Level Output Sink Current Clock Outputs (CLKA, CLKB) High-Level Output Source Current Low-Level Output Sink Current Output Impedance Short Circuit Source Current Short Circuit Sink Current
SYMBOL
CONDITIONS/DESCRIPTION
MIN.
TYP.
MAX.
UNITS
fXTAL 13.5MHz; 10pF, 3.6V 3.6V
CL(xtal) C1(xtal)
seen crystal connected XOUT VXTUNE 1.65V)
fXTAL 13.5MHz; CL(xtal) 20pF; C1(xtal) 25fF
ppm/V
Note: positive positive RXTAL=20; 20pF
V(XIN) 3.3V, V(XIN) 3.3V
-0.5
IOSH IOSL
2.0V 0.4V 0.1VDD; output driving high 0.1VDD; output driving shorted 30s, max. 3.3V; shorted 30s, max.
ISO9001
2.28.02
FS6209
Dual VCXO Clock Generator
Table Timing Specifications
Unless otherwise stated, 3.3V 10%, load output, ambient temperature range 70°C. Parameters denoted with asterisk represent nominal characterization data production tested specific limits. Where given, characterization data from typical.
PARAMETER Overall VCXO Stabilization Time Stabilization Time Synthesis Error Clock Output (CLKA) Duty Cycle Jitter, Period (peak-peak) Jitter, Long Term (y()) Rise Time Fall Time Clock Output (CLKB) Duty Cycle Jitter, Period (peak-peak) Jitter, Long Term (y()) Rise Time Fall Time
SYMBOL
CONDITIONS/DESCRIPTION
CLOCK (MHz)
MIN.
TYP.
MAX.
UNITS
tVCXOSTB tPLLSTB
From power valid From VCXO stable (unless otherwise noted Frequency Table)
Ratio high pulse width measured from rising edge next falling edge VDD/2) clock period
54.00 54.00 54.00
tj(P) tj(LT)
From rising edge next rising edge VDD/2, 10pF From 0-500µs VDD/2, 10pF compared ideal clock source 3.3V; 0.3V 3.0V; 10pF 3.3V; 3.0V 0.3V; 10pF
Ratio high pulse width measured from rising edge next falling edge VDD/2) clock period
22.579 22.579 22.579
tj(P) tj(LT)
From rising edge next rising edge VDD/2, 10pF From 0-500µs VDD/2, 10pF compared ideal clock source 3.3V; 0.3V 3.0V; 10pF 3.3V; 3.0V 0.3V; 10pF
Figure VCXO Range Tuning Voltage
ISO9001
2.28.02
FS6209
Dual VCXO Clock Generator
Package Information
Table 8-pin SOIC (0.150") Package Dimensions
DIMENSIONS INCHES MIN. 0.061 0.004 0.055 0.013 0.0075 0.189 0.150 0.230 0.010 0.016 MAX. 0.068 0.0098 0.061 0.019 0.0098 0.196 0.157 0.244 0.016 0.035 MILLIMETERS MIN. 1.55 0.102 1.40 0.33 0.191 4.80 3.81 5.84 0.25 0.41 MAX. 1.73 0.249 1.55 0.49 0.249 4.98 3.99 6.20 0.41 0.89
BASE PLANE RADII: 0.005" 0.01"
AMERICAN MICROSYSTEMS, INC.
SEATING PLANE
typ.
0.050
1.27
Table 8-pin SOIC (0.150") Package Characteristics
PARAMETER Thermal Impedance, Junction Free-Air 8-pin 0.150" SOIC Lead Inductance, Self Lead Inductance, Mutual Lead Capacitance, Bulk SYMBOL CONDITIONS/DESCRIPTION flow Corner lead Center lead lead adjacent lead lead TYP. 0.27 UNITS °C/W
ISO9001
2.28.02
FS6209
Dual VCXO Clock Generator
Ordering Information
DEVICE NUMBER PACKAGE TYPE 8-pin (0.150") SOIC (Small Outline Package) 8-pin (0.150") SOIC (Small Outline Package) OPERATING TEMPERATURE RANGE 70°C (Commercial) 70°C (Commercial) SHIPPING CONFIGURATION Tape Reel Tubes
ORDERING CODE
11640-801 11640-811
FS6209-01 FS6209-01
Copyright 1999 American Microsystems, Inc.
Devices sold covered warranty patent indemnification provisions appearing Terms Sale only. makes warranty, express, statutory implied description, regarding information forth herein regarding freedom described devices from patent infringement. makes warranty merchantability fitness purposes. reserves right discontinue production change specifications prices time without notice. AMI's products intended commercial applications. Applications requiring extended temperature range, unusual environmental requirements, high reliability applications, such military, medical life-support life-sustaining equipment, specifically recommended without additional processing such applications.
American Microsystems, Inc., 2300 Buckskin Rd., Pocatello, 83201, (208) 233-4690, (208) 234-6796, Address: http://www.amis.com E-mail: tgp@amis.com
ISO9001
2.28.02

Dual VCXO Clock Generator Features Description Dual pha

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