S3040 evaluation board provides flexible platform verifying operation

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S3040 evaluation board provides flexible platform verifying operation

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OC-48 CLOCK RECOVERY UNIT EVALUATION BOARD OC-48 CLOCK RECOVERY UNIT EVALUATION BOARD DESCRIPTION
S3040 evaluation board provides flexible platform verifying operation AMCC OC-48 clock recovery units. This document provides information board contents layout. should used conjuction with S3040 data sheet, which contains full technical details chips operation. S3040 evaluation board factory configured with S3040 device, includes test point monitor LOCKDET output. board configured with either on-board crystal oscillator with external oscillator connected REFCLKP/N connectors.
EV3040 EV3040
ELECTRICAL CONNECTIONS
Power Connections
Terminal posts provided edge board allowing separate control voltage levels S3040 itself. serial input terminated chip, capacitive bypass ground provided board. operation with standard test equipment, board should operated below ground, with supply
Figure Evaluation Board View
S3040 (-5V) SERDATIP
0.01
SERCLKOP
S3040
0.01
SERCLKON
SERDATOP SERDATIN SERDATON
CRYSTAL OSCILLATOR (option) back)
REFCLKN
REFCLKP
LCKREFN BYPASS
1.0K
LOCKDET
August 1999
EV3040
OC-48 CLOCK RECOVERY UNIT EVALUATION BOARD
SET-UP JITTER MEASUREMENT
Figure depicts S3040 evaluation board connected jitter measurements, shows switch settings power supply requirements. connection from will used PK-PK jitter generation measurement Digital Sampling Oscilloscope (DSO). connection from will used jitter transfer, jitter tolerance jitter generation measurement transition analyzer.
Figure Jitter Test Setup
POWER VCC=GND -5.0V
70820A Transition Analyzer
INPUT INPUT
D.S.O.
CONNECTION
MEASUREMENT
PK-PK JITTER
3325
MAIN SIGNAL 0955-0731 0955-0731 Bandpass filter 2.488 Bandpass filter 2.488
JITTER TRANSFER JITTER TOLERANCE JITTER GENERATION
MODULATION INPUT
70841B
SERDATIP SERDATIN
SERCLKOP SERCLKON
70842B
B.E.R.T. (2.488 GHz)
S3040
SERDATOP SERDATON
B.E.R.T. (2.488 GHz)
SWITCH
SETTINGS
(0V)
(-5.0V)
LCKREFN
LCK/DATA DATA OUT/OFF VCO/OFF
LCK/REF DATA OUT/ON VCO/ON
8624B
REFCLK 155.52
BUFFER
REFCLKP REFCLKN
BYPASS USED
August 1999
OC-48 CLOCK RECOVERY UNIT EVALUATION BOARD
Table Power Connections Test Equipment Interface
Power Supply Nominal Input Voltage -5.0V Type Signal Output Termination
EV3040
Connectors
connectors provided differential serial data input/output signals output clock. Serial Data [SERDATIP/N] PECL Differential inputs. Clock recovered from transition these inputs. Reference Clock [REFCLKP/N] PECL Differential inputs. These inputs used establish initial operating frequency clock recovery also used standby clock absence data. These inputs must provided with differential clock 155.52 MHz. Serial Data [SERDATOP/N] outputs. This signal delayed version incoming data stream (SERDATI) updated falling edge Serial Clock (SERCLKOP). Serial Clock Output [SERCLKP/N] outputs. This signal phase aligned with Serial Data (SERDATOP). Lock Detect [LOCKDET] output. Indicates that Clock Recovery Unit (CRU) locked onto incoming data stream.
Switches
evaluation board equipped with switch control static control functions on-board device. both arrays (open "0") condition switch asserts logic assigned signal, (closed "1") condition asserts logic high. Figure shows particular switch settings that needed particular test case. Lock Reference [LCKREFN] Active Low. When active, serial clock output will forced lock local reference clock input [REFCLK]. Signal Detect [SDN] Active Low. Used indicate loss received optical power. Bypass Enable [BYPASS] Active High. Used bypass PLL.
August 1999
EV3040
Figure EV3040 Evaluation Board Schematic
OC-48 CLOCK RECOVERY UNIT EVALUATION BOARD
.1uf .1uf
10UF 100PF
PWRX2
.1uf .1uf
OSCECL
OUTN OUTP
.1UF
BYPASS
.1UF
100PF
avcc avee avee serdatiP serdatiN refclkP
.1UF 100PF
S3040
CAP1 CAP2
avee avcc cap1 cap2 refclkN lockrefN lockdet
dip4
1N4001 D(MELF)
.1uf
serclkoP serclkoN avee bypass serdatoP serdatoN
100pf
.1uf 100pf
BYPASS
1N4001 D(MELF)
.1UF 100PF .1UF 100PF
CAP2
CAP1
FILTER
August 1999
OC-48 CLOCK RECOVERY UNIT EVALUATION BOARD
Ordering Information
PREFIX DEVICE PACKAGE
EV3040
Evaluation Board
3040
TQFP
Prefix
XXXX Device
Package
Applied Micro Circuits Corporation 6290 Sequence Dr., Diego, 92121 Phone: (858) 450-9333 (800) 755-2622 Fax: (858) 450-9885 http://www.amcc.com
AMCC reserves right make changes products discontinue semiconductor product service without notice, advises customers obtain latest version relevant information verify, before placing orders, that information being relied current. AMCC does assume liability arising application product circuit described herein, neither does convey license under patent rights rights others. AMCC reserves right ship devices higher grade place those lower grade. AMCC SEMICONDUCTOR PRODUCTS DESIGNED, INTENDED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT APPLICATIONS, DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. AMCC registered trademark Applied Micro Circuits Corporation. Copyright 1999 Applied Micro Circuits Corporation
August 1999

S3040 evaluation board provides flexible platform verifying operation

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