EV3032 EV3032 S3032 evaluation board provides flexible platform v

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EV3032 EV3032 S3032 evaluation board provides flexible platform v

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SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD
EV3032 EV3032
S3032 evaluation board provides flexible platform verifying operation S3032 transceiver interface circuit. This document provides information board contents. should used conjunction with S3032 data sheet, which contains full technical details chips operation. Figure shows outline S3032 evaluation board. Figure shows block diagram S3032 evaluation board should connected test equipment Error Rate (BER) testing. Figure shows test setup measurements jitter testing.
Figure S3032 Evaluation Board View
TSDP
REFCLKP
REFCLKN
TTLREF
APPLIED MICRO CIRCUITS CORPORATION S3032 SONET/SDH/A0C-3/12 TRANSCEIVER WITH
POCLK PCLK TSDN PICLK PIN7 PIN6 PIN5 PIN4
AMCC
6290 SEQUENCE DIEGO, 92121
S3032
TSCLKN
PIN3 PIN2 PIN1 PIN0
POUT7:0 PIN7:0
TSCLKP
OPEN
(MODE JUMPERS)
SLPTIME
SDPECL
TESTEN
MODE1
MODE0
DLEB
LLEB
RSDP
RSDN
RSTB
September 1999
SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD
EV3032
Figure depicts S3032 evaluation board connected measurements, shows switch settings Level Shifted (LSECL) power supply requirements with test equipment that utilizes ground termination. this configuration S3032 configured with internal S3032 Clock Recovery Unit (CRU), using 19.44 reference operating STS-12.
Figure S3032 Error Rate (BER) Test Setup
S3032 TEST
BERT (622MHz)
DATA DATA CLOCK CLOCK
BERT
DATA CLOCK DATA
+1.2V +0.7V
S3032
RSDP 622MHz RSDN TSDP TSDN TSCLKP TSCLKN POWER SUPPLY
+0.2V
LSECL CONFIGURATION
-1.3v SWITCH SETTINGS: LLEB SDPECL DLEB TESTEN MODE1 MODE0 SLPTIME example 19.44MHz operation
REFCLKP
REFCLKN
TTLREF connected
HP8133 PULSE GENERATOR DIVIDER
(DIV 19.44MHz
September 1999
SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD
EV3032
Figure depicts S3032 evaluation boards connected measurements jitter testing, shows switch settings power supply requirements with test equipment that utilizes termination. switch settings STS-12 testing.
Figure S3032 Measurement Jitter Test Setup
BERT RX(622.08MHz) PRBS
TEKTRONIX JITTER ANALYZER SJ300 (622.08MHz) THRU DATA REFCLK MEASURE JITTER GENERATION JITTERED OUTPUT DATA
BERT (622.08MHz) 27-1 PRBS DATA PATTERN
CLOCK
DATA OUTPUT
CLOCK
DATA
INPUT CLOCK
CLOCK CLOCK
-3.3V S3032 DUT(TX) TSCLKN TSDP TSCLKP RSDP RSDN TSDN REFCLKN FF00 PRBS PATTERN DATA DATA
S3032 DUT(RX)
POUT POUT POUT POUT POUT POUT POUT POUT7
-3.3V
-3.3V LVECL BUFFER
RSDP RSDN
BERT TX(622.08MHz)
PICLK REFCLKP
POCLK REFCLKP REFCLKN
HP8133 DIVIDER (DIVIDE Provides Asynchronous Data POWER DIVIDERS NOTE: frequency (10-30Hz) reference clock must Jittered Scope CASCADE MICROTECH TERMINATOR VTT=-2.45V (155.52MHz)
-0.8 INPUT LEVEL -1.8
SWITCH SETTING
-3.3V LLEB SDPECL DLEB TESTEN MODE1 19.44MHz MODE0 OPERATION SLPTIME
MEASURE DATA Trigger
September 1999
SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD
ELECTRICAL CONNECTIONS Power Connections
EV3032
Terminal posts provided edge board VEE. S3032 evaluation board configured with ECL, PECL Level Shifted (LSECL) board configured operate with different types standard test equipment. Figures through demonstrate different types input output waveforms that S3032 evaluation board operate with different voltage settings Table Note I/O's voltage level will change non-standard levels when S3032 evaluation board powered different voltage. external test equipment environment other standard and/or +3.3V referenced systems interface S3032 evaluation board. board shown Figures through powered allow easy connection ground inputs high performance oscilloscopes spectrum analyzers well standard serial Error Rate Testers (BERT) jitter analyzers. Table illustrates nominal input voltages voltage levels shown Figures through Figures show that voltages track with VEE, Figure shows that voltages track with VCC.
Table Power Connections Test Equipment Interface
Power Supply Nominal Type Signal Input Voltage +3.3 -3.3 -1.3V LVPECL Output Termination VCC-2V
LVECL
LSECL
September 1999
SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD
Figure LVECL Signal Waveform
EV3032
LVECL -0.8V -1.3V -1.8V -3.3V Termination
Figure LSECL Signal Waveform
LSECL +1.2V +0.7V +0.2V -1.3V Termination
Figure LVPECL Signal Waveform
LVPECL +3.3V 2.5V 1.5V Termination (VCC -2V)
September 1999
SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD Connectors
EV3032
connectors provided differential serial data input/output signals output clock. Additional connectors provided optional differential serial input clock, external reference clock optional external Parallel Input clock. Receive Serial Data [RSDP/N] Differential LVPECL inputs. Serial data inputs S3032. Transmit Serial Data [TSDP/N] Differential LVPECL outputs. serial output data stream from transmitter section S3032. outputs drive PECL, ECL, ground terminated instrument inputs depending power supply voltages applied S3032 evaluation board. Transmit Clock Output [TSCLKP/N] Differential LVPECL outputs. transmit serial clock that used re-time TSDP/N signal. outputs drive PECL, ECL, ground terminated instrument inputs depending power supply voltages applied S3032 evaluation board. This clock will 622.08 155.52 MHz, depending operating mode. Reference Clock [REFCLKP/N] Differential LVPECL inputs. These inputs must provided with differential level (depending power supply voltages) clock 19.44 MHz, 38.8 MHz, 51.84 77.76 selected MODE[1:0] switches switch. This input must connected logic state (REFCLKP "1", REFCLKN TTLREF used. Reference Clock [TTLREF] LVTTL input. This input must provided with (swing levels dependent power supply voltages) clock 19.44 MHz, 38.88 MHz, 51.84 77.76 selected MODE[1:0] switches switch. This input must tied high REFCLKP/N used. Parallel Header Terminals parallel input PIN[7:0] output POUT[7:0] data from S3032 transceiver available header array right edge evaluation board. Ground columns also provided allow connection with 0.1" grid shielded ribbon cable parallel data sources data analyzers. User selectable jumpers also allow parallel output data POUT[7:0] output byte clock (POCLK) directly connected transmitter parallel data inputs PIN[7:0] parallel input clock (PICLK). Note: board must supplied with external reference REFCLKP/N proper operation. (See Figure Parallel Clock [PCLK] LVTTL output. word rate output reference from transmitter PLL. This output used coordinate byte-wide transfers parallel data bus. separate 4-pin header also provided control Connect (NC) MODE[1:0] switch setting. This allows S3032 evaluation board STS-3 mode with different reference voltages outlined S3032 data sheet. Connect (NC) obtained removing header shorting jumper. There these jumpers, each MODE[1:0] signal. proper operation least these jumpers must remain connected. separate 2-pin header provided additional signal identified below: Frame Pulse [FP] LVTTL output. Indicates frame boundaries incoming data stream (RSDP/N). SWITCHES evaluation board equipped with switch, control static control functions on-board devices. both arrays (open "0") condition switch asserts logic assigned signal, (closed "1") condition asserts logic high. Figures show particular switch settings that needed particular test case. RSTB Pushbutton Switch This momentary contact switch controls master reset S3032. Please refer S3032 data sheet details specific control functions. Normal mode this master reset input High. Depressing switch connects this input logic zero resets S3032.
September 1999
SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD
Figure S3032 Evaluation Board Schematic
POUT7 POUT6 POUT5 POUT4 POUT3 POUT2 POUT1 POUT0
EV3032
SLPTIME MODE0 MODE1 TESTEN
S3032
poclk
POCLK POUT7 POUT6 POUT5 POUT4 POUT3 POUT2 POUT1 POUT0
ttlref refclkn refclkp
piclk pin7 pin6 pin5 pin4 pin3 pin2 pin1 pin0 slptime mode0 mode1 testen
pclk
LLEB
pout7 pout6 pout5
s3032
cap2 cap1 lleb tsdp tsdn
tsclkn tsclkp sdpecl rsdp rsdn dleb rstb
pout4 pout3 pout2 pout1 pout0
RSDN
SDPECL
RSDP
DLEB
RSDN
MODE1
MODE0
SDPECL LLEB TESTEN DLEB
SLPTIME
RSDP
September 1999
SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD
Figure S3032 Evaluation Board Schematic
EV3032
10uf
10uf
S3032
pclkvcc
pclkgnd txcoregnd txcorevcc
ttlgnd
ttlvcc ttlvcc
avcc1 agnd1 agnd0 avcc0 txoutvcc
ttlgnd
s3032
ttlvcc
ttlgnd
rsclkgnd rsclkvcc rxcorevcc rxcoregnd
txoutgnd
rxavcc0 rxagnd0 rxagnd1 rxavcc1
September 1999
SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD
Table EV3032 Bill Materials
Count Component CC0805 0805 Pattern Value
EV3032
CC0805
0805
0.01
CC0805
0805
CC1206 D(MELF)
1206 D(MELF)
September 1999
SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD
Table EV3032 Bill Materials (Continued)
Count Component HDR9X4 HDRX1 Pattern Value HDR9X4 1206 BLM32A06
EV3032
JP1X2
1206 JP1X2
BLM32A06
PWR1X3 RC0805 RC0805 RC0805
0805 0805 0805
RES8 RES8 S3032 SMA-EDGE
RES8 RES8
S3032
SMA-EDGE
SW-NO
SW-NO
September 1999
SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD
Figures through show evaluation board layout.
EV3032
Figure
September 1999
SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD
Figure
EV3032
September 1999
SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD
Figure
EV3032
September 1999
SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD
Figure
EV3032
September 1999
SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD
Figure
EV3032
September 1999
SONET/SDH/AOC-12 TRANSCEIVER EVALUATION BOARD
Ordering Information
PREFIX DEVICE PACKAGE
EV3032
Evaluation Board
3032
PQFP
Prefix
XXXX Device
Package
Applied Micro Circuits Corporation 6290 Sequence Dr., Diego, 92121 Phone: (858) 450-9333 (800) 755-2622 Fax: (858) 450-9885 http://www.amcc.com
AMCC reserves right make changes products discontinue semiconductor product service without notice, advises customers obtain latest version relevant information verify, before placing orders, that information being relied current. AMCC does assume liability arising application product circuit described herein, neither does convey license under patent rights rights others. AMCC reserves right ship devices higher grade place those lower grade. AMCC SEMICONDUCTOR PRODUCTS DESIGNED, INTENDED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT APPLICATIONS, DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. AMCC registered trademark Applied Micro Circuits Corporation. Copyright 1999 Applied Micro Circuits Corporation
September 1999

EV3032 EV3032 S3032 evaluation board provides flexible platform v

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