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MC74AC646/74ACT646 consist registered transceiver circuits, with outpu


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MC74AC646, MC74ACT646 Octal Transceiver/Register with 3-State Outputs (Non-inverting)
MC74AC646/74ACT646 consist registered transceiver circuits, with outputs, D-type flip-flops control circuitry providing multiplexed transmission data directly from input from internal storage registers. Data will loaded into respective registers LOW-to-HIGH transition appropriate clock (CAB CBA). four fundamental data handling functions available illustrated Figures
PDIP-24 SUFFIX CASE SO-24 SUFFIX CASE 751E
Independent Registers Buses Multiplexed Real-Time Stored Data Transfers Choice True Inverting Data Paths 3-State Outputs Slim Dual In-Line Package Outputs Source/Sink ACT646 Compatible Inputs
REAL TIME TRANSFER REAL TIME TRANSFER
MARKING DIAGRAMS
PDIP-24 MC74AC646N AWLYYWW MC74ACT646N AWLYYWW
SO-24 AC646 AWLYYWW
Figure
Figure
STORAGE FROM REGISTER
TRANSFER FROM REGISTER
ACT646 AWLYYWW
Assembly Location Wafer Year Work Week
ORDERING INFORMATION
Device MC74AC646N MC74ACT646N MC74AC646DW MC74AC646DWR2 MC74ACT646DW MC74ACT646DWR2 Package PDIP-24 PDIP-24 SOIC-24 SOIC-24 SOIC-24 SOIC-24 Shipping Units/Rail Units/Rail Units/Rail 1000 Tape Reel Units/Rail 1000 Tape Reel
Figure
Figure
Semiconductor Components Industries, LLC, 2001
May, 2001 Rev.
Publication Order Number: MC74AC646/D
MC74AC646, MC74ACT646
ASSIGNMENT
A0-A7 B0-B7 CAB, SAB, DIR, FUNCTION Data Register Inputs Data Register Outputs Data Register Inputs Data Register Outputs Clock Pulse Inputs Transmit/Receive Inputs Output Enable Inputs
Figure Pinout: 24-Lead Packages Conductors (Top View)
Figure Logic Symbol
CHANNELS
OTHER CHANNELS NOTE: This diagram provided only understanding logic operations should used estimate propagation delays.
Figure Logic Diagram
MC74AC646, MC74ACT646
FUNCTION TABLE
Inputs A0-A7 Input Output Input Data I/O* Operation Function nction B0-B7 Input Input Output Isolation Store Data Real Time Data Stored Data Real Time Data Stored Data
*The data output functions enabled disabled various signals inputs. Data input functions always enabled; i.e., data pins will stored every LOW-to-HIGH transition appropriate clock inputs. NOTE: HIGH Voltage Level; Voltage Level; Immaterial; LOW-to-HIGH Transition
MAXIMUM RATINGS*
Symbol Vout Iout Tstg Parameter Supply Voltage (Referenced GND) Input Voltage (Referenced GND) Output Voltage (Referenced GND) Input Current, Output Sink/Source Current, Current Output Storage Temperature Value -0.5 +7.0 -0.5 +0.5 -0.5 +0.5 +150 Unit
*Maximum Ratings those values beyond which damage device occur. Functional operation should restricted Recommended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol Vin, Vout Supply Voltage Input Voltage, Output Voltage (Ref. GND) Input Rise Fall Time (Note Devices except Schmitt Inputs Input Rise Fall Time (Note Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current High Output Current Parameter ns/V ns/V Unit
from VCC; individual Data Sheets devices that differ from typical input rise fall times. from individual Data Sheets devices that differ from typical input rise fall times.
MC74AC646, MC74ACT646
CHARACTERISTICS
74AC Symbol Parameter +25°C Minimum High Level Input Voltage Maximum Level Input Voltage Minimum High Level Output Voltage Maximum Level Output Voltage IOZT Maximum Input Leakage Current Maximum 3-State Current Minimum Dynamic Output Current Maximum Quiescent Supply Current 2.25 2.75 2.25 2.75 2.99 4.49 5.49 0.002 0.001 0.001 74AC -40°C +85°C Unit Conditions
Guaranteed Limits 3.15 3.85 1.35 1.65 2.56 3.86 4.86 0.36 0.36 0.36 ±0.1 3.15 3.85 1.35 1.65 2.46 3.76 4.76 0.44 0.44 0.44 ±1.0 VOUT VOUT IOUT *VIN IOUT *VIN VCC, (OE) VIL, VCC, VCC, VOLD 1.65 VOHD 3.85
±0.6
±6.0
IOLD IOHD
*All outputs loaded; thresholds input associated with output under test. Maximum test duration output loaded time. NOTE: guaranteed less than equal respective limit VCC.
MC74AC646, MC74ACT646
CHARACTERISTICS (For Figures Waveforms Section Semiconductor FACT Data Book, DL138/D)
74AC Symbol Parameter VCC* tPLH tPHL tPLH tPHL Propagation Delay Clock Propagation Delay Clock Propagation Delay Propagation Delay Propagation Delay (w/An HIGH LOW) Propagation Delay (w/An HIGH LOW) Enable Time Enable Time Disable Time Disable Time Enable Time Enable Time Disable Time Disable Time +25°C 10.5 16.5 14.5 10.5 12.5 13.5 13.5 11.5 12.5 12.5 11.5 11.5 74AC -40°C +85°C 18.5 11.5 13.5 13.5 15.5 12.5 13.5 13.5 10.5 12.5 13.5 10.5 Unit Fig.
tPLH
tPHL
tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ
*Voltage Range ±0.3 Voltage Range ±0.5
MC74AC646, MC74ACT646
OPERATING REQUIREMENTS
74AC Symbol Parameter VCC* Setup Time, HIGH Clock Hold Time, HIGH Clock Clock Pulse Width HIGH -1.5 -0.5 +25°C 74AC -40°C +85°C Unit Fig.
Guaranteed Minimum
*Voltage Range ±0.3 Voltage Range ±0.5
CHARACTERISTICS
74ACT Symbol Parameter +25°C Minimum High Level Input Voltage Maximum Level Input Voltage Minimum High Level Output Voltage Maximum Level Output Voltage ICCT IOZT Maximum Input Leakage Current Additional Max. ICC/Input Maximum 3-State Current Minimum Dynamic Output Current Maximum Quiescent Supply Current 4.49 5.49 0.001 0.001 74ACT -40°C +85°C Unit Conditions
Guaranteed Limits 3.86 4.86 0.36 0.36 ±0.1 ±0.6 3.76 4.76 0.44 0.44 ±1.0 ±6.0 VOUT VOUT IOUT *VIN IOUT *VIN VCC, (OE) VIL, VCC, VCC, VOLD 1.65 VOHD 3.85
IOLD IOHD
*All outputs loaded; thresholds input associated with output under test. Maximum test duration output loaded time.
MC74AC646, MC74ACT646
CHARACTERISTICS (For Figures Waveforms Section Semiconductor FACT Data Book, DL138/D)
74ACT Symbol Parameter VCC* tPLH tPHL tPLH tPHL tPLH agation Propagation Delay Clock agation Propagation Delay Clock agation Propagation Delay agation Propagation Delay Propagation Delay (w/An HIGH LOW) Propagation Delay (w/An HIGH LOW) +25°C 12.0 12.0 14.5 14.5 11.0 11.0 74ACT -40°C +85°C 16.0 16.0 12.0 12.0 Unit Fig.
12.0
13.0
tPHL tPZH
12.0
13.0
Enable Time Enable Time tPZL Disable Time tPHZ Disable Time tPLZ Enable Time tPZH Enable Time tPZL Disable Time tPHZ Disable Time tPLZ *Voltage Range ±0.5
10.5 10.0
11.0 11.0 13.0 12.5 12.5 12.5 12.5 12.5
12.0 12.0 14.5 14.0 13.5 13.5 13.5 13.5
MC74AC646, MC74ACT646
OPERATING REQUIREMENTS
74ACT Symbol Parameter VCC* Setu Setup Time, HIGH Clock Hold Time, HIGH Clock Clock Pulse Width HIGH +25°C 74ACT -40°C +85°C Unit Fig.
Guaranteed Minimum
*Voltage Range ±0.5
CAPACITANCE
Symbol CI/O Input Capacitance Input/Output Capacitance Power Dissipation Capacitance Parameter Value Unit Test Conditions
MC74AC646, MC74ACT646
PACKAGE DIMENSIONS
PDIP-24 SUFFIX PLASTIC PACKAGE CASE 724-03 ISSUE
NOTES: CHAMFERED CONTOUR OPTIONAL. DIMENSION CENTER LEADS WHEN FORMED PARALLEL. DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: INCH.
SEATING PLANE
NOTE
0.25 (0.010)
0.25 (0.010)
INCHES 1.230 1.265 0.250 0.270 0.145 0.175 0.015 0.020 0.050 0.040 0.060 0.100 0.007 0.012 0.110 0.140 0.300 0.020 0.040
MILLIMETERS 31.25 32.13 6.35 6.85 3.69 4.44 0.38 0.51 1.27 1.02 1.52 2.54 0.18 0.30 2.80 3.55 7.62 0.51 1.01
SO-24 SUFFIX PLASTIC SOIC PACKAGE CASE 751E-04 ISSUE
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSIONS INCLUDE MOLD PROTRUSION. MAXIMUM MOLD PROTRUSION 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.13 (0.005) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION. MILLIMETERS 15.25 15.54 7.40 7.60 2.35 2.65 0.35 0.49 0.41 0.90 1.27 0.23 0.32 0.13 0.29 10.05 10.55 0.25 0.75 INCHES 0.601 0.612 0.292 0.299 0.093 0.104 0.014 0.019 0.016 0.035 0.050 0.009 0.013 0.005 0.011 0.395 0.415 0.010 0.029
0.010 (0.25)
0.010 (0.25)
SEATING PLANE
MC74AC646, MC74ACT646
Notes
MC74AC646, MC74ACT646
Notes
MC74AC646, MC74ACT646
Semiconductor trademarks Semiconductor Components Industries, (SCILLC). SCILLC reserves right make changes without further notice products herein. SCILLC makes warranty, representation guarantee regarding suitability products particular purpose, does SCILLC assume liability arising application product circuit, specifically disclaims liability, including without limitation special, consequential incidental damages. "Typical" parameters which provided SCILLC data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. SCILLC does convey license under patent rights rights others. SCILLC products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure SCILLC product could create situation where personal injury death occur. Should Buyer purchase SCILLC products such unintended unauthorized application, Buyer shall indemnify hold SCILLC officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that SCILLC negligent regarding design manufacture part. SCILLC Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment: Literature Distribution Center Semiconductor P.O. 5163, Denver, Colorado 80217 Phone: 303-675-2175 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com American Technical Support: 800-282-9855 Toll Free USA/Canada JAPAN: Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2700 Email: r14525@onsemi.com Semiconductor Website: http://onsemi.com additional information, please contact your local Sales Representative.
MC74AC646/D

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