The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.    


Datasheet Search Engine   
 
Part # or Description: • 5V RS232 Driver • 2SC5066* • "Real Time Clock" • "USB connector" • "blue led" 5mm • 10 watt zener diode • 2N3055* motorola
 
Search Tip: Try entering the part number only. Include a wildcard (eg. lm317* or 1n4148*)

 

 

Cost Clock Generator Pentium Based Designs with SDRAM Support. FR


Datasheet Thumbnail

  

Download PDF



Top Searches for this datasheet



SC653
Cost Clock Generator Pentium Based Designs with SDRAM Support.
FREQUENCY TABLE
tristate 66.6 tristate a.32 a.32 37.5 27.6 33.3
Supports Pentium, Cyrix CPU's. host (CPU) clocks additional SDRAM support. Optional common mixed supply mode (VDD VDDCPU 3.3V) (VDD 3.3V, VDDCPU 2.5V) skew buffers skew buffers buffer switching current SSOP package minimum board space
a.32 Asynchronous PCI.
CONNECTION DIAGRAM BLOCK DIAGRAM
XOUT REF1/S0 REF2/S2 PCI1 PCI2 PCI3 PCI4 PCI5 PCI6 MHz/S1 CPU1 CPU2 CPU3 CPU4 VDDCPU CPU5 CPU6 CPU7 CPU8 VDDCPU CPU9 CPU10 CPU11 CPU12
XOUT
REF2 REF1
PLL1
VDDCPU
CPU(1:12) PCI(1:6)
PLL2
48MHz 24MHz
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/16/97 Page
SC653
Cost Clock Generator Pentium Based Designs with SDRAM Support.
DESCRIPTION
Xin, Xout These pins form on-chip reference oscillator when connected terminals external parallel resonant crystal (nominally 14.318 MHz). also serve input externally generated reference signal. CPU(1:12) skew (<250 clock outputs host frequencies such CPU, Chipset, Cache, SDRAM, etc. CPU1-CPU4 voltage level controlled VDDCPU CPU5-CPU12 voltage level controlled VDDRM. these buffers have switching current 3.3V. PCI(1:6) skew (<250pS) clock outputs frequencies. These buffers voltage level controlled VDD. these outputs have switching current 3.3V. REF1/SO Bidirectional pin. power this input frequency select line (S0). When reaches rail, selection data latched this becomes buffered output on-chip reference. (see Fig.1) REF2/S2 Bidirectional pin. power this input frequency select line (S2). When reaches rail, selection data latched this becomes buffered output on-chip reference. (see Fig.1) 48MHz Output clock USB. 24MHz/S1 Bidirectional pin. power this input frequency select line (S1). When reaches rail, selection data latched this becomes buffered output clock. (see Fig.1) Circuit common ground. Circuit Power supply. VDDCPU 3.3V/2.5V logic level control CPU(1:12) outputs.
Power Supply
REF/S0 24MHz/S1 MHz/S2
Hi-Z (tristate), inputs
toggle outputs
Fig.1
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/16/97 Page
SC653
Cost Clock Generator Pentium Based Designs with SDRAM Support.
MAXIMUM RATINGS
This device contains circuitry protect inputs against damage high static voltages electric field; however, precautions should taken avoid application voltage higher than maximum rated voltages this circuit. proper operation, Vout should constrained range: VSS<(Vin Vout)<VDD Unused inputs must always tied appropriate logic voltage level (either VDD).
Voltage Relative VSS: Voltage Relative VDD: Storage Temperature: Ambient Temperature: Maximum Power Supply:
-0.3V 0.3V
ELECTRICAL CHARACTERISTICS
Characteristic Input Voltage Input High Voltage Output Voltage 12mA Output High Voltage 12mA Tri-State leakage Current Dynamic Supply Current Static Supply Current Short Circuit Current Symbol (PD) Units Conditions Outputs Outputs S0-S2 66.6 MHz, 33.3 output time seconds
VDDCPU 3.3V+5%,
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/16/97 Page
SC653
Cost Clock Generator Pentium Based Designs with SDRAM Support.
SWITCHING CHARACTERISTICS
Characteristic Output Rise (0.8V 2.0V) Fall (2.0V-0.8V) time Output Duty Cycle Offset Skew (CPU-CPU), (PCIPCI) Cycle-Cycles, Jitter Absolute, Symbol tTLH, tTHL tOFF tSKEW tjab Units Conditions Load outputs Measured 1.5V Load Measured 1.5V Load Measured 1.5V
+250
VDDCPU 3.3V+5%,
APPLICATION NOTES FREQUENCY SELECTION
Pins bidirectional pins used selecting output frequency (synchronous PCI) clocks. During power-up SC653, these pins input mode, therefore, they considered input select pins (see Fig.1, page2). three Jumper with resistor (50k) method implemented achieving selection shown Fig.2. There internal pullup pulldown selection lines, therefore, crutial that connection done external clock generator. Inputs should left floating. This approach allows larger resistor values used (50k instead other approach), placed close pins before dedamping resistor (Rd), therefore keeping levels minimum.
pins
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/16/97 Page
SC653
Cost Clock Generator Pentium Based Designs with SDRAM Support.
LAYOUT SUGGESTION
Island Plane Plane
IMISC653
(10µF)
VCC2
(10µF)
VCC1
This only layout recommendation lower EMI, designer choose distribute power through traces instead implemeting above method isolation through islands (dashed lines). case, should always used (0.1mF) placed close their pins. pairs (FB1,C3) (FB2, also used containments. designer choose different approach, least pair must used.
NOTES
POWER SUPPLY BYPASS CAPS (O.1µF) MUST POSITIONED CLOSE POSSIBLE PINS EFFECTIVE OTHER WISE HIGH FREQUNECY FILTERING CHARACTERISTICS THESE CAPS WILL CANCELLED LEAD INDUCTANCE TRACE CONNECTING CAP. CAPACITORS MUST LEAKAGE SUCH MULTILAYER CERAMIC MATERIAL WHICH ALSO RESULTS LOWER IMPEDANCE HIGH FREQUENCY.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/16/97 Page
SC653
Cost Clock Generator Pentium Based Designs with SDRAM Support.
PACKAGE DRAWING DIMENSIONS SSOP OUTLINE DIMENSIONS
INCHES SYMBOL
MILLIMETERS 0.104 0.0115 0.094 0.019 0.0125 0.711 0.299 0.410 0.016 0.040 0.100 2.46 0.127 2.29 0.35 0.23 17.81 7.42 10.16 0.25 0.61 2.16 2.56 0.22 2.34 0.41 0.25 17.93 7.52 1.016 10.31 0.33 0.81 2.36 10.41 0.41 1.02 2.54 2.64 0.29 2.39 0.48 0.32 18.06 7.59
0.097 0.0050 0.090 0.014 0.0091 0.701 0.292 0.400 0.10 0.024 0.085
0.101 0.009 0.092 0.016 0.010 0.706 0.296 0.040 0.406 0.013 0.032 0.093
ORDERING INFORMATION
Part Number IMISC653DYB Note:
Marking:
Package Type SSOP
Production Flow Commercial,
ordering part number formed combination device number, device revision, package style, screening shown below.
Example: SC653DYB Date Code,
IMISC653DYB Flow Commercial, Package SSOP Revision Device Number
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.4
6/16/97 Page

Other recent searches


SC140 - SC140   SC140 Datasheet
AN2072 - AN2072   AN2072 Datasheet
MK04-1A66C-650W - MK04-1A66C-650W   MK04-1A66C-650W Datasheet
MK04-1A71C-650W - MK04-1A71C-650W   MK04-1A71C-650W Datasheet
LP3972 - LP3972   LP3972 Datasheet
KBPC1000 - KBPC1000   KBPC1000 Datasheet
KBPC1010 - KBPC1010   KBPC1010 Datasheet
HF50-12S - HF50-12S   HF50-12S Datasheet
CXP740000 - CXP740000   CXP740000 Datasheet
CXP740056 - CXP740056   CXP740056 Datasheet
740096 - 740096   740096 Datasheet
740010 - 740010   740010 Datasheet
CV7673-O - CV7673-O   CV7673-O Datasheet
ARS-2037PU - ARS-2037PU   ARS-2037PU Datasheet
ADSP-21065L - ADSP-21065L   ADSP-21065L Datasheet

 

Privacy Policy | Disclaimer
© 2012 Datasheet Archive