Clock Generator DIMM, PentiumII Designs Supports PentiumTM, Penti
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SC643
Clock Generator DIMM, PentiumII Designs
Supports PentiumTM, PentiumPro Cyrix CPUs. clocks SDRAM clocks DIMs. synchronous clocks. Optional common mixed supply mode: (Vdd Vddq3 Vddq2 3.3V) (Vdd Vddq3 3.3V, Vddq2 2.5V) 250ps skew among SDRAM clocks. 250ps skew among clocks. 2-Wire serial interface Programmable registers featuring: Jumperless frequency selection enable/disable each output mode tri-state, test, normal Power Management Capability. IOAPIC clocks multiprocessor support. support 48-pin SSOP package
FREQUENCY TABLE (MHz)
61.8 83.3** 68.5 66.8 30.9 33.3** 34.25 27.5 37.5 33.4 62.4 78** 85.8** 69.5 83.3** 31.2 39** 42.8** 34.74 41.7** a.32
Reserved only Available 3.3V ambient only
CONNECTION DIAGRAM
REF0 XOUT Vddq3 PCI_F/ PCI0 PCI1 PCI2 PCI3 PCI4 Vddq3 PCI5 SDRAM11 SDRAM10 Vddq3 SDRAM9 SDRAM8 SDATA SDCLK Vddq2 IOAPIC REF1 CPU0 CPU1 Vddq2 CPU2 CPU3 SDRAM0 SDRAM1 Vddq3 SDRAM2 SDRAM3 SDRAM4 SDRAM5 Vddq3 SDRAM6 SDRAM7 48MHz Mode
BLOCK DIAGRAM
XOUT REF0 REF1 IOAPIC
VDDq2
(0:3) (0:5) PCI_F
PLL1
MODE
SDRAM(0:11)
Sdata Sdlck
PLL2
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.6
6/20/97 Page
SC643
Clock Generator DIMM, PentiumII Designs
DESCRIPTION
Xin, Xout These pins form on-chip reference oscillator when connected terminals external parallel resonant crystal (nominally 14.318 MHz). also serve input externally generated reference signal. REF0 Buffered output crystal. REF1 This bidirectional. MODE (default), then this REF1 buffered output crystal. MODE then this used power management mode synchronously stopping clocks (see page (0:3) skew (<250 clock outputs host frequencies such CPU, Chipset, Cache. Vddq2 supply voltage these outputs. SDRAM(0:11) Synchronous DRAM DIMs clocks, they have same frequency clocks. (2:4) skew (<250pS) clock outputs. PCI1 FTS, PCI0 PCI_F skew (<250pS) clock outputs. These pins bidirectional. During power-up, These pins inputs (FTS, used HARD selecting output frequency CPU, SDRAM clocks, Frequency table page1 page fig.3. When power reaches rail (See Fig.1, page3), selected data latched internally these pins become PCI1, PCI0 PCI_F clock outputs. PCI5 clock output. This bidirectional. MODE (default), then this PCI5 clock output. MODE then this used power management mode synchronously stopping clocks (see page IOAPIC This high drive buffered output crystal. This powered VDDq2. This bidirectional pin. During powerup, This input mode used selecting output frequency SDRAM clocks, Frequency table page1 page fig.3 jumper application; this internal pull-up. When power reaches rail (See Fig.1, page3), selected data latched internally this becomes output clock. MODE This bidirectional pin. During power-up, This input used enabling disabling default) power management pins page page fig.3 jumper application; this internal pull-up. When power reaches rail (See Fig.1, page selected data latched internally this becomes output clock. SDATA serial data 2-wire control interface. internal pull-up resistor. SDCLK serial clock 2-wire control interface. internal pull-up resistor.
Circuit Ground. Power supply analog circuit core logic. Vddq3 Power supply pins 3.3V pins. Vddq2 Power supply pins 2.5V/3.3V pins.
bypass capacitor (0.1µF) should placed close possible each Vdd, Vddq2, Vddq3 pin. these bypass capacitors close pins their high frequency filtering characteristic will cancelled lead inductances traces.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.6
6/20/97 Page
SC643
Clock Generator DIMM, PentiumII Designs
Power Supply
PCI_F PCI0 MODE PCI1
Hi-Z (tristate), inputs
toggle outputs
Fig.1
POWER MANAGEMENT FUNCTIONS
When MODE=0, pins inputs (PCI_STOP#), (CPU_STOP#), respectively (when MODE=1, these functions available). particular output enabled only when both serial interface these pins indicate that should enabled. IMISC643 clocks disabled according following table order reduce power consumption. clocks stopped state. clocks maintain valid high period transitions from running stopped. CPU/AGP clocks transition between running stopped waiting positive edge PCICLK_F followed negative edge clock interest, after which high levels output either enabled disabled. CPU_STOP# PCI_STOP# Frequency Table Frequency Table Frequency Table Frequency Table OTHER CLKs RUNNING RUNNING RUNNING RUNNING XTAL VCOs RUNNING RUNNING RUNNING RUNNING
Please note that clocks individually asynchronously enabled stopped 2-wire control interface. this case clocks stopped state.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.6
6/20/97 Page
SC643
Clock Generator DIMM, PentiumII Designs
POWER MANAGEMENT TIMING
PCICLK_F
PCI_STOP#
PCICLK(0:5)
CPU_STOP#
CPUCLK(0:3)
Fig.
2-WIRE CONTROL INTERFACE
2-wire control interface implements write only slave interface. IMISC643 cannot read back. Sub-addressing supported, thus preceeding bytes must sent order change control bytes. 2-wire control interface allows each clock output individually enabled disabled. During normal data transfer, SDATA signal only changes when SDCLK signal low, stable when SDCLK high. There exceptions this. high transition SDATA while SDCLK high used indicate start data transfer cycle. high transition SDATA while SDCLK high indicates data transfer cycle. Data always sent complete 8-bit bytes, after which acknowledge generated. first byte transfer cycle 7-bit address with Read/Write LSB. Data transferred first. IMISC643 will respond writes bytes (max) data address generating acknowledge (low) signal SDATA wire following reception each byte. IMISC643 will respond other control interface conditions. Previously control registers retained.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.6
6/20/97 Page
SC643
Clock Generator DIMM, PentiumII Designs
SERIAL CONTROL REGISTERS
NOTE: Pin# column lists affected number where applicable. @Pup column gives state true power Bytes values shown only true power when PWR_DWN# activated. Following acknowledge Address Byte (D2), additional bytes must sent: "Command Code byte, "Byte Count" byte. Although data (bits) these bytes considered "don't care", they must sent will acknowledged. After Command Code Count bytes have been acknowledged, below desrcibed sequence (Byte Byte Byte2, will valid acknowledged.
Byte Frequency, Function Select Register enable, Stopped) @Pup Pin# Description (for frequency table selection software I2C) (for frequency table selection software I2C) (for frequency table selection software I2C) (for frequency table selection software I2C) enables freq. selection hardware (set software (set Reserved future Spectrum Spread function Bit1 Bit0 Tri-State Reserved future Spectrum Spread function Reserved future Spectrum Spread function Normal
Function Table Function Description Tri-State Normal Outputs Hi-Z table Hi-Z table
SDRAM
Hi-Z
Hi-Z 14.318
IOAPIC Hi-Z 14.318
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.6
6/20/97 Page
SC643
Clock Generator DIMM, PentiumII Designs
SERIAL CONTROL REGISTERS (Cont.)
Byte CPU, SIO, Clock Register enable, Stopped) @Pup Pin# Description enable/Stopped enable/Stopped TEST mode. normal operation. Reserved CPUCLK3 enable/Stopped CPUCLK2 enable/Stopped CPUCLK1 enable/Stopped CPUCLK0 enable/Stopped
Byte Clock Register enable, Stopped) @Pup Pin# Description Reserved PCI_F S1enable/Stopped PCI5 enable/Stopped PCI4 enable/Stopped PCI3 enable/Stopped PCI2 enable/Stopped PCI1 enable/Stopped PCI0 enable/Stopped
Byte SDRAM Clock Register enable, Stopped @Pup Pin# Description SDRAM7 enable/Stopped SDRAM6 enable/Stopped SDRAM5 enable/Stopped SDRAM4 enable/Stopped SDRAM3 enable/Stopped SDRAM2 enable/Stopped SDRAM1 enable/Stopped SDRAM0 enable/Stopped
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.6
6/20/97 Page
SC643
Clock Generator DIMM, PentiumII Designs
SERIAL CONTROL REGISTERS (Cont.)
Byte Additional SDRAM Clock Register enable, Stopped) @Pup Pin# Description Reserved Reserved Reserved Reserved SDRAM11 enable/Stopped SDRAM10 enable/Stopped SDRAM9 enable/Stopped SDRAM8 enable/Stopped
Byte Peripheral Control enable, Stopped) @Pup Pin# Description Reserved Reserved Reserved IOAPIC enable/Stopped Reserved Reserved REF1 enable/Stopped REF0 enable/Stopped
Byte Reserved Register @Pup Pin# Description Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.6
6/20/97 Page
SC643
Clock Generator DIMM, PentiumII Designs
MAXIMUM RATINGS
This device contains circuitry protect inputs against damage high static voltages electric field; however, precautions should taken avoid application voltage higher than maximum rated voltages this circuit. proper operation, Vout should constrained range: VSS<(Vin Vout)<VDD Unused inputs must always tied appropriate logic voltage level (either VDD).
Voltage Relative VSS: Voltage Relative VDD: Storage Temperature: Ambient Temperature: Maximum Power Supply:
-0.3V 0.3V
ELECTRICAL CHARACTERISTICS
Characteristic Input Voltage Input High Voltage Input Current Input High Current Tri-State leakage Current Dynamic Supply Current Static Supply Current Short Circuit Current Symbol Isdd Units 66.6 MHz, 33.3 Unloaded output time seconds Conditions
VDDQ3 =3.3V ±5%, VDDQ2
SWITCHING CHARACTERISTICS
Characteristic Output Duty Cycle CPU/SDRAM Offset Skew (CPU-CPU), (PCIPCI), (SDRAM-SDRAM) Skew (CPU-SDRAM) Period Adjacent Cycles Jitter Spectrum Bandwidth from Center Overshoot/Undershoot Beyond Power Rails Ring Back Exclusion Symbol tOFF tSKEW1 tSKEW2 Vover VRBE +250 Units ohms source inch load note1 Conditions Measured 1.5V Load Measured 1.5V Load Measured 1.5V Load Measured 1.5V
VDDQ3 =3.3V ±5%, VDDQ2 =2.5
note Ring Back must enter this range. INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571 Rev.1.6 6/20/97 Page
SC643
Clock Generator DIMM, PentiumII Designs
TYPE BUFFER CHARACTERISTICS (0:3)
Characteristic Pull-Up Current Pull-Up Current Pull-Down Current Pull-Down Current Rise/Fall Time Between Rise/Fall Time Between Symbol TRFmin TRFmax -131 -183 Units Conditions Vout Vout 2.0V Vout Vout Load Load
VDDQ3 =3.3V ±5%, VDDQ2
TYPE BUFFER CHARACTERISTICS IOAPIC
Characteristic Pull-Up Current Pull-Up Current Pull-Down Current Pull-Down Current Rise/Fall Time Between Rise/Fall Time Between Symbol TRFmin TRFmax -131 -183 Units Conditions Vout Vout 2.0V Vout Vout Load Load
VDDQ3 =3.3V ±5%, VDDQ2
TYPE BUFFER CHARACTERISTICS REF0, REF1, 24MHZ, 48MHZ
Characteristic Pull-Up Current Pull-Up Current Pull-Down Current Pull-Down Current Rise/Fall Time Between Rise/Fall Time Between Symbol TRFmin TRFmax Units Conditions Vout Vout 2.0V Vout Vout Load Load
VDDQ3 =3.3V ±5%, VDDQ2
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.6
6/20/97 Page
SC643
Clock Generator DIMM, PentiumII Designs
TYPE BUFFER CHARACTERISTICS SDRAM(0:11)
Characteristic Pull-Up Current Pull-Up Current Pull-Down Current Pull-Down Current Rise/Fall Time Between Rise/Fall Time Between Symbol TRFmin TRFmax -134 -106 -188 -148 Units Conditions Vout Vout Vout Vout Load Load
VDDQ3 =3.3V ±5%, VDDQ2
TYPE BUFFER CHARACTERISTICS PCICLK(0:5,F)
Characteristic Pull-Up Current Pull-Up Current Pull-Down Current Pull-Down Current Rise/Fall Time Between Rise/Fall Time Between Symbol TRFmin TRFmax -134 -106 -188 -148 Units Conditions Vout Vout Vout Vout Load Load
VDDQ3 =3.3V ±5%, VDDQ2
APPLICATION NOTE SELECTION BIDIRECTIONAL PINS
Pins 26are bidirectional pins used selecting different functions this device (see description, Pages 2&3). During power-up SC643, these pins input mode (see Fig1, page3), therefore, they considered input select pins. Internal these pins have large value pull-up each (100K), therefore, selection default. selection desired, then direct connection ground through resistor should implemented shown Fig.3. Please note selection resistor (10K) placed before Damping resistor (Rd) close pin.
IMISC643 Pins load
Fig.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.6
6/20/97 Page
SC643
Clock Generator DIMM, PentiumII Designs
LAYOUT SUGGESTION
IMISC643
Island plane plane
22µF
VCC2
22µF
VCC1
22µF
This only layout recommendation best performance lower EMI. designer choose different approach C35, C36, C37, C38, C39and (all 0.1µf) should always used placed close possible their pins.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.6
6/20/97 Page
SC643
Clock Generator DIMM, PentiumII Designs
PACKAGE DRAWING DIMENSIONS SSOP OUTLINE DIMENSIONS
INCHES SYMBOL
MILLIMETERS 0.110 0.016 0.095 0.013 0.010 0.637 0.299 0.420 0.040 0.20 2.16 0.20 0.15 7.39 10.03 0.64 0.30 2.29 0.25 0.20 15.88 7.49 0.64 10.36 0.76 10.67 1.02 2.79 0.41 2.41 0.33 0.25 16.18 7.59
0.008 0.085 0.008 0.006 0.291 0.395 0.025
0.012 0.090 0.010 0.008 0.625 0.295 0.025 0.408 0.030
ORDERING INFORMATION
Part Number IMISC643AYB Note:
Marking:
Package Type SSOP
Production Flow Commercial,
ordering part number formed combination device number, device revision, package style, screening shown below.
Example: SC643AYB Date Code, Flow Commercial, Package SSOP Revision Device Number
IMISC643AYB
NOTE Purchase components International Microcircuits, Inc. sublicensed Associated Companies conveys license under Phillips Patent Rights these components system, provided that system conforms Standard Specification defined Phillips.
INTERNATIONAL MICROCIRCUITS, INC. COCHES MILPITAS, 95035. TEL: 408-263-6300. 408-263-6571
Rev.1.6
6/20/97 Page
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