110MHz, High Slew Rate, High Output Current Buffer HA-5002 monoli

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110MHz, High Slew Rate, High Output Current Buffer HA-5002 monoli

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HA-5002
110MHz, High Slew Rate, High Output Current Buffer
HA-5002 monolithic, wideband, high slew rate, high output current, buffer amplifier. Utilizing advantages Harris D.I. technologies, HA-5002 current buffer offers 1300V/µs slew rate with 110MHz bandwidth. ±200mA output current capability enhanced output impedance. monolithic HA-5002 will replace hybrid LH0002 with corresponding performance increases. These characteristics range from 3000k input impedance increased output voltage swing. Monolithic design technologies have allowed more precise buffer developed with more than order magnitude smaller gain error. HA-5002 will provide many present hybrid users with higher degree reliability same time increase overall circuit performance. military grade product, refer HA-5002/883 datasheet.
November 1996
Features
Voltage Gain 0.995 High Input Impedance 3000k Output Impedance Very High Slew Rate 1300V/µs Very Wide Bandwidth 110MHz High Output Current ±200mA Pulsed Output Current 400mA Monolithic Construction
Applications
Line Driver Data Acquisition 110MHz Buffer High Power Current Booster High Power Current Source Sample Holds Radar Cable Driver Video Products
Ordering Information
PART NUMBER (BRAND) HA2-5002-2 HA2-5002-5 HA3-5002-5 HA4P5002-5 HA7-5002-2 HA7-5002-5 HA9P5002-5 (H50025) HA9P5002-9 (H50029) TEMP. RANGE (oC) PACKAGE Metal Metal PDIP PLCC CERDIP CERDIP SOIC SOIC PKG. T8.C T8.C E8.3 N20.35 F8.3A F8.3A M8.15 M8.15
Pinouts
HA-5002 (PDIP, CERDIP, SOIC) VIEW HA-5002 (PLCC) VIEW
HA-5002 (METAL CAN) VIEW
V1(CASE)
V2NC
V1V2-
V113
CAUTION: These devices sensitive electrostatic discharge. Users should follow proper Handling Procedures. Copyright
Harris Corporation 1996
File Number
2921.2
3-297
HA-5002
Absolute Maximum Ratings
Voltage Between Terminals Input Voltage. V1Output Current (Continuous) ±200mA Output Current (50ms Off) ±400mA
Thermal Information
Thermal Resistance (Typical, Note (oC/W) (oC/W) CERDIP Package PDIP Package Metal Package PLCC Package SOIC Package Maximum Junction Temperature (Hermetic Packages, Note .175oC Maximum Junction Temperature (Plastic Packages, Note .150oC Maximum Storage Temperature Range -65oC 150oC Maximum Lead Temperature (Soldering 10s) 300oC (PLCC SOIC Lead Tips Only)
Operating Conditions
Temperature Range HA-5002-2. -55oC 125oC HA-5002-5. 75oC HA-5002-9. -40oC 85oC
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTES:
Maximum power dissipation, including load conditions, must designed maintain maximum junction temperature below plastic packages. ceramic packages, below
measured with component mounted evaluation board free air.
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS Offset Voltage Average Offset Voltage Drift Bias Current Input Resistance Input Noise Voltage Voltage Gain (VOUT ±10V)
VSUPPLY ±12V ±15V, 10pF, Unless Otherwise Specified TEST CONDITIONS TEMP (oC) Full Full Full Full 10Hz-1MHz Full ±15V ±12V Full Full Full 1VRMS, 10kHz 0.1% HA-5002-2 0.980 0.900 0.971 0.995 ±10.7 ±13.5 ±10.5 <0.005 20.7 0.06 0.22 0.980 HA-5002-5, 0.900 0.971 0.995 ±11.2 ±13.9 ±10.5 <0.005 20.7 0.06 0.22 UNITS µV/C µVP-P A/mA V/ns Degrees
TRANSFER CHARACTERISTICS
-3dB Bandwidth Current Gain OUTPUT CHARACTERISTICS Output Voltage Swing
1VP-P
Output Current Output Resistance Harmonic Distortion TRANSIENT RESPONSE Full Power Bandwidth (Note Rise Time Propagation Delay Overshoot Slew Rate Settling Time Differential Gain Differential Phase
±10V,
3-298
HA-5002
Electrical Specifications
PARAMETER POWER REQUIREMENTS Supply Current Power Supply Rejection Ratio NOTE: Slew Rate FPBW Full Full VSUPPLY ±12V ±15V, 10pF, Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP (oC) HA-5002-2 HA-5002-5, UNITS
Test Circuit Waveforms
+15V V1-15V V2OUT
FIGURE LARGE SMALL SIGNAL RESPONSE
VOUT
VOUT
SMALL SIGNAL WAVEFORMS
SMALL SIGNAL WAVEFORMS
VOUT
VOUT
LARGE SIGNAL WAVEFORMS
LARGE SIGNAL WAVEFORMS
3-299
HA-5002 Schematic Diagram
V1R2 V2Q2
Application Information
Layout Considerations wide bandwidth HA-5002 necessitates that high frequency circuit layout procedures followed. Failure follow these guidelines result marginal performance. Probably most crucial RF/video layout rules ground plane. ground plane provides isolation minimizes distributed circuit capacitance inductance which will degrade high frequency performance. Other considerations proper power supply bypassing keeping input output connections short possible which minimizes distributed capacitance reduces board space. Power Supply Decoupling optimal device performance, recommended that positive negative power supplies bypassed with capacitors ground. Ceramic capacitors ranging value from 0.01 0.1µF will minimize high frequency variations supply voltage, while frequency bypassing requires larger valued capacitors since impedance capacitor dependent frequency. also recommended that bypass capacitors connected close HA-5002 (preferably directly supply pins). Operation Reduced Supply Levels HA-5002 operate supply voltage levels lower. Output swing directly affected well slight reductions slew rate bandwidth.
Short Circuit Protection output current limited using following circuit:
OUTMAX OUTMAX
IOUTMAX 200mA (CONTINUOUS)
RLIM V2RLIM
Capacitive Loading HA-5002 will drive large capacitive loads without oscillation peak current limits should exceeded. Following formula Cdv/dt implies that slew rate capacitive load must controlled keep peak current below maximum current limiting approach shown. HA-5002 become unstable with small capacitive loads (50pF) certain precautions taken. Stability enhanced following: source resistance series with input increasing capacitive load 150pF greater; decreasing CLOAD 20pF less; adding output resistor adding feedback capacitance 50pF greater. Adding source resistance generally yields best results.
3-300
HA-5002
MAXIMUM POWER DISSIPATION TEMPERATURE (oC) QUIESCENT POWER DISSIPATION ±15V SUPPLIES SOIC PDIP
PLCC
JMAX DMAX Where: TJMAX Maximum Junction Temperature Device Ambient Junction Case Thermal Resistance Case Heat Sink Thermal Resistance Heat Sink Ambient Thermal Resistance Graph based JMAX DMAX
CERDIP
FIGURE FREE POWER DISSIPATION
Typical Application
+12V V1-12V VOUT V2V2+ VOUT
FIGURE COAXIAL CABLE DRIVER SYSTEM
Typical Performance Curves
VOLTAGE GAIN (dB) GAIN PHASE FREQUENCY (MHz) PHASE SHIFT 135o 180o ±15V, VOLTAGE GAIN (dB) PHASE FREQUENCY (MHz) 135o 180o PHASE SHIFT GAIN ±15V,
FIGURE GAIN/PHASE FREQUENCY
FIGURE GAIN/PHASE FREQUENCY
3-301
HA-5002 Typical Performance Curves
0.994 0.992 0.990 VOLTAGE GAIN (V/V) VOLTAGE GAIN (V/V) 0.988 0.986 0.984 0.982 0.980 0.978 0.976 0.974 TEMPERATURE (oC) 0.991 VOUT -10V +10V 0.996 0.995 0.994 0.993 0.992 VOUT -10V VOUT +10V ±15V 0.997
(Continued)
0.998 ±15V
TEMPERATURE (oC)
FIGURE VOLTAGE GAIN TEMPERATURE 100)
FIGURE VOLTAGE GAIN TEMPERATURE
±15V BIAS CURRENT (µA) TEMPERATURE (oC) TEMPERATURE (oC) ±15V
OFFSET VOLTAGE (mV)
FIGURE OFFSET VOLTAGE TEMPERATURE
FIGURE BIAS CURRENT TEMPERATURE
±15V, RLOAD SUPPLY CURRENT (mA)
±15V, IOUT
OUTPUT VOLTAGE
+VOUT
-VOUT
TEMPERATURE (oC)
TEMPERATURE (oC)
FIGURE MAXIMUM OUTPUT VOLTAGE TEMPERATURE
FIGURE SUPPLY CURRENT TEMPERATURE
3-302
HA-5002 Typical Performance Curves
IOUT 125oC, SUPPLY CURRENT (mA) IMPEDANCE -55oC 25oC 100K
(Continued)
±15V
1000
SUPPLY VOLTAGE (±V) ZOUT
100K
100M
FREQUENCY (Hz)
FIGURE SUPPLY CURRENT SUPPLY VOLTAGE
FIGURE INPUT/OUTPUT IMPEDANCE FREQUENCY
RLOAD PSRR (dB)
VOUT MAX, VP-P 100kHz
25oC 125oC, -55oC
SUPPLY VOLTAGE (±V)
100K
FREQUENCY (Hz)
100M
FIGURE VOUT MAXIMUM VSUPPLY
FIGURE PSRR FREQUENCY
1500 1400 SLEW RATE (V/µs) 1300 1200 1100 1000 SUPPLY VOLTAGE (±V)
VOUT (mV)
±15V 25oC
-100 -150 INPUT VOLTAGE (VOLTS)
FIGURE SLEW RATE SUPPLY VOLTAGE
FIGURE GAIN ERROR INPUT VOLTAGE
3-303
HA-5002 Characteristics
DIMENSIONS: mils mils mils 2050µm 2030µm 483µm METALLIZATION: Type: Thickness: PASSIVATION: Type: Nitride Thickness: SUBSTRATE POTENTIAL (Powered Up): V1TRANSISTOR COUNT: PROCESS: Bipolar Dielectric Isolation
Metallization Mask Layout
HA-5002
V1IN
(ALT) (ALT)
3-304

110MHz, High Slew Rate, High Output Current Buffer HA-5002 monoli

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