Overview Organization Update Format Packaged Circuit Data. FIT-rate Ca
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Reliability Update
Overview Organization Update Format Packaged Circuit Data. FIT-rate Calculations. Simplified Calculation Temperature Acceleration Factors Standard Temperature Acceleration Factor Tables Variability Reduction Plan Process Capability Indices Calculations.
0.35 micron cMOS, C3(x) Processes, volts
micron cMOS, C5(x) Processes, volts
micron cMOS, L5(x) Processes, volts.
micron cMOS, C6(x) Processes,
micron cMOS, C6(x) Processes,
micron cMOS, C8(x) Processes,
micron cMOS, CW(x) Processes,
micron cMOS, CY(x) Processes.
1.25 micron cMOS, CA(x) Processes.
micron cMOS, AB(x) Processes.
Thermal Cycling Durability. -55oC Thermal Shock
Humidity Immunity. Temperature Humidity Bias (85°C, 85%RH, static bias) unbiased hast (130°C, 85%RH) soak. Pressure Cooker Test (Autoclave 121°C, 100%RH, unbiased soak).
High Temperature Limitations Plastic Encapsulated Microcircuits (PEMs)
Metal Integrity. Metal Electromigration Al-Si-Cu Electromigration (1.2µ larger technologies) TiW/Al-Si-Cu/TiW Electromigration (1.0µ smaller technologies). TiW/Al-Si-Cu/TiW Electromigration (1.0µ smaller technologies). Metal Stress Voiding Stress Migration
Carrier Immunity Micron Transistors CW(x) Processes. Micron Transistors CY(x) Processes. 1.25 Micron Transistors CA(x) Processes. Micron Transistors AB(x) Processes
Gate Oxide Reliability.
List Tables
References
Glossary Failure Mechanisms Notations
Index.
latest information from internet, please www.amis.com/ru Should there questions should there need additional copies Update other publication), please contact your local Sales Office sales representative.
Overview
Reliability Update quarterly publication about reliability ASIC products produced AMI's manufacturing processes. Each edition contains quarter's results appended rolling database, thus historical document addition providing recent information. Wafer-level reliability data "packaged circuit" packaged-device) test data included update. Essentially these results have been generated using molded plastic packages. uses certain qualified contract assembly lines produce these molded plastic assemblies. Regardless which qualified assembly line used, bill materials same, listed Table
Organization Update
data base organized type stress. index provided help finding data about specific Semiconductor fabrication process specific molded plastic package, locating data size. Failure mechanism notations found these summaries explained glossary, though there some discussions failure mechanisms accompanying tabulations. Wafer-level reliability results summarized their sections Update, grouped according intrinsic reliability factor: interconnect, transistor, oxide lifetimes. Package-related data organized type stress package style, even though molded plastic package reliability dependent size. Operating life test results identified wafer fabrication process family. Several fabrication processes tested using step stress flow, such illustrated Figure Results from step stress evaluations also contained process sections. These flows provide complete view product reliability, from early life phase through end-of-life, wear-out, phase that imposed packaging. flow gets name from sequence increasing operating life stresses that chief feature. After initial electrical screening, test first subjected hours 125°C operating life. Most survivors continue life testing, increased stress 150°C operation. Similarly, most units that survived added hours 150°C Step continued another 1120 hours, Step with temperature "stepped further 175°C. central idea these flows derive stress acceleration factors from results Nevertheless, estimates product reliability made same fashion done with data produced conventional testing schemes. step stress flow been modified periodically. Some older processes will temperature-humidity-biased testing (85C/85%RH) instead HAST testing. Other changes will noted data summaries.
Format Packaged Circuit Data
illustrated Figure test results listed columnar format with specific product that tested identified left margin summary. Each record line corresponds single test that identified code line. Individual entries natural form reliability data; number failures found, over number units tested, time point ("TPi", point accumulated stress time when removed from stress electrically tested). Data generated step stress flows summarized step flow. Within each step, data listed same format illustrated Figure full identification given with Step listings. Only corresponding sequence number listed with each record line tabulations Steps
Table Molded Plastic Packaging Materials
package type SOIC PDIP PLCC PQFP less than lead TSOP Eftec C7025 Shinetsu KMC184H_ TQFP Eftec Sumitomo 7320C Large body PQFP lead C7025 Sumitomo 7304LC JM2500AN Nominally 80%Sn C7025 Lead Frame material C194 C194 C151 Sumitomo EME6300H_ Ablebond 84-1LMISR4 300-800 microinch solder plate Plastic Bond Wire Attach Lead Finish
125C LIFE
HOURS (OPTIONAL)
STANDARD PROCESS MONITOR
Individual traveller
125C LIFE HOURS 125C LIFE HOURS 125C LIFE HOURS 150C LIFE HOURS 150C LIFE HOURS 175C LIFE HOURS 175C LIFE HOURS 175C LIFE HOURS 175C LIFE 1120 HOURS
STEP STRESS
HAST HOURS HAST HOURS 175C BAKE HOURS 175C BAKE HOURS 175C BAKE HOURS 175C BAKE 1344 HOURS TEMP CYCLE CYCLES TEMP CYCLE CYCLES TEMP CYCLE 1008 CYCLES TEMP CYCLE 2016 CYCLES TEMP CYCLE 4032 CYCLES HAST HOURS HAST HOURS
HOURS HOURS HOURS 1152 HOURS
TP10
TP11
Figure
Standard Step Stress Flow
product number fabrication process size cumulative stress time time point test point) test line identified test tracking number and/or fabrication number
fail tested interval stress time
3250
(die size
PDIP (die size)
/320
/319
TPi-1 ri-1 ni-1 /319
/310
wear
TPi+1 ri+1/ni+1 /308
i.d. test test test
failure mechanism notation (explained glossary) package attach size package lead frame code
number failures period number units stressed interval from TPi-1
Figure
Format data summaries
FIT-rate Calculations
"FIT-rate" estimate reliability that calculated according formula
rate
where cumulative fractional failure, mortality, that occurred time some stress condition (i.e., accumulated number failures test sample units) defined equation (6), acceleration stress test conditions over those use. result usually expressed units FITs failures device-hours. Conventionally, this calculation based 1,000-hour, 125oC life test data, though FIT-rate number calculated stress time that desired. tedious calculation thermal acceleration factor from equation simplified using standardized temperatures, such described page acceleration, same value between standard temperatures. Time 105oC factor longer than time 1250C. Likewise, time 85oC factor longer than time 105oC and, therefore, factor longer than time 125oC. Thus, failures that occurred 1,000-hour, 125oC life test would occur 1,000 hours 70oC. Given activation energy, value found from Table calculated from equation (9). presumes that activation energy 1,000 (100.5)3 31,620 hours 70oC equivalent 1,000 hours 125oC. other hand assumed 0.425 1,000hour 1250C life test represents only 8,000 hours 70oC. Calculating FIT-rates from step stress data involves deciding which time point equivalent 1,000-hour, 125oC life test calculation cumulative fractional failure that point. range common activation energies listed Table this point step Reliability suggests taking hour, 150oC time point equivalent 1,000-hours 125oC activation energy value less than 0.674 used. activation energy larger than 0.674 assumed, hour time point 150oC life Step mortality, fractional failure accumulated from start stress total stress time TPi, given ik=1
FITs acronym Failures Time; FITs identical 0.01% failure 1,000 hours. Another figure merit that sometimes used MTBF. MTBF acronym Mean Time Before Failure. MTBF simply reciprocal FIT-rate.
This reduces simple well-known formula that mortality simply cumulative number failures divided number specimens start stress test, units were lost course stress testing (i.e., ni-1 ri-1). Using third line data Figure example, mortality TPi-1, mortality value unchanged. TPi, there were failures other units lost from test sample: 0.9556% This mortality value rewritten form equation (3), with effective sample size, neff= 313.924, defining neff neff
Though only mathematical construct, statistical meaning neff that same mortality would have been obtained sample about units been units were lost course testing. With step stress flows, units intentionally "lost" package related tests steps
Frequently, FIT-rates quoted confidence level e.g., FIT-rate confidence. This FIT-rate given equation (3), except that replaced one-half value inverse chi-squared distribution with 2x(r+1) degrees freedom, corresponding probability rate
conf
neff
Tables inverse chi-squared distribution found Handbook Mathematical Functions numerous standard statistics texts.
Simplified Calculation Temperature Acceleration Factors
Temperature acceleration customarily modeled Arrhenius relation. acceleration factor, ratio time "use" time "stress,"
stress
that affected elevated stress temperature, versus application temperature, given where activation energy, 8.617386x10-5 Boltzmann's constant, Kelvin temp.( 273.16)
Even though calculation performed most scientific calculator, tedious greatly simplified choosing temperatures that "standardized acceleration factor," between temperatures same between pair temperatures Then, temperatures defined relation
acceleration between adjacent temperatures same value, acceleration between every second temperature list Between every third, Between every mth, Table lists standard temperatures used AMI. Table correspondingly lists several convenient standard acceleration values their respective activation energy values corresponding standard temperatures Table III. Alternatively, given activation energy value, standard acceleration corresponding Table temperature list calculated
(1.6296)
other words, standard temperatures Table III,
1.6295
where Tj+1 next temperature below temperature Table III.
Standard Temperature Acceleration Factor Tables
where number standard temperatures counted from accelerated "stress" temperature "use" temperature vice versa). Table Table Standard temperatures 205°C 175°C 150°C 125°C 105°C 85°C 0.674 70°C 55°C 40°C 25°C 15°C 0.707 0.851 0.988 1.10 1.194 1.276 Some convenient standard acceleration values corresponding activation energies (eV) 0.213 0.337 0.425 0.494 0.55 1414 1732 2.236 2.45 3162
Locate "stress" temperature Table III. Count number table entries "use" temperature. stress temperature 150°C temperature 70°C count
Read standard acceleration from Table (this acceleration between subsequently listed temperatures Table III). 0.5505 2.45
acceleration given afm, where count. Acceleration 150°C over 70°C, 0.5505
Thus, failure mechanism with activation energy 0.55 hour 150°C equivalent hours 70°C
Wafer Level Reliability Program
implemented aggressive Wafer Level Reliability (WLR) program. This program complements traditional reliability testing while improving weaknesses traditional reliability testing quick feedback wafer fabrication facility concerning reliability issues comprehensive wafer level monitoring. nature AMI's ASIC business, focus product reliability improvement. AMI's business includes many different processes, many different design layout techniques, from standard products gate array standard cells, foundry. result need product independent assessment process line important. program meets this requirement. goal program improve reliability. This accomplished decreasing reliability process feedback time while providing wide variety structures monitor assess reliability concerns. With traditional reliability testing jeopardy material processed between start problem identification solution high because months takes complete cycle. With wafer level program, testing occurs wafer during process soon after finished. feedback time reduced days with corresponding reduction material jeopardy. Other benefits improvement accuracy feedback. Instead relying failure analysis have proper tools techniques find reliability problem, testing done specific structures targeted class defects. implementation program done using Scribe Line Monitor (SLM) structures placed scribe lines product wafers. This method provides nearly 100% coverage wafer line using consistent monitors from product product. components this program definition structures, layout structures SLM's, placement SLM's reticles, testing SLM's, analysis monitoring data. Definition structures occurs when reliability issue identified. Surveying several years Failure Analysis (FA) data indicates that unwanted current paths were large part reliability issues. These might inter-metal bridging intra-metal shorts, diode leakages, gate oxide leakages. result structures were targeted test these problems. example, inter-digitated metal bridging patterns over worst case steps used assess reliability jeopardy metal interconnect. placement these SLM's reticle sets occurs automatically when circuit data prepared reticle vendor. This step performed proprietary software which places predetermined scribe region product. This step transparent group generating circuit. data acquisition done using 4062c Parametric testers linked automatic wafer probers. This setup allows flexible sampling done needed sites wafer selected pattern tested. Different SLM's tested using different sampling plans required. present SLM's includes structures monitor: bridging, diode leakages, gate oxide integrity, plasma charging, contact integrity, carrier phenomena, critical dimensions poly metal layers, transistor matching, metal barrier integrity.
Variability Reduction Plan
purpose AMI's Variability Reduction Plan improve quality systematically continuously reducing variability Characteristics. This accomplished using Statistical Process Control (process capability, measurement capability, control charts) achieve maintain state statistical control, well more advanced statistical methods, such Design Experiments, provide insight processes improved. variation reduction plan focuses characteristics, which those features that have greatest impact quality reliability finished product. wafer fabrication, characteristics have been selected coincide with pass/fail parameters (electrical measurements finished wafers). parameters were selected since they define wafer-level acceptance criteria consist variables data from which process capability indices (Cpk's) calculated. After characteristics have been selected, control charts established measurement capability studies performed. control chart shows that process unstable, then efforts made identified remove special causes variation. Similarly, corrective action taken required measurement capability study. Once statistical control achieved, Cpk's calculated from control charts. characteristic with less than 1.33 must have Action Plan. summary these action plans included with data process sections. addition characteristics, measurements wafer fabrication process identified that contribute variation characteristics. These measurements called Process Parameters. Designed experiments particularly helpful identifying process parameters determining their optimal target values. Once process parameters selected, appropriate control charts established each parameter. control charts then used achieve maintain control about targeted value. Each these control charts Control Response Plan that provides instructions actions taken control situations.
Process Capability Indices
Process control charts separated into three categories: characteristics, process parameters, runs charts, defined below.
Characteristic:
Pass/fail parameters major processes (C8x, C6x, ABx, CAx, CWx, CYx,) defined characteristics. characteristics will have control charts control response plans. Cpk's characteristics will calculated reported Quarterly Reliability Update. characteristics with Cpk's less than 1.33 must have action plan. That action plan will summarized bottom chart individual processes. values characteristics several fabrication processes tabulated appropriate process section.
Process Parameter:
parameter that contributes variation characteristic. process parameters will have control charts control response plans, Cpk's will reported Quarterly Reliability Update.
Runs Chart:
measured characteristic which data recorded information only. data, displayed graphically, plotted runs chart.
Calculations wafer passes MAP, median wafer's measurements within specification limits. Therefore, only median reading from each wafer used calculation. Cpk's calculated using average/moving range/range control charts, with sample consisting median value from each wafers run. centerlines these three charts only numbers that required calculate Cpk. centerline average (RA) chart direct estimate process average, centerlines moving range range charts used calculation standard deviation.
Since spec limits refer wafers, sources variation must quantified: waferto-wafer run-to-run. wafer-to-wafer standard deviation estimated from centerline range chart shown below.
2.534
run-to-run standard deviation estimated from
where
1.128
Finally, total standard deviation found from
then calculated according standard equations,
min(C
Where lower upper specification limits, respectively. Notice that Cpk's determined centerlines control charts. Consequently, will only change when control chart recalculated.
C3(x) Process,
0.35µ cMOS, Single Poly, Triple Level Metal
Characteristics
Test m342 m362 m481 m353 m216 m1860 m1855 m347 m1807 m1858 m356 m457 m1799 m364 m363 m352 m516 m224 m460 m1816 m145 m137 m374 Description res_2 res_cnt vt_gm res_2 kprime_l isub_3.6 idsat_3.3 res_2 vt_gm idsat_3.3 res_2 vt_fld vt_gm res_cnt res_cnt res_2 vt_gm kprime_l vt_fld bvnpg gamma gamma bvpng res_via bvnpg Structure n+_res m1_n+ n20xn20 p+_res n20x20 n20x0.35 p20x0.35 npoly_res n20x0.35 n20x0.35 ppoly_res n_psi p20x0.35 m1_p+ m1_npoly nwell_fld p20x20 p20x20 p_psi n20x20 p20x20 n20x20 p20x20 n20x20 1.42 3.27 2.76 2.13 2.20 2.75 2.96 7.24 10.98 14.19 16.05 18.62 57.23 1.17 2.26 1.65 1.88 1.95 2.03 2.31 2.99 2.23 3.06 3.03 3.44 6.55 9.85 12.95 20.22 32.59 51.51 1.17 1.42 1.65 1.88 1.95 2.03 2.13 2.20 2.23 2.75 2.96 3.03 3.44 9.85 12.95 14.19 18.62 32.59 51.51 57.23
Process
0.35µ cMOS, Single Poly, Triple Level Metal,
Wafer Level Reliability Results
Bridging Test defective Poly_Lg Met1_Lg Met2_Lg Met3_Lg defective Diodes Diodes defective area field edge poly edge Defects/cm2 nMOS area pMOS area n+m1 p+m1 npolym1 ppolym1 via1 via2 Stacked Contacts n+m3_ring p+m3_ring Snapback (Hand probe) Barrier Integrity Volts minimum length Defective Diode Diode Values Limit Comments lots, sites/lot 1.0%
Diode Leakage
3.0%
lots, sites/lot
Vcjox Data
1.0% 2.0%
lots, sites/lot
Vcjox Area Data
Median 10.8 Median 23.5 18.7
Exceeds JEDEC latchup voltage
defects/cm2 Defective Defective
lots, ~200 sites/lot Defect Volts Total area
Contacts/Vias
0-15, 0-15, 0-15, 0-15, 0-10, 0-10,
lots sites/lot Defective
0-35,
lots sites/lot
wafer from lots
Process
0.35µ cMOS, Single Poly, Triple Level Metal, Test Junction Leakage fA/µ2 (Hand probe) Diode Diode Diode Junction Doubling Factors Diode (Hand probe) Diode Diode Passivation Defects/cm2 Integrity Values .015 .037 .102 7.65 8.00 9.23 cracks pinholes Limit Value fA/µ2 Comments Measurement
Value
defect/cm2
wafer from lots
Process
0.35µ cMOS, Single Poly, Triple Level Metal, 11487 Infant Mortality,
(8.94x6.68
84LPQFP
(425x425)
150°C Life 0/155 0/45 0/120 0/24 0/240 1/236
fct, single
qual start 0/120 0/24
i.d. seq. TA90085 TA90080 TA90078 TA90168 TA90160 TA90087 TA90158 TA90162 TA90221 TA90219 TA90217 TA90210 TA90251 TA90223 TA90271 TA90253 TA90300 TA90371 TA90418 TA90478 28258 28377 28377 28377 28377 28378 28378 28378 28119 28119 28119 28119 28120 28120 28921 28921 28919 28992 28259 28259
0/243 0/202 2/211
fct, single
0/244 0/209 0/144 0/651 0/48 0/144 0/48 1/360
fct, single column
0/144
0/72 0/408 0/302
0/72 0/240
Process
0.35µ cMOS, Single Poly, Triple Level Metal, 150°C Life 0/408 0/408 0/95 0/404 0/230 0/158 0/407 0/347 0/407 0/407 0/407 0/207 0/249 1/336
func, single col.
2/360
func fails
i.d. seq. TA90436 TA90467 TA90476 TA90471 TA90523 TA90525 TA90542 TA90550 TA90582 TA90623 TA90666 TA90668 TA90738 TA90744 TA90778 TA90780 TA90840 TA91765 28920 28993 28993 28992 28994 28919 28989 28920 30568 27726 27457 28071 28071 27727 27727 25335 33123 34841
0/230
0/263
0/144 0/200 0/196 0/476
0/195 0/476
Process,
0.5µ cMOS, Single Poly, Triple Level Metal, volt
micron cMOS, C5(x) Processes,
Features
Bulk optional Bulk Prog. Imp. Single Poly Salicide Double Poly, (Poly Polycide) Tungsten Plugs, vias contacts Single Metal (TiN-AlCu-Ti) Double Metal (Ti-AlCu-Ti) Triple Metal (Ti-AlCu-Ti) Ox-Nitr. Pass.
C5(x) Process,
0.5µ cMOS, Single Poly, Triple Level Metal, volt
Characteristics
Test M571 M570 M184 M162 M474 M342 M347 M216 M509 M375 M364 M224 M353 M352 M457 M363 M516 M481 M374 M137 M362 M145 M460 M804 Description Leff_I Leff_I IDsat_5 IDsat_5 Vt_gm Res_2 Res_2 Kprime_L Vt_gm BVdss Res_via Res_cnt Kprime_L Res_2 Res_2 Vt_fld BVnpg Res_cnt Vt_gm Vt_gm Res_via Gamma Res_cnt Gamma Vt_fld BVdss BVpng Isub_5.5 Size P20X0.6 N20X0.6 P20X0.6 N20X0.6 N20X0.6 N+_res Npoly_re N20X20 P20X0.6 N20X0.6 Via2 M1_P+ P20X20 P+_res Nwell_fl N_Psi N20X20 M1_npoly P20X20 N20X20 N20X20 M1_N+ P20X20 P_Psi P20X0.6 P20X20 N20X0.6 1.03 1.37 1.90 3.09 3.24 5.64 4.75 5.29 5.24 7.10 6.73 11.28 7.57 11.21 11.04 13.03 1.23 1.39 2.08 2.33 3.66 4.03 5.36 6.35 5.91 5.28 8.32 6.12 16.42 6.54 6.61 7.86 14.72 9.96 12.85 0.83 1.36 1.71 3.86 2.81 7.25 4.15 4.23 4.56 5.45 5.61 5.88 7.35 6.15 6.92 7.27 7.70 7.99 12.12 11.52 13.20 20.65 21.96 22.38 26.51 0.83 1.36 1.71 2.33 2.81 4.03 4.15 4.23 4.56 5.28 5.45 5.61 5.88 6.12 6.15 6.54 6.61 6.92 7.27 7.70 7.99 9.96 11.52 12.85 20.65 21.96 22.38 26.51
Process,
0.5µ cMOS, Single Poly, Triple Level Metal, volt
micron cMOS, L5(x) Processes,
Features
Bulk optional Bulk Prog. Imp. Single Poly Salicide Double Poly, (Poly Polycide) Tungsten Plugs, vias contacts Single Metal (TiN-AlCu-Ti) Double Metal (Ti-AlCu-Ti) Triple Metal (Ti-AlCu-Ti) Ox-Nitr. Pass.
L5(x) Process,
0.5µ cMOS, Single Poly, Triple Level Metal, volt
Characteristics
Test M1629 M1553 M1568 M1628 M342 M516 M216 M353 M347 M481 M137 M224 M352 M1632 M374 M375 M364 M460 M145 M457 M1642 M363 M362 Description LEFF_I LEFF_I VT_GM VT_GM RES_2 VT_GM KPRIME_L RES_2 RES_2 VT_GM GAMMA KPRIME_L RES_2 BVPNG BVDSS RES_VIA RES_VIA RES_CNT VT_FLD GAMMA VT_FLD ISUB_3.6 BVNPG RES_CNT RES_CNT Size P20X0.5 N20X0.5 N20X0.5 P20X0.5 N+_RES P20X20 N20X20 P+_RES NPOLY_RE N20X20 N20X20 P20X20 NWELL_FL P20X20 P20X0.5 VIA2 M1_P+ P_PSI P20X20 N_PSI N20X0.5 N20X20 M1_NPOLY M1_N+ 1.98 2.44 4.20 2.33 6.72 2.66 4.21 3.53 6.58 5.46 7.86 6.39 8.80 17.40 2.95 3.25 6.53 2.54 2.35 2.62 5.29 3.76 3.97 6.73 4.62 4.86 10.23 14.17 14.63 21.93 1.02 1.64 1.86 2.11 11.08 2.71 3.14 3.30 9.18 4.20 11.11 7.93 7.36 8.31 8.57 8.78 9.11 9.12 13.82 20.64 18.80 30.80 32.94 1.02 1.64 1.86 2.11 2.35 2.62 3.14 3.30 3.97 4.20 4.62 4.86 7.36 8.31 8.57 8.78 9.11 9.12 13.82 14.17 14.63 18.80 21.93 30.80 32.94
L5(x) Process,
0.5µ cMOS, Single Poly, Triple Level Metal, volt
Characteristics
Test M1628 M1553 M1629 M1634 M1568 M224 M363 M1631 M1632 M516 M481 M216 M137 M353 M347 M352 M342 M1571 M375 M374 M362 M460 M1642 M364 M457 M145 Description Vt_gm Leff_I Leff_I IDsat_3 Vt_gm Kprime_L Res_cnt IDsat_3 BVdss Vt_gm Vt_gm Kprime_L Gamma Res_2 Res_2 Res_2 Res_2 BVdss Res_via Res_via Res_cnt BVpng Vt_fld Isub_3.6 Res_cnt Vt_fld Gamma BVnpg Size P20x0.5 N20x0.5 P20x0.5 N20x0.5 N20x0.5 P20x20 M1_npoly P20x0.5 P20x0.5 P20x20 N20x20 N20x20 N20x20 P+_res Npoly_re Nwell_fl N+_res N20x0.5 Via2 M1_N+ P20x20 P_Psi N20x0.5 M1_P+ N_Psi P20x20 N20x20 2.66 1.56 1.68 2.28 2.42 6.68 5.37 5.39 4.99 5.43 10.55 8.06 19.96 4.05 1.28 1.78 1.74 3.10 1.84 7.62 3.47 6.14 4.82 5.01 9.51 7.47 14.55 14.75 34.41 1.27 1.84 1.59 2.81 1.75 11.51 2.68 3.12 3.39 7.30 3.83 6.03 16.09 5.61 6.52 6.61 7.31 7.78 8.41 8.67 10.13 10.26 11.84 11.89 25.16 1.27 1.28 1.59 1.74 1.75 1.84 2.68 3.12 3.39 3.47 3.83 4.82 5.01 5.61 6.52 6.61 7.31 7.47 7.78 8.41 8.67 10.13 10.26 11.84 11.89 14.55 14.75 34.41
L5(x) Process,
0.5µ cMOS, Single Poly, Triple Level Metal, volt
L5H,I Wafer Level Reliability Results
Bridging defective Test Poly_Lg M1_Lg M1M2_Lg M2_Lg M2M3_Lg M3_Lg NMOS1 PMOS1_b 0.23 0.87 0.08 0.51 0.17 0.55 Limit Comments 5.0V 10V, lots
%def 1.0%
Vcjox Defect Density /cm2 Isub_3.6 Electromigration (years)
n20x.5 flat step flat step via1 string contact stacked m1-n+ m1-n+ (poly ring) m1-p+ m1-p+ (poly ring) via1 via2 m1m3_ring n+m3_ringb polym3 n+diodes p+diodes
Isub<30
lots Structure, lots Structure, lots values, lots. fails. fails. fails. fails. fails. fails. fails.
>300 .01>10 33.6 30.2 99.1 229.8 3.81 1.41 5.27 30.7 24.6 0.0% 0.0% 0-80 0-80 0-250 0-250 0-10 0-10 0-10 0-100 0-80
Contacts/Vias Median Values
Stacked Contacts Median Values Diode Leakage defective
Worst case. Minimum dimensions. From Barrier Integrity Ambient Results.
L5(x) Process,
0.5µ cMOS, Single Poly, Triple Level Metal, volt Matching Test n-transistors N15x.5 N15x5 N15x15 N30x15 p-transistors P15x.5 P15x5 P15x15 P30x15 n20x.5 Diode Diode 0.7mV 0.0% 0.0% %def<3.0% after 450C Limit Comments Readings represent percentile percentile spread.
Snapback Volts Barrier Integrity Defective
Data taken from wafers There were defects ambient after 450C.
Process
0.5µ cMOS, Single Poly, Triple Level Metal, 11246 Infant Mortality,
(11.7x8.87
128LPQFP
(512x512)
150°C Life 0/104 0/112 0/81 0/60 0/62 0/41 0/56 0/55 0/163 0/66 1/90
metal short FI990309
i.d. seq. TB99401 TB99402 TB99707 TB99708 TA88003 TA88029 TA88100 TA88115 TA88111 TA88117 TA88278 TA88298 TA88334 TA88336 TA88367 TA88369 TA88371 TA88393 TA89339 TA89341 TA89930 19071 19071 19825 19826 19521 19825 20471 20559 20559 20382 21042 21044 21534 21523 21826 21826 21188 21522 21194 21031 27393
0/62 0/41 0/56 0/55 0/66 0/66 0/70 0/40
0/70 0/40
Process
0.5µ cMOS, Single Poly, Triple Level Metal, 150°C Life 0/43 0/104 0/47 0/23 0/31 0/138 0/132 0/49 0/133 0/65 0/130 0/112 0/70
0/43 0/104 1/47
NDF, FA990428
i.d. seq. TA89932 TA89921 TA90349 TA90361 TA90444 TA90480 TA90531 TA90625 TA90697 TA90824 TA90826 TA91693 TA91816 28037 A28239.2 A28990.1 A29621.2 A30397.3 A31262.1 A31577.1 A31882.2 A32928.3 A31965.1 A32176.2 A35255.1 A35355.1
0/23 0/31 0/138 0/132 0/49 0/133 0/65 0/129 0/112 0/70
Process
0.5µ cMOS, Single Poly, Triple Level Metal, 11246 Step Stress, STEP 125°C Life 0/168 0/168 STEP 150°C Life 140hrs 560hrs 0/84 0/104 0/84 0/104 (121°C 100%RH unbiased) 288hrs 576hrs 1152hrs
0/168 0/165
i.d. seq. TA89130 TA89420 TA89683 TA89912 TA89921 TA89934 TA90846 TA90931 TA91834 TA92094 TA92271 TA92434 TA94105 A22178 A22427 A24449 A27391 A28239.2 A28239.1 A28529 A33949 A34571 A36518 A38177 A38479 A40270
0/168 0/165
0/36
Process
0.5µ cMOS, Single Poly, Triple Level Metal, STEP STEP 140hrs 0/42 0/42 0/42 0/42 0/48 0/54 0/54 0/42 175°C Life 280hrs 560hrs 0/42 0/42 0/42 0/42 0/48 0/54 0/54 0/42 0/42 0/42 0/42 0/42 0/48 0/54 0/54 1120hrs 0/42 0/42 0/42 6/42
funct, cont
150°C Life 140hrs 560hrs 0/84 0/84 0/84 0/84 0/84 0/84 0/84 0/84 0/84 0/84 0/84 0/84
(121°C 100%RH unbiased) 288hrs 576hrs 1152hrs 0/36 0/36 0/36 0/36 0/36 0/36 0/36 2/36
cont
0/36 0/36 0/36 0/36
0/36 0/36 0/36 0/36
0/36 0/36 0/36 0/36
0/36 0/35
0/21 0/18 0/18 0/18 0/18 0/15 0/21
175°C Storage 0/21 0/18 0/18 0/18 0/18 0/15 0/21 0/18 0/18 0/18 0/18
0/48
micron cMOS, C6(x) Processes,
Features
Bulk optional Bulk Prog. Imp. Single Poly Polycide Double Poly, (Poly Polycide) Single Metal (TiN-AlCu-Ti) Double Metal (Ti-AlCu-Ti) Triple Metal (Ti-AlCu-Ti) Ox-Nitr. Pass.
C6(x) Characteristics
Test Description Size m570 m571 m516 m474 m481 m509 m347 m184 m362 m216 m342 m457 m353 m162 m374 m137 m224 m352 m145 m375 m460 Leff_I Leff_I Vt_gm Vt_gm Vt_gm Vt_gm Res_2 BVdss IDsat_5 Res_cnt Kprime_L Res_2 BVnpg Vt_fld Res_2 IDsat_5 Res_via Gamma Kprime_L Res_2 Gamma res_via Vt_fld BVpng N20X0.6 P20X0.6 P20X20 N20X0.6 N20X20 P20X0.6 npoly_re N20X0.6 P20X0.6 m1_N+ N20X20 N+_res N20X20 N_Psi P+_res N20X0.6 N20X20 P20X20 Nwell_Fl P20X20 via2 P_Psi P20X20 1.13 1.21 1.69 1.72 2.14 1.85 2.57 2.68 3.05 3.54 3.45 4.85 5.41 9.01 11.48 0.74 0.91 1.51 1.54 2.74 1.89 2.27 2.32 2.81 2.91 2.51 2.91 2.97 3.95 3.14 4.54 5.97 11.94 11.89 1.52 1.52 1.87 1.54 1.81 2.52 2.32 2.38 2.45 3.58 3.12 3.77 3.76 5.17 4.84 6.08 11.08 18.35 19.88 23.93 0.74 0.91 1.51 1.54 1.54 1.81 2.27 2.32 2.32 2.38 2.45 2.51 2.91 2.97 3.12 3.14 3.76 4.54 4.84 6.08 11.08 18.35 19.88 23.93
Process,
0.6µ cMOS, Single Poly, Triple Level Metal
10C6(x) Wafer Level Reliability results Test
Bridging Poly_lg M1_lg M2_lg M3_lg
Vcjox
Comments
lots
defective 1.0% 0.75% 0.60% 0.20% defects/cm2 nMOS pMOS lots defect
Carriers Isub n20x0.6 (µAmp/µm) Ring
(years)
1.85 years
Ring oscillator lifetime based frequency degradation.
Electromigration flat step flat step Metal Barrier n+pp+nSnapback n20x.8
years >500 years 4700 years years >1000 years
leaky
barrier
hour 450C bake 2.3% 3.8%
Volts volts
Passivation Integrity defects/cm2 wafers from lots
defects
micron cMOS, C6(x) Processes,
Features
Bulk optional Bulk Prog. Imp. Single Poly Polycide Double Poly, (Poly Polycide) High Resistance Poly Resistors Single Metal (TiW-AlSiCu-TiW) Double Metal (TiW-AlSiCu-TiW) Triple Metal (TiW-AlSiCu-TiW) Ox-Nitr. Pass.
Process,
0.6µ cMOS, Single Poly, Triple Level Metal
Characteristics
Test M571 M570 M342 M509 M360 M362 M516 M474 M184 M162 M216 M137 M353 M145 M481 M364 M457 M374 Description LEFF_I LEFF_I RES_2 VT_GM RES_2 RES_CNT VT_GM VT_GM IDSAT_5 IDSAT_5 KPRIME_L GAMMA RES_2 GAMMA VT_GM RES_CNT VT_FLD RES_VIA 1.35 2.11 2.28 3.48 2.29 3.16 2.71 3.15 3.24 3.81 4.01 4.36 4.51 4.63 5.76 11.8 NWELL_FL 9.71 N20X20 7.75 P_PSI P20X20 M1_SILIC VIA2 N20X0.6 Size P20X0.6 N20X0.6 N+_RES P20X0.6 SILIC_RE M1_N+ P20X20 N20X0.6 P20X0.6 N20X0.6 N20X20 N20X20 P+_RES P20X20 N20X20 M1_P+ N_PSI 1.93 1.97 2.74 2.88 3.25 2.86 3.93 3.16 4.75 3.77 4.38 4.55 5.06 4.87 2.51 1.35 1.83 1.83 3.20 2.28 2.29 2.29 4.20 2.29 2.36 2.36 2.56 2.56 5.15 2.71 3.18 3.15 6.27 3.24 3.74 3.74 4.75 4.01 4.74 4.36 5.61 4.51 5.11 4.63 4.74 4.74 5.76 5.95 5.95 7.55 10.22 11.07 13.64 32.13 48.48 7.55 7.75 10.22 11.07 13.64 32.13 48.48
M352 RES_2 M460 M371 M375 M804 BVNPG VT_FLD BVPNG RES_CNT RES_VIA ISUB_5.5
Process,
0.6µ cMOS, Double Poly, High resistance poly resistor, Double Level Metal
Characteristics
Test M1927 M1678 M474 M216 M1677 M570 M363 M1679 M571 M137 M509 M224 M162 M347 M374 M184 M516 M342 M481 M145 M353 M457 M362 M364 M460 M352 M804 Description Res_2 Res_2 VT_GM KPRIME_L LEFF_I Res_cnt Res_2 LEFF_I GAMMA VT_GM Kprime_L IDSAT_5 Res_2 RES_VIA IDSAT_5 VT_GM RES_2 VT_GM GAMMA RES_2 VT_FLD RES_CNT BVNPG RES_CNT BVdss VT_FLD BVPNG RES_2 ISUB_5.5 Size NPH10x20 NPH2x20 N20X0.6 N20X20 P1P2 N20X0.6 M1_Npoly NPC5x20 P20X0.6 N20X20 P20X0.6 P20x20 N20X0.6 Npoly_re P20X0.6 P20X20 N+_RES N20X20 P20X20 P+_RES N_PSI M1_N+ N20X20 M1_P+ P20x0.6 P_PSI P20X20 NWELL_FL N20X0.6 1.08 1.04 2.63 2.74 2.31 2.14 2.15 2.15 3.57 3.19 3.97 3.05 2.75 3.23 3.27 3.32 3.86 5.25 4.80 21.69 0.60 0.62 0.94 4.06 3.09 1.67 1.85 1.97 1.97 4.11 5.62 3.57 2.53 2.75 3.76 2.89 3.38 3.59 4.52 5.35 10.84 26.05 1.55 1.46 4.32 1.42 1.53 2.61 1.82 2.45 2.34 5.16 2.28 2.33 2.52 2.97 2.55 3.72 2.78 3.75 4.34 6.91 5.09 6.43 12.58 13.89 15.59 16.28 17.33 25.17 0.60 0.62 0.94 1.42 1.53 1.67 1.82 1.85 1.97 1.97 2.28 2.33 2.52 2.53 2.55 2.75 2.78 2.89 3.38 3.59 4.52 5.35 6.43 10.84 12.58 13.89 15.59 16.28 17.33 25.17
Process,
0.6µ cMOS, Single Poly, Triple Level Metal
9C6(x) Wafer Level Reliability results Test
Bridging Poly_lg M1_lg M2_lg M3_lg
Vcjox
1.80% 2.40% 0.25% 0.28% lots lots lots lots
Comments
defective
defects/cm2 nMOS pMOS lots
Carriers Isub n20x0.6 (µAmp/µm) Ring
(years)
years
Ring oscillator lifetime based frequency degradation.
Electromigration flat step flat step Snapback n20x.8
years years years years 9.51 years Volts volts
barrier
Passivation Integrity defects/cm2 wafers from lots
defects
Process,
0.6µ cMOS, Single Poly, Triple Level Metal 8730 Step Stress Monitor
(6.72x6.7
144LTQFP STEP
(335x335)
125°C Life 0/168 0/168 0/168 0/168 1/168
0/152 0/168 0/163 0/148 0/164 0/144 0/159 1/165
FI990170
i.d. seq. TA84822 TA84947 TA86687 TA86845 TA87237 TA87323 TA87488 TA87815 TA87986 TA88058 TA88161 TA88323 TA88505 TA88793 TA89111 64665A 63930 78940 13611 13097 14563 79514 17667 19560 18339 17281 16783 16212 20069 18947
0/154 0/168 0/166 0/162 0/164 0/168 0/164 0/168 0/168 0/168 0/166 0/168 0/168 0/166
0/168 0/168 0/168 0/168 0/168 1/168
FI990239
0/168 0/168 0/166 0/167 0/167 0/166
0/168 0/168 0/168
Process,
0.6µ cMOS, Single Poly, Triple Level Metal STEP 150°C Life 140hrs 560hrs 0/84 0/84 0/84 0/84 0/84 0/84 0/82 0/84 0/84 0/84 0/84 0/81 0/84 0/83 0/84 0/79 0/81 1/81
(121°C 100%RH unbiased) 260hrs 520hrs 1016hrs
0/84
Mil-std-883D, method 3015.7 1000 2000
4000
Part number 6813-003 6817-006 6817-503 8730-449 8730-449 51175 55916 55258 53210 50749
C8(x) Process,
0.8µ cMOS, Single Poly, Triple Level Metal
micron cMOS, C8(x) Processes,
Features
Bulk optional Bulk Prog. Imp. Single Poly Polycide Double Poly Single Metal (TiN-AlCu-Ti) Double Metal (Ti-AlCu-Ti) Triple Metal (Ti-AlCu-Ti) Ox-Nitr. Pass.
C8(x) Process,
0.8µ cMOS, Single Poly, Triple Level Metal
C8(x) Characteristics
Test M374 M229 M234 M476 M216 M187 M165 M353 M481 M145 M137 M224 M511 M352 M516 M347 M457 M362 M364 M342 M375 M460 M363 Description RES_VIA LEFF_I LEFF_I VT_GM KPRIME_L IDSAT_5 IDSAT_5 RES_2 VT_GM BVPNG BVDSS GAMMA GAMMA KPRIME_L VT_GM RES_2 VT_GM RES_2 BVNPG VT_FLD BVDSS RES_CNT RES_CNT RES_2 RES_VIA VT_FLD RES_CNT Size N20X0.8 P20X0.8 N20X0.8 N20X20 P20X0.8 N20X0.8 P+_RES N20X20 P20X20 P20X0.8 P20X20 N20X20 P20X20 P20X0.8 NWELL_FL P20X20 NPOLY_RE N20X20 N_PSI N20X0.8 M1_N+ M1_P+ N+_RES VIA2 P_PSI M1_NPOLY 2.62 2.09 4.02 6.61 3.28 4.79 7.85 5.59 6.09 5.24 6.39 5.73 9.83 7.66 11.11 16.12 2.02 2.15 4.96 10.09 3.14 6.40 3.79 7.36 4.68 5.73 7.77 5.73 12.28 7.73 8.41 8.56 8.78 9.97 12.21 1.97 3.22 2.02 3.08 3.12 3.42 3.18 11.90 3.82 3.94 4.22 7.49 4.75 5.01 5.72 7.38 7.58 13.80 10.04 12.01 20.02 15.41 18.87 20.35 1.97 2.02 2.02 3.08 3.12 3.14 3.18 3.79 3.82 3.94 4.22 4.68 4.75 5.01 5.72 7.38 7.58 8.41 8.56 8.78 9.97 10.04 12.01 12.21 15.41 18.87 20.35
C8(x) Process,
0.8µ cMOS, Single Poly, Triple Level Metal 10C8(x) Wafer Level Reliability results Test
Bridging Poly_lg M1_lg M2_lg
Vcjox
Comments
3280 points
defective 0.33% 0.05% 0.56% defects/cm2 nMOS pMOS 1.21 years 9752 points
Carriers Isub n20x.8 (µAmp/µm) Ring
Electromigration (years) contacts years flat, via, >100 years step years Metal Barrier leaky hour bake analysis spiking Contacts defective m1-n+ m1-p+ Diode Leakage** defective n+p0.15 Fail criteria femtoAmps p+n0.11 reverse bias volts. Matching** milli-Volts n10x.8 Reading represents percentile n10x10 percentile spread. p10x.8 11.2 Reading deviation between adjacent p10x10 minimum length pairs. Idsat Matching** Idsat n10x.8 Reading represents percentile n10x10 0.11 percentile spread. p10x.8 p10x10 0.15 Snapback Volts n20x.8 Passivation Integrity defects/cm2 wafers from lots defects Represents interquartile (75% 25%) range spread considered critical qualification
C8(x) Process,
0.8µ cMOS, Single Poly, Triple Level Metal 8743 Step Stress Monitor,
(6.72x6.69
100LPQFP STEP
(433x433)
125°C Life 0/216 0/213 0/216 0/216 0/215 0/213 0/214 0/216 0/213 0/216 0/215 0/215 0/208 0/214
0/215 0/216 0/213 0/215 0/210 0/215 0/208 2/213 6m,8 7m,8 8m,8 9m,8 10m,8
i.d. seq. TA85516 TA85760 TA86308 TA86605 TA87110 TA90572 TA90870 TA92104 A10338 A10082 A10388 A10466 A10350 A30097 A30097 A28729
C8(x) Process,
0.8µ cMOS, Single Poly, Triple Level Metal
STEP 6m,8 7m,8 8m,8 150°C Life 140hrs 560hrs 0/108 0/108 0/108 0/108 1/108
funct
(121°C 100%RH unbiased) 260hrs 520hrs 1016hrs 0/36 0/33 0/36 0/36 0/33 0/36 0/36 0/33 0/36 0/36 8/33
funct, cont
0/108
1/36
cont
STEP 6m,8 140hrs 0/54 175°C Life 280hrs 560hrs 0/54 1120hrs 0/18 175°C Storage 1/18
funct
1344hrs
Process,
0.8µ cMOS, Single Poly, Triple Level Metal
micron cMOS, CW(x) Processes,
Features
Bulk Bulk Prog. Imp. Single Poly Polycide Double Poly Single Metal (TiW-AlSiCu-TiW) Double Metal (TiW-AlSiCu-TiW) Triple Metal (TiW-AlSiCu-TiW) Ox-Nitr. Pass.
Process,
0.8µ cMOS, Single Poly, Triple Level Metal
CW(X) Characteristics
Test M234 M216 M347 M229 M476 M137 M352 M187 M516 M511 M481 M224 M362 M145 M165 M457 M353 M342 M363 M374 M364 M460 Description LEFF_I KPRIME_L RES_2 LEFF_I VT_GM GAMMA RES_2 IDSAT_5 VT_GM VT_GM BVDSS VT_GM KPRIME_L RES_CNT GAMMA BVDSS IDSAT_5 BVNPG VT_FLD RES_2 RES_2 BVPNG RES_CNT RES_VIA RES_CNT VT_FLD Size P20X0.8 N20X20 NPOLY_RE N20X0.8 N20X0.8 N20X20 NWELL_FL P20X0.8 P20X20 P20X0.8 P20X0.8 N20X20 P20X20 M1_N+ P20X20 N20X0.8 N20X0.8 N20X20 N_PSI P+_RES N+_RES P20X20 M1_NPOLY M1_P+ P_PSI 1.57 1.96 2.56 1.83 2.37 2.20 3.60 2.95 2.57 2.74 2.87 3.01 4.59 3.79 4.96 6.56 2.06 2.49 3.67 1.57 1.61 1.78 4.77 3.45 2.46 2.51 2.63 3.29 3.05 3.69 3.82 4.17 4.38 5.15 5.28 1.08 1.43 1.45 2.08 3.12 2.62 2.43 2.45 2.68 2.96 2.58 3.12 2.72 2.82 6.14 3.75 4.77 7.84 5.38 5.67 6.91 10.35 14.15 1.08 1.43 1.45 1.57 1.61 1.78 2.43 2.45 2.46 2.51 2.58 2.63 2.72 2.82 3.05 3.69 3.75 4.17 4.38 4.77 5.28 5.38 5.67 6.91 10.35 14.15
Process,
0.8µ cMOS, Single Poly, Triple Level Metal 8743 Step Stress Monitor,
(6.72x6.7
100LPQFP STEP 0/216 0/207 0/211 0/216 0/216 0/208 0/216 0/216
(433x433)
125°C Life 0/216 0/207 0/211 0/216 0/216 0/208 0/216 0/216 1/216
0/208 0/208 0/210 0/216 0/215 0/201 0/215 0/214 0/213 44m,8 45m,8 46m,8 47m,8 48m,8 49m,8 50m,8 51m,8 52m,8 53m,8
i.d. seq. TA87807A TA88214A TA88385A TA88859A TA89038A TA89467A TA90150A TA90572 TA91679A TA93895A TA94135A 14877 15430 18016 16488 11357 23386 26879 30097 31146 33279 38871
0/213 0/207 0/211 0/216 0/216 0/208 3/216 0/215 0/214 0/216 0/208
0/216 0/214
Process,
0.8µ cMOS, Single Poly, Triple Level Metal
STEP
page 130°C 85%RH biased HAST data page 130°C 85%RH unbiased hast soak data
44m,8 45m,8 46m,8 47m,8 48m,8 49m,8 50m,8 51m,8 52m,8
150°C Life 140hrs 560hrs
cont
(121°C 100%RH unbiased) 260hrs 520hrs 1016hrs 0/36 0/36 0/36 0/35 0/36 0/36 0/35 0/36 0/36 0/36 0/35 0/36
1/108
cont
0/108
0/108
Process,
0.8µ cMOS, Single Poly, Triple Level Metal
STEP
page -65°C Temperature Cycling data
44m,8 45m,8 46m,8 47m,8 48m,8 49m,8 50m,8
140hrs 0/54 0/54 0/54 0/54 0/54 0/54 0/54
175°C Life 280hrs 560hrs 1/54
cont
1120hrs
175°C Storage 0/18
cont
1344hrs
0/54 2/54
cont.
0/53 0/52 0/54 47/54 0/47
53/53
cont.
funct
0/52 0/52 0/47
cont
0/54 0/54 0/54 0/54
micron cMOS, CY(x) Processes
Features Bulk Bulk Prog. Imp. Single Poly Polycide Double Poly Single Metal (TiW-AlSiCu-TiW) Double Metal (TiW-AlSiCu-TiW) Triple Metal (TiW-AlSiCu-TiW) Ox-Nitr. Pass.
CY(x) Process,
1.0µ
CY(X) Characteristics
Test M216 M235 M230 M477 M512 M347 M137 M224 M353 M342 M145 M457 M362 M460 M363 M364 M374 Description KPRIME_L LEFF_I LEFF_I VT_GM VT_GM RES_2 GAMMA KPRIME_L RES_2 RES_2 GAMMA VT_FLD RES_CNT VT_FLD BVDSS RES_CNT BVDSS RES_CNT RES_VIA Size N20X20 P20X1 N20X1 N20X1 P20X1 NPOLY_RE N20X20 P20X20 P+_RES N+_RES P20X20 N_PSI M1_N+ P_PSI N20X1 M1_NPOLY P20X1 M1_P+ 1.54 1.46 1.79 3.43 2.21 2.02 3.25 2.64 3.15 4.57 4.49 2.11 1.71 2.15 1.56 2.77 2.37 2.23 2.96 2.62 3.83 3.91 3.94 6.39 0.96 1.20 1.44 5.29 1.64 1.67 4.27 2.33 3.68 5.31 5.07 5.55 6.09 6.43 7.07 7.14 11.80 0.96 1.20 1.44 1.56 1.64 1.67 2.23 2.33 2.62 3.83 3.91 3.94 5.55 6.09 6.39 6.43 7.07 7.14 11.80
Process,
1.0µ cMOS, Single Poly, Triple Level Metal 5351 Step Stress Monitor
(6.03x6.25mm)
PLCC STEP
(300x300)
125°C Life 0/108 0/108 0/108 0/108 0/108 0/108 0/108 0/108 0/108 0/108 0/108 0/108 0/108 1/108
0/108 0/108 0/102 0/108 0/104 0/108 0/108 0/108 0/107 0/106 0/108 0/108 0/108 0/108 0/108 0/108 0/102 0/108 0/107 100m 101m 102m 103m 104m 105m 106m 107m 108m 109m 110m 111m 112m 113m 114m 115m 116m 117m 118m
seq. i.d. TA84879 TA85142 TA85403 TA85555 TA85678 TA86007 TA86544 TA86867 TA87245 TA87378 TA87947 TA88119 TA88252 TA88407 TA88721 TA89095 TA89237 TA89329 TA89353 TA90134 72212 69758 76344 77565 78147 11204 12314 12633 14292 15902 18619 19192 18128 16501 15383 24268 20091 24895 24520 25231
0/108 0/108 0/108 0/108 0/108 0/108 0/108 0/108 0/107 0/106 0/108 0/108 0/108 0/108 0/108 0/108 0/108 0/108 0/108 0/107
0/108 0/108 0/108 0/108 0/108 1/108
fail, gate oxide
Process,
1.0µ cMOS, Single Poly, Triple Level Metal STEP 125°C Life 0/108 0/108 0/108 STEP 150°C Life 140hrs 560hrs 100m 101m 102m 103m 104m 105m 106m 107m 108m 109m 110m 111m 0/54 0/54 0/54 0/54 0/54 0/54 0/54 0/54 0/54 0/54 (121°C,100%RH unbiased) 260hrs 520hrs 1016hrs
lifted ball FI980356
0/108 0/108 0/108
seq. i.d. TA90878 TA92187 TA93790 34981 36703 40884
0/108 0/108 0/108
Broken wedge bond FI980424
3/36
fct, cont
cont
0/34 0/36 2/36
0/34 0/36 0/36
0/36 0/34 0/34 0/36 0/36
13/34
fct,
0/34 0/36 0/36
0/34 0/36 0/36
Process,
1.0µ cMOS, Single Poly, Triple Level Metal STEP 150°C Life 140hrs 560hrs 112m 113m 114m 115m 116m 119m 120m 121m 0/54 0/48 0/54 0/48 0/54 0/54 0/54 0/54 0/47 0/54 0/48 0/54 0/52 0/54 (121°C,100%RH unbiased) 260hrs 520hrs 1016hrs 0/28 0/18 0/36 0/36 0/36 0/36 0/35 0/36 0/28 0/18 0/36 0/36 0/30 0/36 0/35 0/36 0/28 0/18 5/36
4fct,1cont
0/24 0/18 0/30 0/36 1/29
cont
0/36 1/36
cont
0/36 0/35 0/36
0/36 0/35 0/36
Process,
1.0µ cMOS, Single Poly, Triple Level Metal
STEP 175oC Life 280hrs 0/18 0/18 0/18 0/18 0/18 0/17 0/18 4/15
cont
100m 101m 102m 103m 104m 105m 106m 107m 108m 109m 110m 111m 112m 120m 121m
140hrs 0/18 0/18 0/18 0/18 0/18 0/18 0/18
560hrs 0/18 2/18
cont
0/16 0/18
175oC Storage 0/16 0/18
cont
1344hrs
cont
15/17
fct, cont
cont
cont
4/18
cont
0/16 0/16
Process,
1.0µ cMOS, Double Poly, Triple Level Metal, Fuses 6798 Step Stress Monitor
(4.35x2.78
28LSOIC STEP 0/240 0/240 0/240 0/240 0/240 0/240 0/240 0/239 0/240 0/240 0/240 0/240 0/240 0/240 0/240 0/240 0/240 0/240
(220x190)
125°C Life 0/238 0/239 0/240 0/238 0/240 0/240 0/240 0/240 0/240 0/240 0/239 0/240 0/240 0/240 0/240 0/240 0/239 0/223 0/240 0/240 0/239 0/234 0/239 0/240 0/238 0/240 0/240 0/240 0/240 0/240 0/240 0/229 0/240 0/240 0/240 0/240 0/240 0/238 0/222 0/235 0/235 0/239
0/233 0/239 0/240 0/238 0/240 0/240 0/240 0/240 0/240 0/238 0/229 0/240 0/240 0/240 0/240 0/240 0/237 0/220 0/235 0/235 0/238
i.d. seq. TA79440L TA80491L TA80741L TA81064L TA81394L TA81647L TA82018L TA82122L TA82339L TA82591L TA83030L TA83182L TA83264L TA83427L TA83539L TA83926L TA84287L TA84444L TA84613L TA84898L TA85150L 77884 81322 82903 83381 59171 84558 84558 84558 86139 61098 86826 87808 88214 89004 87004 89004 90906 91388 91981 92577 92577
Process,
1.0µ cMOS, Double Poly, Triple Level Metal, Fuses STEP 150°C Life 140hrs 560hrs 1/231
(121°C 100%RH unbiased) 260hrs 520hrs 1016hrs
0/229 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/119 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 3/120
funct
0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/119 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120
0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60
0/60 0/59 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60
0/60 0/60 0/59 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60
0/60 0/60 0/59 0/60 0/60 0/60 0/60 0/60 0/60 1/60
funct
0/60 0/60 0/60 0/60 1/60
funct
1/120
funct
0/60
0/120 0/120
Process,
1.0µ cMOS, Double Poly, Triple Level Metal, Fuses STEP 175°C Life 280hrs 560hrs 0/229 0/60 0/60 0/60 0/60 0/60 0/57 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/59 0/60 0/60 0/226 0/60 0/60 0/60 0/60 0/60 0/57 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/58 0/57 175°C Storage
140hrs 0/229 0/60 0/60 0/60 0/60 3/60
funct
1120hrs 0/226 0/60 0/60 0/60 0/60 2/60
cont
1344hrs
0/30 0/30 0/30 0/30 0/29 0/30 0/30 0/30 0/30 0/29 0/30 0/30 0/30 0/30 0/30 0/30 0/30
0/29 0/30 0/30 0/30 0/29 0/30 0/30 0/30 0/30 0/29 0/30 0/30 0/30 0/30 0/30 0/30 0/30
0/29 0/30 0/30 0/30 0/29 0/30 0/30 0/30 0/30 0/29 0/30 1/30
cont
0/29 0/30 0/30 0/30 0/29 0/30 21/30
cont
0/60 1/57
cont
0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60
0/60 0/60 0/60 0/60 17/60
cont
0/30 0/30 0/29 0/30 4/29
cont
4/60
cont
0/60
0/30 1/30
cont
0/30 0/29 0/28
0/29 0/30
CA(x) Process,
1.25µ cMOS, Single Poly, Double Level Metal
1.25 micron cMOS, CA(x) Processes
Features Bulk Bulk Single Poly Poly(silicide) Prog. Imp. Single Metal Double Metal Ox-Nitr. Pass.
CA(x) Process,
1.25µ cMOS, Single Poly, Double Level Metal
CA(x) Characteristics
Test M237 M347 M363 M514 M232 M216 M137 M342 M224 M362 M456 M364 M457 M353 M145 M479 M459 M460 M374 Description LEFF_I RES_2 RES_CNT VT_GM LEFF_I KPRIME_L GAMMA RES_2 KPRIME_L RES_CNT VT_FLD RES_CNT VT_FLD RES_2 GAMMA VT_GM VT_FLD BVDSS VT_FLD BVDSS RES_VIA Size P20X1.25 NPOLY_RE M1_NPOLY P20X1.25 N20X1.25 N20X20 N20X20 N+_RES P20X20 M1_N+ N_MET M1_P+ N_PSI P+_RES P20X20 N20X1.25 P_MET P20X1.25 P_PSI N20X1.25 1.18 1.53 2.03 1.70 2.00 2.79 2.70 2.77 4.17 5.99 5.94 1.47 1.71 2.58 1.91 2.12 2.15 2.39 2.40 3.03 3.47 4.17 7.52 5.35 9.67 0.88 1.35 1.43 1.47 1.48 1.87 3.44 3.02 3.14 2.65 3.09 4.17 4.46 6.54 8.27 8.36 9.32 48.40 0.88 1.35 1.43 1.47 1.48 1.87 2.15 2.39 2.40 2.65 3.03 3.09 3.47 4.17 4.46 5.35 8.27 8.36 9.32 9.67 48.40
Process,
1.25µ cMOS, Single Poly, Double Level Metal 9880 Step Stress Monitor
(9.65x9.77mm)
PLCC STEP
(425x425)
125°C Life 0/108 0/108 0/108 0/108 0/108 0/101 0/108 0/108 0/108 0/108 0/108 0/108 0/108 0/108 0/106 0/108 0/108 0/108 0/101 0/108 0/108 0/108 0/108 0/108 0/107 0/108
0/106 0/108 0/104 0/108 0/101 0/108 0/108 0/108 0/107 0/105 0/71 108m 109m 110m 111m 112m 113m 114m 115m 116m 117m 118m 119m 120m 121m 122m
seq. i.d. TA85252n TA85476n TA85590n TA86859 TA87075 TA87386 TA87677 TA87929 TA88206 TA88373 TA88593 TA88851 TA89012 TA89166 TA89476 77588 67182_polyim 78686 12038 12308 11230 17094 18278 14086 15116 12970 14308 23724 24270 23387
Process,
1.25µ cMOS, Single Poly, Double Level Metal
STEP
page 130°C, 85%RH biased HAST data page 130°C, 85%RH unbiased hast soak data
108m 109m 110m 111m 112m 113m 114m 115m 116m 117m 118m 119m 120m
150°C Life 140hrs 560hrs 0/54 0/54 0/54 0/54 0/54 0/54 1/54
funct
(121°C,100%RH unbiased) 96hrs 260hrs 520hrs 1016hrs 0/32 0/36 0/34 0/34 0/35 0/31 0/36 0/43 0/36 0/36 0/35 0/36 0/36 0/32 0/36 1/34
cont
0/54 0/54 0/38 0/54 0/52 0/54 0/53 0/54 0/54 0/54 0/54 0/54 0/51
0/32 0/36 0/32 0/34 5/35
cont
0/32 0/36 0/32 0/34 0/30 0/30 16/22
cont
0/34 0/35 0/31 2/33
cont
0/31 6/29
cont
0/54 0/54 0/54 0/54 0/54 0/51
0/43 0/36 0/33 0/35 0/35 0/30
0/43 0/34 0/33 0/35 0/35 0/30
0/43 0/34 0/30 0/35 0/35 0/30
Process,
1.25µ cMOS, Single Poly, Double Level Metal STEP
page -65°C Temperature Cycling data
108m 109m 110m 111m 112m 113m 114m 115m 116m 117m 118m
140hrs 0/18 0/18 0/18 0/18 0/18 0/18 0/18 0/18 0/18 0/18 0/18
175°C Life 280hrs 560hrs 0/18 0/18 0/18 0/18 0/18 0/17 0/18 0/18 0/18 0/18 0/17 0/18 0/18 0/18 0/18 0/17 0/16 0/18 0/18 0/18 0/18 0/17
0/18 0/18 0/17 0/16 0/18 0/18 0/18 0/18 0/18 0/18
175°C Storage 672hrs 0/18 0/18 0/17 0/16 0/18 0/18 0/18 0/14 0/18 0/18 0/18 0/18 0/16 0/16 0/18 0/18 0/18 0/14 0/18 0/18
1344hrs 0/18 0/18 0/16 0/16 0/18 0/16 0/18 0/14 0/18 0/18
micron cMOS, AB(x), Double Poly Processes
Features Bulk Bulk Bipolar devices Single Poly Double Poly Single Metal Double Metal Ox-Nitr. Pass. High Voltage
AB(x) Processes,
1.5µ cMOS, Double Poly
Characteristics
Test M456 M440 M243 M348 M183 M267 M215 M255 M349 M358 M277 M522 M457 M441 M159 M219 M353 M176 M140 M342 M507 M508 M488 M473 M197 M369 M362 M459 M136 M374 M370 M460 M364 Description VT_FLD LEFF_VG RES_2 IDSAT_5 LEFF_VG KPRIME_L LEFF_VG RES_2 RES_2 BVPNG LEFF_VG VT_GM VT_FLD IDSAT_5 KPRIME_L BVDSS RES_2 IDSAT_5 BVNPG GAMMA RES_2 VT_GM VT_GM VT_GM VT_GM IDSAT_5 RES_CNT RES_CNT VT_FLD GAMMA RES_VIA RES_CNT BVPNG VT_FLD RES_CNT BVNPG Size N_MET P1_P2_LG N1_20X1. NPSI1_RE P1_20X1. P1_20X1. N1_20X20 N2_20X2 NPSI2_RE PWELL_FL P2_20X20 P2_20X2 P2_20X20 N_PSI PMOS1 N1_20X1. N2_20X20 N2_20X2 P+_RES N2_20X2 N2_20X20 N2_20X20 N+_RES P1_20X1. P1_20X20 N2_20X20 N1_20X20 P2_20X2 M1_PSI1 M1_N+ P_MET N1_20X20 M1_PSI2 P1_20X20 P_PSI M1_P+ N1_20X20 1.52 1.85 1.26 2.82 1.47 1.82 2.06 1.78 2.19 2.00 2.32 2.28 3.17 2.14 2.36 2.71 3.32 3.61 2.76 2.58 3.02 3.50 3.00 4.11 0.92 2.03 2.58 1.22 4.28 1.57 2.24 2.67 1.61 1.67 2.27 2.90 1.87 2.63 2.00 2.00 2.22 2.23 2.33 2.37 2.43 2.44 2.46 2.65 3.42 2.68 3.26 3.50 7.94 1.01 1.13 1.29 1.35 1.37 1.40 1.45 1.96 2.71 1.67 1.73 1.73 1.93 4.34 2.28 2.48 3.08 4.21 4.78 3.07 2.51 2.61 4.32 2.75 3.09 3.10 3.34 4.72 4.53 5.57 5.88 6.74 7.22 0.92 1.01 1.13 1.22 1.35 1.37 1.40 1.45 1.61 1.67 1.67 1.73 1.73 1.87 1.93 2.00 2.00 2.22 2.23 2.33 2.37 2.43 2.44 2.46 2.51 2.61 2.68 2.75 3.09 3.10 3.34 3.50 4.53 5.57 5.88 6.74 7.22 7.94
AB(x) Processes,
1.5µ cMOS, Double Poly Test Description Size BVDSS P2_20X2 BVDSS P1_20X1. 12.10 12.10 15.84 15.84
AB(x) Processes,
1.5µ cMOS, Double Poly
Characteristics
Test Description Size M522 vt_gm p2_20x20 M277 leff_vg p2_20x2 bvceo npn_tran M267 leff_vg p1_20x1. M349 res_2 npsi2_re M183 idsat_5 p1_20x1. M348 res_2 npsi1_re M243 leff_vg n1_20x1. M197 idsat_5 p2_20x2 M456 vt_fld n_met M219 kprime_l n2_20x20 M215 kprime_l n1_20x20 M159 idsat_5 n1_20x1. M176 idsat_5 n2_20x2 M350 res_2 nwell_de M255 leff_vg n2_20x2 M353 res_2 p+_res M459 vt_fld p_met M473 vt_gm n1_20x20 M488 vt_gm n2_20x20 bvpng p2_20x20 M342 res_2 n+_res M364 res_cnt m1_p+ M369 res_cnt m1_psi1 M140 gamma n2_20x20 bvdss n2_20x2 bvnpg n2_20x20 M457 vt_fld n_psi M370 res_cnt m1_psi2 M136 gamma n1_20x20 bvpng p1_20x20 M374 res_via M460 vt_fld p_psi M362 res_cnt m1_n+ bvnpg n1_20x20 bvdss n1_20x1. bvebo npn_tran bvdss p1_20x1. 1.14 1.38 1.43 1.43 2.95 1.43 1.60 1.86 1.94 2.00 2.36 1.94 2.10 2.15 1.99 3.53 2.48 16.81 2.99 2.78 10.22 3.83 18.16 11.09 0.97 1.67 1.09 1.19 1.28 4.52 1.47 1.80 2.30 1.45 2.31 2.37 1.68 1.78 2.39 2.46 2.03 2.25 2.65 31.29 2.56 2.81 2.77 2.94 3.12 3.65 31.69 7.39 8.20 8.82 1.31 1.08 1.66 1.59 1.37 1.39 1.40 1.42 1.56 1.62 3.03 2.10 1.82 1.83 1.96 2.01 4.80 2.32 2.34 3.41 2.70 2.75 2.76 17.51 3.20 4.01 4.62 5.08 5.13 5.92 14.79 12.72 0.97 1.08 1.09 1.19 1.28 1.37 1.39 1.40 1.42 1.45 1.56 1.62 1.68 1.78 1.82 1.83 1.96 2.01 2.25 2.32 2.34 2.56 2.70 2.75 2.76 2.77 2.94 3.12 3.20 3.65 4.62 5.08 5.13 5.92 7.39 8.20 8.82 12.72
AB(x) Processes,
1.5µ cMOS, Double Poly Test Description Size bvdss p2_20x2 12.77 12.77 bvces npn_tran 2718.37 2718.37 bvox p1_p2_sm 5476.46 3651.13 7301.78 3651.13
Process,
1.5µ cMOS, Double Poly, with EEPROM 6879 Step Stress Monitor
(5.8x1.64
14LSOIC STEP 0/340 0/340 0/340 0/338 0/331 0/335 0/335 0/333 0/333 0/331 0/333 0/330 0/331 0/321 0/168 0/170 0/331 0/246 0/331 0/340 0/330 0/330
(250x90)
125°C Life 0/340 0/264 0/332 0/338 0/331 0/331 0/332 0/326 0/333 0/330 0/320 0/328 0/331 0/320 0/165 1/170
0/312 0/252 0/310 0/331 0/329 0/329 0/328 0/320 0/324 0/309 0/309 0/328 0/330 0/320 0/164 0/158 0/321 0/237 0/329 0/330 0/327 0/324
i.d. seq. TA85025 TA85243 TA85488 TA86888 TA86896 TA86904 TA86912 TA86920 TA87692 TA87823 TA87937 TA88284 TA88750 TA89141 TA89846 TA89854 TA89895 TA90292 TA90511 TA91171 TA91842 TA92355 75549 76739 71111 97043 97018 97047 96892 97044 15062 17656 16708 19459 15739 24327 22012 22012 102369 102383 25148 59617 33054
0/338 0/263 0/314 0/337 0/330 0/329 0/328 0/320 0/331 0/324 0/319 0/328 0/331 0/320 0/165 2/160
0/330 0/237 0/330 0/340 0/327 0/327
0/326 0/237 0/330 0/330 0/327 0/327
Process,
1.5µ cMOS, Double Poly, with EEPROM STEP 0/340 125°C Life 0/340 0/340 0/340 i.d. seq. TA93339
STEP 150°C Life 140hrs 560hrs 0/170 0/169 0/168 0/168 0/168 0/170 1/170
(121°C 100%RH unbiased) 260hrs 520hrs 1016hrs 0/85 0/40 0/71 0/85 0/85 0/85 0/85 0/85 0/83 0/85 0/85 0/85 0/81 0/55 0/40 0/70 1/85
0/167 0/166 0/160 0/168 0/168 0/170 0/168 0/165 0/165 0/166 0/170 0/162 1/166
cont
0/55 0/40 0/38 0/84 0/81 3/81
cont
0/51 0/40 0/38 0/83 0/76 3/76
fct, cont
0/84 0/85 0/85 0/84 0/79 0/85 0/85 0/85 0/81
7/83
cont
0/165 1/170
0/84 0/70 0/77 0/79 0/79 0/81
0/82 0/70 0/69 1/79
0/164 0/167 0/170 0/170 0/166 0/164
0/78 0/81
0/164
Process,
1.5µ cMOS, Double Poly, with EEPROM STEP 150°C Life 140hrs 560hrs 0/158 0/170 0/166 0/170 0/170 0/170 0/159 0/168 0/156 0/170 0/165 0/170 0/170 0/121 0/159 (121°C 100%RH unbiased) 260hrs 520hrs 1016hrs
STEP
0/73 0/67 0/85 0/85 0/72 0/83 0/80
0/73 0/67 0/85 0/85 0/70 0/83
3/73
cont
0/65 0/65 0/81 0/81
0/66 3/84
fct,
0/85 0/70
140hrs 0/84 0/81 0/81 0/84 0/79 0/84 0/80 0/79
175°C Life 280hrs 560hrs 0/82 0/78 0/81 0/82 0/72 0/82 0/80 0/79 1/78
fct, FA980338
1120hrs 0/76 0/78 0/81 0/79 0/65 0/82 0/76 0/74
0/40 0/40 0/40 0/40 0/40 0/26 0/40 0/40
175°C Storage 0/40 0/39 0/40 0/38 0/40 0/25 0/40 0/40 0/40 0/39 1/40 0/38 0/40 0/23 0/40 0/40
1344hrs 0/39 0/39 0/39 0/38 0/40 0/20 0/39 0/40
0/78 0/81 0/79 0/68 0/82 0/79 0/74
Process,
1.5µ cMOS, Double Poly, with EEPROM STEP 175°C Life 280hrs 560hrs 0/83 0/83 0/78 0/83 0/80 0/80 0/82 0/85 0/84 0/81 0/80 0/79 0/80 0/57 0/80 0/82 0/84 0/84 175°C Storage 0/39 0/40 0/32 1/39
cont
140hrs 0/83 0/84 0/83 0/83 0/80 1/82
cont
1120hrs 0/78 0/79 0/68 1/80
cont
0/40 0/40 0/40 0/40 0/40 0/38 0/40 0/38 0/40 0/19
1344hrs 0/35 0/40 11/29
cont
0/37 0/40 0/29 0/36 0/40 0/38 0/35 0/38 0/34
0/33 0/40
0/80 0/82 0/84 0/84
0/40 0/38 0/35 0/38 1/37
0/82 0/85 0/85 0/61
0/38
0/18
Process,
1.5µ cMOS, Double Poly, with EEPROM 175C Data Retention Bake number Date code hours TA83908 9743LNK 0/100 TA84422 TA84759 TA85693 TA86491 TA86854 TA86974 TA87331 TA88043 Schedule change number TA88465 TA89138 TA89623 TA90544 TA91687 TA92184 9801LQX 9743LNK 9802LQY 9827LDM 9827LDL 0/50 0/50 0/23 0/100 0/100 hours 0/100 0/50 0/50 0/23 0/100 0/100 0/100 0/100 0/99 hours 0/100 0/50 0/50 0/23 0/99 0/100 0/100 0/100 0/99 hours 3/100
hours 0/97 0/50 0/50 0/23 0/99 0/100 0/100 0/100 0/99
1536 hours 1/97
cont
3072 hours 0/96 0/50 0/50 0/99 6/99
0/50 0/50 0/23 0/99 0/100 0/100 0/100 0/99
0/50 0/50 0/23 0/99 0/99 0/100 0/100 0/99
9828LEK 0/100 9827LDW 0/100 9827LDK 0/99
0/100 0/100 0/99
Date code 9910LLQ 9910LLP 9909LLO 9909LLN 0003LVX 0003LVZ
hours 0/100 0/100 0/100 0/100 0/100 0/100
hours 0/100 0/100 0/100 2/100
cont,
hours 0/100 0/100 0/100 0/98 0/99 0/100
hours 0/100 0/100 0/100 0/98 0/99 0/100
hours 0/99 0/97 0/100 0/98 0/99
1280 hours 0/99 0/97 0/100 0/97 0/99
2560 hours 0/99 0/97 0/100
0/100 0/100
Process,
1.5µ cMOS, Double Poly, with EEPROM 240C Data Retention Bake number Date code hours TA83908 9743LNK 0/100 TA84422 9801LQX 0/50 TA84759 9743LNK 0/50 TA85693 9802LQY 0/23 TA86491 9827LDM 0/100 TA86854 9827LDL TA86974 TA87331 TA88043 TA88465 TA89138 TA89623 TA90544 TA91687 TA92184 9828LEK 9827LDW 9827LDK 9910LLQ 0/100 9910LLP 9909LLO 9909LLN 0003LVX 0003LVZ 0/100 0/100 0/100 0/100 0/100
hours 0/100 0/50 0/50 0/23 0/100 0/100 0/100 0/100 0/100 0/100 0/100 0/100 1/100
hours 0/100 0/50 0/50 0/23 0/100 0/100 0/100 0/100 0/100 0/100 0/99 0/99 0/99 0/98 0/100
hours 0/100 0/50 0/50 0/23 0/100 0/100 0/100 0/100 0/98 0/99 0/98 0/99 0/98 0/100
hours 0/100 0/50 0/50 0/23 0/100 0/100 0/100 0/100 0/98 0/99 0/98 0/99 0/98 0/100
hours 0/100 0/50 0/50 0/23 1/100
cont
1536 hours 0/100 0/50 0/50
0/99 0/100 0/100 5/90
cont
0/100 0/100 0/98 0/99 0/98 0/99 0/98
0/97 1/98
cont
0/99
0/100 0/100
Process,
1.5µ cMOS, Double Poly, with EEPROM Wafer Bake experiment Three wafers were programmed submitted data retention bakes various temperatures. Wafer 270C. 1/846 fail EEPROM hrs, minutes. 0/845 additional failures hrs, minutes. Wafer 372C. 1/843 fail EEPROM hrs, minutes. 0/842 additional failures hrs, minutes Wafer 428C. 4/841 fail EEPROM hrs, minutes. 1/837 fail EEPROM hrs, minutes. 0/836 additional failures hrs, minutes.
Process,
1.5µ cMOS, Double Poly, with fuses 6744 Step Stress Monitor
(5.73x3.47
16LSOIC STEP 0/240 0/240 0/240 0/240 0/240 0/240 0/240 0/240 0/240 0/240 0/240 0/235 0/239 0/239 0/239 0/240 0/239 0/240 0/240 0/237 1/340
(250x160)
125°C Life 0/239 0/238 0/231 0/240 0/240 0/237 0/240 0/237 0/239 0/240 0/235 0/235 0/237 0/239 0/239 0/237 0/239 0/240 0/240 0/236 0/333 0/238 0/238 0/231 0/240 0/240 0/237 0/240 0/237 0/236 0/240 0/235 0/235 0/236 0/239 0/239 0/237 0/239 0/240 0/240 0/236 0/333
0/237 0/238 0/231 0/239 1/240
m1/m2 short
i.d. seq. TA84744 TA84905 TA85431 TA85686 TA86000 TA86484 TA86718 TA86875 TA87101 TA87334 TA87458 TA87585 TA87685 TA87854 TA88073 TA88338 TA88576 TA88844 TA89004 TA89159 TA89453 72115 75541 77917 76789 11172 76226 12794 71283 72687 15014 71543 66338 69836 17960 68253 21274 22198 22391 23647 21637 26074
0/235 0/240 0/236 0/236 0/238 0/235 0/235 0/236 0/239 0/239 0/237 0/239 0/240 0/240 0/236 0/333
Process,
1.5µ cMOS, Double Poly, with fuses STEP
gox, FA990313
125°C Life 0/240 0/240 2/232
0/240 0/184 0/230 2/235 0/238
i.d. seq. TA89626 TA89888 TA90421 TA90516 TA90558 TA90891 26074 27772 24876 30741 31409 32070
0/240 0/240 0/233 0/240 1/240
gox, FA990449
0/240 0/184 0/230 0/239 0/238
0/239 0/239 0/239
0/240
Process,
1.5µ cMOS, Double Poly, with fuses
STEP 150°C Life 140hrs 560hrs 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/119 0/120 0/120 0/120 0/120 0/120 0/120 1/120
well defect
(121°C 100%RH unbiased) 260hrs 520hrs 1016hrs 0/60 0/60 0/55 0/60 0/59 0/55 0/60 0/55 0/56 0/57 0/54 0/55 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/59 0/60 0/55 0/59 0/59 0/55 0/58 0/55 0/56 0/57 0/54 0/55 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/59 0/60 0/55 0/59 0/59 0/55 2/58
0/25 0/60 0/55 0/59 0/59 0/55 6/56
cont
0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/120 0/119 6/119
0/55 0/56 0/57 0/54 0/55 0/60 0/60 0/60 0/60 0/60 0/59 3/60
fct,
0/55 0/57 0/54 0/55 0/60 0/60 0/59 0/58 0/59 0/58 2/57
cont
0/120 0/120 0/120
Process,
1.5µ cMOS, Double Poly, with fuses STEP 150°C Life 140hrs 560hrs 0/120 0/120 0/120 0/119 0/120 0/120 0/120 0/120 0/120 0/119 0/120 0/120 (121°C 100%RH unbiased) 260hrs 520hrs 1016hrs 0/60 2/60
0/60 0/58 0/21 0/50 0/55 0/60
0/60 0/58 0/21 0/50 0/55 0/60
0/60 0/58 0/21
0/21 0/50 0/55 0/60
Process,
1.5µ cMOS, Double Poly, with fuses
STEP 140hrs 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/57 0/60 175°C Life 280hrs 560hrs 0/58 0/60 0/60 0/59 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/58 0/57 0/60 0/58 0/60 0/60 0/59 4/59
fct,
1120hrs 1/57
0/60 0/60 0/60 0/59 0/60 0/60 0/58 0/60 0/59 0/60 0/30 0/60 0/60 0/60 1/59
175°C Storage 0/60 0/60 0/60 0/59 0/60 0/60 0/58 0/60 0/59 0/60 0/30 0/60 0/60 0/60 0/58 0/56 0/60 0/60 0/60 0/60 1/59
1344hrs 1/60
4/60
fct, cont
0/60 18/60
fct, cont
15/60
fct,
6/59
fct, cont
0/58 17/59
fct, cont
17/55
fct, cont
0/60 0/60 0/58 2/60
fct, cont
0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 15/60
fct, cont
0/60 0/59 31/58
fct, cont
0/59 0/58 44/58
fct, cont
20/60
fct, cont
0/59 0/60 0/30 0/60 0/60 5/60 0/58 0/56 0/60
15/59
fct,
0/60 1/60
cont
0/60 1/30
0/60 4/60
fct, cont
3/60
fct, cont
32/45
fct, cont
0/58 0/57 0/60
5/58
fct, cont
14/55
rct, cont
0/55 0/59
0/56 0/60
2/56
fct, cont
0/60
Process,
1.5µ cMOS, Double Poly, with fuses STEP 140hrs 0/60 0/60 0/60 0/60 0/60 0/60 0/60 0/60 175°C Life 280hrs 560hrs 0/60 0/60 1/60
1120hrs 0/59 1/60
0/60 0/60 0/40 0/54 0/60 0/59 0/60 0/60
175°C Storage 0/60 0/60 0/40 0/54 0/60 0/59
1344hrs
0/59 0/60 0/59 1/59
0/60 0/40 0/53
0/60 0/40 3/52
fct,
0/59 4/58
cont
0/59 0/59 0/60
0/59
Thermal Cycling Durability
thermal cycling durability AMI's plastic encapsulated microcircuits (PEMs) depends upon size specifically, square die's diagonal length (d2=x2+y2), depends only temperature extreme cycling, independent attach size,
independent exterior package configuration (i.e., particular will have same thermal cycling durability SOIC package PDIP, PLCC, PQFP package),
described mortality model
where, -16.074
163.
with being number excursions -65°C being diagonal measure millimeters.
model describes inherent life limitation PEMs thermal cycling failure cracking glassivation layers ("glassiv cracking"). That shearing topological features, such metal lines, toward geometric center thermal expansion plastic. more utilitarian form model given Figure plotted curve corresponds probability passing conventional LTPD=5% acceptance testing criterion. Acceptance guaranteed product-durability requirement corresponding point below this curve. clear region above this line, probability acceptance less depends upon particular sampling plan that used. AMI's optional spun-on polyimide coat necessary product have required durability when size, number required excursions -65°C, correspond point cross-hatched area. optional polyimide coat will guarantee 1,000 cycle robustness with diagonal lengths least millimeters. Despite being highly misleading, tradition classifying package-related reliability package shape persists because physical happenstance that larger package required house larger die. Nevertheless, size die, size package, that determines robustness thermal cycling. Were plastic "slab" atop free, it's edges would align with edges 175°C mold/cure temperature. lower temperature, dimensions slab would smaller than those die. More specifically, change dimensions slab would proportional change from mold/cure temperature. larger temperature change, larger would displacements
Figure
size limits -65°C thermal cycling durability
slab's edges from those die. Likewise, particular temperature change, displacements edges would larger, larger dimensions die. course, slab free. other means, constrained topological features surface, such glassivated metal lines. These constraints convert what would have been displacements into shear stresses tending push features toward center die. Failure occurs growth cracks glassivation. Cracks first appear glassivation covering metal lines because malleability metal. crack surfaces become path electrical leakage once they have propagated laterally other metal lines vertically through underlying glassivation circuit structures other layers integrated circuit. Often this accompanied displacements metal circuit pattern. Because pressures applied plastic increase with distance, this damage happens predominantly corners (the points farthest removed from center) die. larger die, fewer will number excursions until cracks cause electrical failure PEM. Similarly, colder temperature excursions from 175°C mold/cure temperature, fewer will number cycles before failure occurs. also true that slab plastic atop constrained rest package's plastic and, more bond wire ball bonds. Their effects divert some stress away from surface features die. Generally, model pessimistic gate array standard cell designs because ball bonds usually placed around entire perimeter. scarcity ball bonds around corners die, such "ends-only" placement bonds only along opposing edges commonly used with memory circuits, reduces thermal cycling performance. Similarly, placement peripheral metal lines cause deviations from model. Closely spaced metal lines reduce robustness. does stacking peripheral Vdd/Vss busses atop another because cracking (nominally thick) intermetal dielectric. empirical model (above), which derived from data following pages, shows that susceptibility glassivation cracking depends upon square distance from center die. dependence temperature described power range excursions from mold/cure temperature, life 175° Zelenka others have reported that glassivation cracking. other words, excursion -55°C instead -65°C will increase lifetimes 50%. Similarly, excursions only -40°C will increase lifetimes much factor three. AMI's comparisons -55°C thermal shock versus -65°C temperature cycling, other hand, have indicated acceleration factor least three. This possibly plastic reaching quasi-equilibrium temperature during cold-fluid dwell times prescribed MIL-STD-883 method 1011. this would indicate that thermal shock benign test PEMs compared temperature cycling (such prescribed method 1010).
-65°C Temperature Cycling
MIL-STD-883, method 1010, condition fail tested interval cycling cycl 1008 cycl 2016 cycl 4032 cycl
cycl
8064cycl
i.d.
9630
(2.71x3.01mm)
TA11552
SOIC (160x200) 5884
(3.15x3.30mm)
TA12570
PLCC (200x180) 5591
(3.05x3.41mm)
TA11623
PLCC (200x180) 5803
(3.33x4.60mm)
PLCC (200x180) 5668
(3.06x5.08mm)
TA11700
TA12569
PLCC (240x290) 5480
(4.49x5.11mm)
TA11695
TA11713
cond poly contam
TA11030
PDIP
-65°C Temperature Cycling
MIL-STD-883, method 1010, condition fail tested interval cycling cycl 1008 cycl 2016 cycl 4032 cycl
cycl (234x264) 9869
(6.62x6.46mm)
8064cycl
i.d.
TA10765bondpull
PLCC (230x230) 9738
(9.01x9.09mm)
TA10118
PLCC (425x425) 9738
(9.01x9.09mm)
TA10082
PLCC (360x360) 6879
(5.8x1.64mm)
SOIC (250x90)
TA81056 TA81259 TA81402 TA81639 TA81862 TA82032 TA82139 TA82377 TA82633 TA82878
82005 54550 55552 84263 84865 85128 60268 64579 86595 59617
-65°C Temperature Cycling
MIL-STD-883, method 1010, condition fail tested interval cycling cycl 1008 cycl 2016 cycl 4032 cycl
cycl
8064cycl
i.d. TA83164 TA83384 TA83419 TA83488 TA84622 61900 58468 54550 68887 65735
5351
(6.03x6.25mm)
PLCC (300x300)
1-short 1-power-up trip
TA11979 TA11987 TA12120 TA12119 TA12186 TA12215 TA12188 TA12294 TA12341 TA12342 TA12343 TA12523 TA12558V TA12559V TA64693V
(5351STEP#23) (5351STEP#24) (5351STEP#25) (5351STEP#26) (5351STEP#27)
single short
single shorts
(5351STEP#28) (5351STEP#29) (5351STEP#31) (5351STEP#32) (5351STEP#33) (5351STEP#34) (5351STEP#35)
single short
single short
single short
(5351STEP#39) (5351STEP#40) (5351STEP#44)
-65°C Temperature Cycling
MIL-STD-883, method 1010, condition fail tested interval cycling cycl 1008 cycl 2016 cycl 4032 cycl
open opens
cycl
8064cycl TA64381V TA64473V TA72973V TA76495V TA76771V TA77092V TA77189V TA77271V TA77368V TA77457V TA77869V TA77977V TA78068V TA78106V TA78203V TA78238V TA78325V TA78399V TA78584V TA78656V TA78571V
i.d.
(5351STEP#46) (5351STEP#45) (5351STEP#48) (5351STEP#47) (5351STEP#49) (5351STEP#50) (5351STEP#51) (5351STEP#52) (5351STEP#53) (5351STEP#54) (5351STEP#55) (5351STEP#56) (5351STEP#57) (5351STEP#58) (5351STEP#59) (5351STEP#60) (5351STEP#61) (5351STEP#62) (5351STEP#63) (5351STEP#65) (5351STEP#66)
xtal
opens
Iddq
Iddq 300-1000
Vdd/Vss short
-65°C Temperature Cycling
MIL-STD-883, method 1010, condition fail tested interval cycling cycl 1008 cycl 2016 cycl 4032 cycl
cycl
8064cycl TA78923V TA78971V TA79063V TA79125V TA79198V TA79354V TA79429V TA79527V TA79557V TA79673V TA79753V TA79924V TA80375N TA80464V TA81024N TA81231V TA81358N
i.d.
(5351STEP#68) (5351STEP#69) (5351STEP#70) (5351STEP#71) (5351STEP#72) (5351STEP#73) (5351STEP#74) (5351STEP#75) (5351STEP#76) (5351STEP#77) (5351STEP#78) (5351STEP#79) (5351STEP#80) (5351STEP#81) (5351STEP#82) (5351STEP#83) (5351STEP#84)
Iddq inlk
6574
(6.72x6.7mm)
100LPQFP (433x433)
FA940562 Iddq 2.5mA
FA940550 Iddq 3.4mA 500µA
TA12496A TA12554A TA12555A
15136 15358 13054
FA940565 Iddq 2.8mA 3.2mA
-65°C Temperature Cycling
MIL-STD-883, method 1010, condition fail tested interval cycling cycl 1008 cycl 2016 cycl 4032 cycl
cycl
8064cycl
i.d.
6574
(6.72x6.7mm)
100LPQFP (433x433)
TA12679A TA12731A TA76475A TA76791A TA76976A TA77040A TA77127A TA77197A TA77282A TA77481A TA77501A TA77676A TA77790A TA77877A TA77985A TA78059A TA78282A TA78213A TA78114A TA78479A TA78592A TA78685A
21781 22007
(6574STEP (6574STEP (6574STEP (6574STEP (6574STEP (6574STEP (6574STEP (6574STEP #10) (6574STEP (6574STEP #12) (6574STEP #14) (6574STEP #11) (6574STEP #16) (6574STEP #17) (6574STEP #13) (6574STEP #15) (6574STEP #18) (6574STEP #19) (6574STEP #20) (6574STEP #21)
opens
Inlk,
continuity
Open
Iddq
Iddq
-65°C Temperature Cycling
MIL-STD-883, method 1010, condition fail tested interval cycling cycl 1008 cycl 2016 cycl 4032 cycl
1-Iddq 500uA 1-open
cycl
8064cycl
i.d. TA78764A TA78839A TA78931A TA78941A TA79073A TA79136A TA79206A TA79362A TA79420A TA79541A TA79558A TA79681A TA79812A
(6574STEP #22) (6574STEP #23)
Iddq
Trip
(6574STEP #24) (6574STEP #25) (6574STEP #26) (6574STEP #27) (6574STEP #28) (6574STEP #29) (6574STEP #30) (6574STEP #31) (6574STEP #32) (6574STEP #33) (6574STEP #34)
Opens
Opens
Continuity
Continuity
8730
(7.10x7.30mm)
Continuity
TA80619A TA82197A TA82079A
(8730STEP (8730STEP
100LPQFP (433x433)
Continuity
Continuity
(8730STEP #11)
-65°C Temperature Cycling
MIL-STD-883, method 1010, condition fail tested interval cycling cycl 1008 cycl 2016 cycl 4032 cycl
cycl
8064cycl TA81515A TA81666A TA82558A
i.d.
(8730STEP #12) (8730STEP #13) (8730STEP #14)
9880
(9.65x9.77mm)
glassiv cracking
glassiv cracking
glassiv cracking
TA11098 TA11678 TA11674 TA11761 TA11774 TA11827 TA11825 TA11842 TA11929 TA11945 TA11960 TA11969 TA11985 TA11995 TA11986
(9880STEP#14)
PLCC (425x425)
glassiv cracking
glassiv cracking
9229361 9228361 9229662 9229662 9231161 9232480
(9880STEP#25)
glassiv cracking
glassiv cracking
glassiv cracking
glassiv cracking
glassiv cracking
FA940354P PowerUp trip.
glassiv cracking
glassiv cracking
glassiv cracking
glassiv cracking
glassiv cracking
glassiv cracking
glassiv cracking
glassiv cracking
glassiv cracking
glassiv cracking
9304666 9305362 9306064
(9880STEP#28)
glassiv cracking
glassiv cracking
glassiv cracking
9309731
(9880STEP#30)
(9880STEP#29)
-65°C Temperature Cycling
MIL-STD-883, method 1010, condition fail tested interval cycling cycl 1008 cycl 2016 cycl 4032 cycl
fctn
cycl
8064cycl
i.d. TA12122 TA12217 TA12218 TA12315 TA12316 TA12534 TA12413 TA64398V TA64651V TA76503V TA76730V TA76939V TA77150N TA77257N TA77358N TA77419V TA77627V TA77751N TA77829V
(9880STEP#32) (9880STEP#33) (9880STEP#34) (9880STEP#35) (9880STEP#36) (9880STEP#40) (9880STEP#41) (9880STEP#50) (9880STEP#47) (9880STEP#49) (9880STEP#48) (9880STEP#46) (9880STEP#52)
fctn
opens
corner
1-input leakage 1-fctn
Idds=100µA
Vdd/Vss Short fctn
opens
corner
opens
shift
glassiv cracking
opens
glassiv cracking
input leakage
short
3-fctn 1-glassiv cracking
(9880STEP#51) (9880STEP#54)
Idds=240µA
Idds
glassiv cracking
(9880STEP#53)
Idds
opens
fctn
(9880STEP#57) (9880STEP#55) (9880STEP#56)
leakage
Continuity
-65°C Temperature Cycling
MIL-STD-883, method 1010, condition fail tested interval cycling cycl 1008 cycl 2016 cycl 4032 cycl
glassiv cracking
cycl
Corner Leakage
8064cycl
i.d. TA77958V TA78027V TA78095N TA78173N TA78294N TA78336N TA78574N TA78642N TA78733N TA78821N TA78907N TA78960V TA79045V TA79114V TA79185V
(9880STEP#58) (9880STEP#59) (9880STEP#60)
Corner Leakage
fctn
opens
continuity
glassiv cracking
fctn
-opens
glassiv cracking
Corner opens, Vdd/Vss shorts
Vdd/Vss shorts
Vdd/Vss short
(9880STEP#61)
continuity
(9880STEP#63) (9880STEP#64)
Vdd/Vss shorts
Corner opens
Corner opens
Vdd/Vss Short
(9880STEP#65) (9880STEP#66)
Vdd/Vss Short
Vdd/Vss Short
5-continuity func
Vdd/Vss Short
continuity
(9880STEP#67) (9880STEP#68) (9880STEP#69) (9880STEP#70) (9880STEP#71) (9880STEP#72) (9880STEP#73)
continuity
continuity
Corner Leakage
continuity
Corner Leakage
Vdd/Vss Short
Corner Leakage
corner leakage
continuity
continuity
Corner Leakage
-65°C Temperature Cycling
MIL-STD-883, method 1010, condition fail tested interval cycling cycl 1008 cycl 2016 cycl 4032 cycl
continuity
cycl
8064cycl
i.d. TA79267V TA79405V TA79510V TA79556V TA79690V
(9880STEP#74)
Vdd/Vss Short
Short
Vdd/Vss Short
passivation cracks
(9880STEP#75) (9880STEP#76) (9880STEP#77) (9880STEP#78)
Corner Leakage
Continuity
Continuity
open
Continuity
Continuity
TA79743V TA79934V TA80383N TA80446N TA80509V TA81032V TA81171V TA81315N TA81577N
(9880STEP#79) (9880STEP#80)
Continuity
open
Continuity
(9880STEP#81) (9880STEP#82) (9880STEP#83) (9880STEP#84) (9880STEP#85) (9880STEP#86) (9880STEP#87)
Continuity
Corner cracks
Corner cracks
-65°C Temperature Cycling
MIL-STD-883, method 1010, condition fail tested interval cycling cycl 1008 cycl 2016 cycl 4032 cycl
continuity
cycl 9880
(9.65x9.77mm)
8064cycl TA81315 TA81959 TA82456 TA82921 TA83227 TA83600 TA84712
i.d. 59124 60098 63420 65866 64677 70647 69500
PLCC
Polyimide coating
(425x425)
cont.
cont.
9880
(9.65x9.77mm)
glassiv cracking
glassiv cracking
TA12609B TA12610B TA12611Q TA12612Q
17680 17680 17680 17680
160LPQFP (402x402)
glassiv cracking
glassiv cracking
glassiv cracking
glassiv cracking
glassiv cracking
Humidity Immunity
route moisture ingress into AMI's plastic encapsulated microcircuits (PEMs) diffusion adsorbed water through bulk plastic. Historically, integrity leadframe-plastic interface major concern with molded plastic package reliability. relies subcontract packaging suppliers test guarantee performance packaging prevent difficulties with this interface. suppliers test their devices regular basis, data available upon request. packages meet minimum JEDEC standard method A112 level most smaller packages also meet level pack standard offering surface mount devices from AMI. classic expectation that failure will occur humidity because corrosion metallization rarely occurs. About only time classic aluminum corrosion happens rare occasions that peculiar void bubble molded into plastic package. While there likely number small, innocuous voids every molded plastic package, these corrosion causing voids peculiar because they must expose bonding encapsulated they also must have small vent surface package. Aluminum corrosion failure, then, occurs because acid salts captivated void2 during lead finish processing steps. Presently, appears that life limiting effects molded plastic packaging humidity arise from same effect" affects useable life limits PEMs high temperatures (ref. page 114). times longer than hours 121°C, 100%RH conditions PCT, same failure artifacts found ball bond lifts, leaving Au-Al bond intermetallic die's bonding pad. earliest papers phenomenon, such Gale reported Ea=0.8 Peck's original publication humidity acceleration model
life
where relative humidity,
8.617 10-5 eV/oK Boltzmann's constant, Kelvin temperature 273.16). reported parameter values Ea0.8 n=2.66. Peck's later analysis historical industry data indicated that Ea=0.9 correspondingly found Ea0.9 effect" plastics that were through mid-1980's. Gallo's workE firmly establishes belief that plastic's flame retardant responsible inherent life limitations PEMs humid well high temperature environments that activation energy likely been increased more modern plastics. Nevertheless, using Peck's parameter values makes clear venerable thousand hour test nothing more than 85°C static biased life test. life limiting effects which become apparent after more than hours will occur until times more than 5,500 hours 85°C, 85%RH. Furthermore, Peck's model implies that useable life PEM's least years environments extreme 104oF humidity
void innocuous there vent hole. other hand, void vent does expose bonding pad, failure humidity only occur loops bond wires enclosed void (i.e., leakage).
Temperature Humidity Bias
85oC, 85%RH, D.C. Bias fail tested interval 85°C operation cycl 168hr 85,85 soak precond 5203
(6.22x4.84mm)
hours
i.d. 9019202 9024106 9027402 9032004 9032105 9106610 9115102 9123107 9123105 9133210 9200506
PDIP (230x260)
cracked
mech (poly2)
Temperature Humidity Bias
85oC, 85%RH, D.C. Bias #fail/#tested interval exposure 1008hrs 1344 2688 i.d.
9649
(3.83x4.86mm)
SOIC (190x220) 9648
(2.57x3.07mm)
0/100
0/255 0/100
0/100
0/255 0/100
8AIR TA10142 TA10151
9832013 9832013
0/255
1/255
9803309
PDIP (150x190) 9679
(3.09x2.95mm)
PDIP (150x230) 9629
(2.46x4.51mm)
0/255 0/255 0/255 0/200 0/200 0/200 0/200 0/200 0/200 0/200 0/200 0/200 0/200 0/200 0/200 0/200 0/200 1/200
attach mat'l (corrosion)
0/255 0/255 0/255 1/200
scratched passivation/metal
22171 25892 22605 901214090 166409020 902064090 270409027 540903044 910064291
PDIP (220x160)
0/200 0/200 0/200 0/200 0/200 0/199 0/200
0/200
Temperature Humidity Bias
85oC, 85%RH, D.C. Bias #fail/#tested interval exposure 0/200 0/200 9723
(4.40x4.32mm)
0/200 0/200 0/400 0/400 1/400
inconclusive
1008hrs 0/200 0/200 0/400 2/400 0/400 0/400 1/398
(pkg) post) wedge bond fail
1344
2688
i.d. 030429105 9930541 993364439 9003141 9005941 9010350 9012141 9016642 9007515 9020641
PDIP (236x236)
0/400 0/400 0/400 0/400 0/398 0/400 0/400 0/400 0/399 0/400
0/400 0/398 0/400 1/400
particle poly-Si level
0/400 0/400 3/400
resid nitride bond pads
0/400 0/399 1/400
particle poly-Si level
0/399 4/400
3-metal pattern defect 1-contamination patterned poly
0/400 0/400 0/400 0/399 1/400 particle
poly-Si level
0/400 0/400 0/400 2/399
passivation photo defect
0/400 2/400
metal pattern defect particle poly-Si level
9024141 9027042 9030442 9034141 9100648 9103043
0/400 0/399 0/400 0/399
0/400 1/399
0/399
Temperature Humidity Bias
85oC, 85%RH, D.C. Bias #fail/#tested interval exposure 0/400 0/399 0/400 0/400 0/400 0/400 0/400 0/400 1/400
particle polySi level
inconclusive
1008hrs 1/400
metal pattern defect
1344
2688
i.d. 9105944 9109340 9112348 9117044 9118348 9121143 9124241 9127541 9125009 9126217
0/400 0/399 0/400 0/400 0/400 1/400
inconclusive
0/399 1/400
void molded body
0/400 0/400 0/400 1/400
inconclusive
0/400 0/400 0/400 0/400
5/400 particle
patterned metal
0/400
0/400 9743
(7.51x4.40mm)
PDIP (256x366)
9201422 9203608 9215487 9200720 9204618 9801517 9800618 9819819 9224172
5670
Temperature Humidity Bias
85oC, 85%RH, D.C. Bias #fail/#tested interval exposure
(4.49x5.11mm)
1008hrs
1344
2688
i.d. 9223871
PDIP (234x264) 2394
(4.67x4.15mm)
PDIP (260x266) 5591
(3.05x3.41mm)
0/180 0/135 0/180 0/180 0/180 0/135 0/180 0/180 0/180
gate rupture
97070039 71196097 12462170 5585 TA11551 TA11610 TA11479 TA11723 TA11765 TA11891 TA11750 9211604 9222111 9122761 9228040 9231641 9231641 9233063
PLCC (200x180)
0/135 1/180
FA930265
0/135
5884
(3.15x3.30mm)
PLCC (200x180)
Temperature Humidity Bias
85oC, 85%RH, D.C. Bias #fail/#tested interval exposure 5803
(3.33x4.60mm)
0/150 0/180 0/180 0/180 0/180 0/180 0/179 0/180 0/180 0/120 0/135 0/180 0/180 0/180 0/148 0/179 1/180
molding (pad corr) void
3/150
microcrack lkg?
1008hrs
1344
2688 TA11662 TA64227 TA77001 TA77525 TA77170 TA78047 TA78409 TA78743 TA79009 TA11361 TA11370 TA11410 TA11606 TA11713 11069 11151 11218 11258 11259 11309
i.d. 9231770 22328BA 26398A 29470B 31319EA 36939A 41394AB 44502A 47041A 9205270 9205270 9208761 9211607 9224742 9114070 9121142 9124242 9127542 9127542 9135645
0/150 0/180 0/180 0/180 0/180 0/180 0/180 0/180 0/180
PLCC (200x180)
0/180 0/179 1/180
fctn
0/180 0/180 0/179 0/180 0/180 0/120 0/135 0/180 0/180 0/180 0/148 0/179 0/179 0/179
5668
(3.06x5.08mm)
PLCC (240x290)
0/120 0/135 0/180 0/180 0/180 0/148 0/180 0/180 0/180
9723
(4.40x4.32mm)
PLCC (240x290)
1/180
resistive cntct
Temperature Humidity Bias
85oC, 85%RH, D.C. Bias #fail/#tested interval exposure 9753
(4.83x3.96mm)
0/150 0/179 0/180 0/180 0/178 0/179
0/150 0/179 0/180 0/180 0/178 0/179
1008hrs
1344
2688 TA11114 TA11132 TA11202 TA11216 TA11232 TA11284 TA11444
i.d. 9114071 9114071 9124244 9127544 9130544 9133146 9203220 9217404 9217404 9221806 9221611 9224306
PLCC (240x290)
0/150 1/180
conduc part metal
0/180 0/180 1/179
poly spur
1/180
gate
5351
(6.03x6.25mm)
PLCC (300x300)
TA11608 TA11616 TA11617 TA11635 TA11673 TA10712 TA10724 TA10717
9880
(9.65x9.77mm)
PLCC (425x425)
[see also
M1-M2
9016980 9016982
HAST
85%RH, D.C. Bias fail tested interval
i.d.
9880
(9.65x9.77mm)
PLCC (425x425)
fctn-shift
fctn-shift
Idds
TA76939V TA64651V TA76730V TA76503V TA64398V TA77150N TA77257N TA77358N TA77419N TA77627V TA77751N TA77829V TA77958V TA78027V TA78095N TA78173N TA78228N TA78294N TA78336N TA78574N TA78642N
(9880STEP#46) (9880STEP#47) (9880STEP#48) (9880STEP#49) (9880STEP#50) (9880STEP#52) (9880STEP#51) (9880STEP#54) (9880STEP#53) (9880STEP#57) (9880STEP#55) (9880STEP#56) (9880STEP#58) (9880STEP#59) (9880STEP#60) (9880STEP#61)
opens
func
(9880STEP#62) (9880STEP#63) (9880STEP#64) (9880STEP#65) (9880STEP#66)
HAST
85%RH, D.C. Bias fail tested interval
Idds
Passivation break
Idds .2mA
i.d. TA78733N TA78821N TA78907N TA78960N TA79045V TA79114V TA79185V TA79267V TA79405V TA79510V TA79556V TA79690V TA79743V TA79934V TA80383N TA80446V TA81032V TA81171V TA81315V TA81577V TA81718N TA81959N
(9880STEP#67) (9880STEP#68) (9880STEP#69) (9880STEP#70) (9880STEP#71) (9880STEP#72) (9880STEP#73) (9880STEP#74) (9880STEP#75) (9880STEP#76) (9880STEP#77) (9880STEP#78) (9880STEP#79) (9880STEP#80) (9880STEP#81) (9880STEP#82) (9880STEP#84) (9880STEP#85) (9880STEP#86) (9880STEP#87) (9880STEP#88) (9880STEP#89)
Short
Idds .2mA
Idds
Scratch metal level
HAST
85%RH, D.C. Bias fail tested interval
i.d.
6574
(6.72x6.7
100LPQFP (433x433)
Iddq
TA12679 TA12731 TA64068 TA12732 TA12787 TA12788 TA64210 TA12784
FA950480
21781 22007 22007 22007 22427 22427 22427 22692 22692
(6574STEP# (6574STEP# (6574STEP# (6574STEP# (6574STEP# (6574STEP# (6574STEP# (6574STEP# (6574STEP#10)
Iddq
Iddq
effect
TA64070 TA64389A TA76475Q TA76791Q TA76976Q TA77040Q TA77127A TA77197A TA77282A TA77481A TA77501A TA77676A
metal particle
(6574STEP# (6574STEP#12)
HAST
85%RH, D.C. Bias fail tested interval
fcnt
Iddq
i.d. TA77790A TA77877A TA77985A TA78059A TA78114A TA78213A TA78282A TA78479A TA78592A TA78685A TA78764A TA78839A TA78931A TA78941A TA79073A TA79136A TA79206A TA79362A TA79420A TA79541A TA79558A TA79681A TA79812A
(6574STEP#14) (6574STEP#11) (6574STEP#16) (6574STEP#17) (6574STEP#18) (6574STEP#15) (6574STEP#13) (6574STEP#19) (6574STEP#20) (6574STEP#21) (6574STEP#22) (6574STEP#23) (6574STEP#24) (6574STEP#25) (6574STEP#26) (6574STEP#27) (6574STEP#28) (6574STEP#29) (6574STEP#30) (6574STEP#31) (6574STEP#32) (6574STEP#33) (6574STEP#34)
function
opens
Iddq 230uA
HAST
85%RH, D.C. Bias fail tested interval
i.d. TA79942A
(6574STEP#35)
HAST Soak
85%RH, Unbiased fail tested interval
i.d.
9880
(9.65x9.77mm)
Idds=800µA
short
TA76939V TA64651V TA76730V TA76503V TA64398V TA77150N TA77257N TA77358N TA77419N TA77627V TA77751N TA77829V TA77958V TA78027V TA78095N TA78173N TA78228N TA68294N TA78336N TA78574N TA78642N TA78733N
(9880STEP#46) (9880STEP#47)
PLCC (425x425)
open
(9880STEP#48) (9880STEP#49) (9880STEP#50) (9880STEP#52) (9880STEP#51) (9880STEP#54) (9880STEP#53) (9880STEP#57) (9880STEP#55) (9880STEP#56) (9880STEP#58) (9880STEP#59) (9880STEP#60) (9880STEP#61) (9880STEP#62) (9880STEP#63) (9880STEP#64) (9880STEP#65) (9880STEP#66) (9880STEP#67)
Idds
Idds
HAST Soak
85%RH, Unbiased fail tested interval
Short
TA78821N TA78907N TA78960N TA79045V TA79114V TA79185V TA79267V TA79405V TA79510V TA79556V TA79690V TA79743V TA79934V TA80383N TA80446V TA81032V TA81171V TA81315V TA81577V TA81718V TA81959N
i.d.
(9880STEP#68) (9880STEP#69) (9880STEP#70) (9880STEP#71) (9880STEP#72) (9880STEP#73) (9880STEP#74) (9880STEP#75) (9880STEP#76) (9880STEP#77) (9880STEP#78) (9880STEP#79) (9880STEP#80) (9880STEP#81) (9880STEP#82) (9880STEP#84) (9880STEP#85) (9880STEP#86) (9880STEP#87) (9880STEP#88) (9880STEP#89)
HAST Soak
85%RH, Unbiased fail tested interval
i.d.
6574
(6.72x6.7
100LPQFP (433x433)
TA64389A TA76475Q TA76791Q TA76976A TA77040A TA77127A TA77197A TA77282A TA77481A TA77501A TA77676A TA77790A TA77877A TA77985A TA78059A TA78114A TA78213A TA78282A TA78479A TA78592A TA78685A TA78764A TA78839A TA78931A
(6574STEP# (6574STEP# (6574STEP# (6574STEP# (6574STEP# (6574STEP# (6574STEP# (6574STEP# (6574STEP#10) (6574STEP# (6574STEP#12) (6574STEP#14) (6574STEP#11) (6574STEP#16) (6574STEP#17) (6574STEP#18) (6574STEP#15) (6574STEP#13) (6574STEP#19) (6574STEP#20) (6574STEP#21) (6574STEP#22) (6574STEP#23) (6574STEP#24)
HAST Soak
85%RH, Unbiased fail tested interval
8730
(7.10x7.30
i.d. TA78941A TA79073A TA79136A TA79206A TA79362A TA79420A TA79541A TA79558A TA79681A TA79812A TA79942A TA80540A TA80536A TA80532A TA80619A TA82197A TA81522A TA82079A TA81515A TA81666A TA82558A TA81905A
(6574STEP#25) (6574STEP#26)
Iddq Iddq
(6574STEP#27) (6574STEP#28) (6574STEP#29) (6574STEP#30) (6574STEP#31) (6574STEP#32) (6574STEP#33) (6574STEP#34) (6574STEP#35)
100LPQFP (433x433)
(8730STEP# (8730STEP# (8730STEP#
continuity
(8730STEP# (8730STEP# (8730STEP# (8730STEP# (8730STEP#
(8730STEP# (8730STEP# (8730STEP#
Pressure Cooker Test (Autoclave)
121oC, 100%RH fail tested interval exposure 1040
2080
i.d.
5591
(3.05x3.41mm)
PLCC (200x180)
TA11551 TA11723 TA11765 TA11623 TA11891 TA11907 TA11968 TA12148 TA12287 TA11750 TA12500 TA12562 TA76864 TA11662 TA12091 TA12404 TA12563 TA77001
9211604 9228040 9231641 9222111 9231641 9232317 9304940 9318441 9309811 9233063 11615YA 15264 16111 16111 25740 9231770 9315670 12576A1 17126 17753 26398A
5884
(3.15x3.30mm)
contamination
PLCC (200x180)
5803
(3.33x4.60mm)
PLCC (200x180)
Pressure Cooker Test (Autoclave)
121oC, 100%RH fail tested interval exposure 1040
2080
i.d.
5668
(3.06x5.08mm)
PLCC (240x290)
TA11361 TA11370 TA11385 TA11410 TA11606 TA11713 TA11766 TA11892 TA11908 TA11967 TA12149 TA12286 TA12338 TA11069 TA11151 TA11218 TA11258 TA11259
9205270 9205270 9207207 9208761 9211607 9224742 9224208 9231241 9233942 9300541 9318442 100980A 114290A 9114070 9121142 9124242 9127542 9127542
substr defect
scratched
9723
(4.40x4.32mm)
gate
PLCC (240x290)
molding void
Pressure Cooker Test (Autoclave)
121oC, 100%RH fail tested interval exposure 1040
9753
(4.83x3.96mm)
2080
i.d. TA11114 TA11132 TA11202 TA11216 TA11232 TA11284 TA11310 TA11444 TA11608 TA11616 TA11617 TA11635 TA11673 TA10712 TA10724 TA10717 9016980 9016982 9114071 9114071 9124244 9127544 9130544 9133146 9135647 9203220 9217404 9217404 9221806 9221611 9224306
PLCC (240x290)
5351
(6.03x6.25mm)
PLCC (300x300)
9880
(9.65x9.77mm)
effect/pad corr
effect/pad corr
effect/pad corr
PLCC (425x425)
[see also
effect/pad corr
effect/pad corr
effect/pad corr
effect/pad corr
5591
(3.05x3.41mm)
TA11144 TA11162
9122063 9126870
PDIP (200x200)
Pressure Cooker Test (Autoclave)
121oC, 100%RH fail tested interval exposure 1040
2080
i.d.
5480
(4.49x5.11mm)
PDIP (265x265)
TA11030 TA11133 TA11135 TA11233 TA11234 TA12496A TA12554A TA12555A
9112171
9130541 9130541 15136.1 15358.1 13054.1 12200 12200 12200 12200 12200 12200 12200 12200 12200
6574
(6.71x6.7
100LPQFP (433x433) 9880
(9.65x9.77mm)
0/100
effect/pad corr
effect/pad corr
effect/pad corr
TA12345m TA12346m TA12347m TA12348m TA12349m TA12350m TA12351m TA12352m TA12353m
PLCC (425x425)
0/151
effect/pad corr
20/151
effect/pad corr
0/106
effect/pad corr
21/106
effect/pad corr
42/164 3/213
effect/pad corr
83/122 54/210
effect/pad corr
[see also
High Temperature Limitations PEMs
flame retardant most commercial plastics brominated epoxy that designed release antimony trioxide (Sb2O3) extinguish combustion plastic, should exposed high temperatures. This desirable property side-effect limiting useable life plastic encapsulated microcircuits (PEMs). Failure occurs high resistance open because formation Al2O3 layer between gold ball bond gold-aluminum bond intermetallic. been explained that this so-called effect" result free bromides functioning catalyst, stealing oxygen from Sb2O3, produce Al2O3 layer ball bondF,G,H. rule thumb, this life limiting failure mechanism begins appear storage operating life tests after roughly hours 205°C about hours 175°C. phenomenon seen 150°C because tests rarely ever carried 5,000-plus hours necessary effect" (Ea1.23 eV). Ultimately, electrical discontinuity results from formation oxide interface between ball Au-Al bond intermetallic. distinct failure analysis signature mechanism ball bonds lift, leaving intermetallic intact bonding effect" cause failure. probability failing because this effect", (t), after time hours exposure temperature described Weibull mortality model where 313586 1474
with 1.23 7.42; refer page being number electrical pins plastic encapsulated bond wires) 8.617386 10-5 eV/°K Kelvin temperature 273.16)
useable life PEMs (ref. Table page limited effect" commercial applications. 70°C, lifetime implied near 2,000 years. While roughly year lifetime 125°C advises some caution, PEMs suitable most rugged/military applications that only demand occasional exposure 125°C during required time use. instance, will have useable lifetime least years less than application life likely spent 125°C. useable life individual decreases number electrical pins (bond wires) increased3. with only electrical pins, example, will approximately times longer lived than with electrical pins. However, this does mean that increasing integration leads reduced system lifetimes. Probably just opposite, because increased integration generally leads fewer total component electrical pins system. total number bond wires system determines life limit system. reliability encapsulated bond wire 1-F, reliability system with bond wires,
regardless whether number wires total number encapsulated wires system several PEMs.
lifetime decreases, roughly, factor each 19-fold increase number electrical pins encapsulated bond wires).
Metal Integrity
Metal Electromigration
probability metal stripe failing time described log-normal distribution. time reach probability failure, given Black's model,
where, ttfx
(11)
time percent failures (hours), constant dependent upon stripe composition, geometry composition underlying overlying layers ({hours/cm2}.[amperes/cm2]n) width stripe (cm), thickness stripe (cm), current density stripe (amperes/cm2), current density exponent, activation energy (electron volts), Boltzmann's constant (8.62 10-5 eV/°K), Kelvin temperature stripe 273.16).
stressing consists forcing known current density through stripe (typically, current densities Mega-Amp/cm2) elevated temperature (from 150oC 220oC) monitoring electrical resistance4. These special structures have least connections Kelvin configuration source sink current monitoring voltage. resistance stripe versus stress time monitored failure time defined percentage resistance increase (for example, increase doubling stripe's resistance). With designs produced according design rules, task insuring immunity reduced process control issues monitoring cross sectional area lifetimes. metal interconnects flat, horizontal wafer surfaces, cross sectional area measured course fabrication measuring both deposited thickness metal width patterned metal lines (metal CD's) each wafer lot. Direct measurement cross-sectional area metal lines they pass over topological features, however, only done destructive physical analysis. This routinely done, using periodically fabricated wafers special technology characterization vehicle (TCV) designed this purpose occasionally sacrificing finished product wafers. case contacts (metal silicon) vias (metal metal contacts), measurements taken from cross-sections inside outside diameters metal corresponding point thinnest metal wall hole. cross sectional area then calculated
Area contact
where, outside diameter inside diameter
Accuracy measurements assured measuring metal stripes' coefficient thermal resistance prior starting test.
metal lines crossing other topological features (e.g., crossing over poly-Si line), cross-sectional area metal line estimated from traditional measurement step coverage, assuming that there coincident change linewidth.
Al-Si-Cu Electromigration
parameter values Black's equation (11), Ea=0.63 consistent with results designed experiments Al-Si-Cu metal that process technologies larger than micron. Typical electromigration results summarized below tests that were performed near 220C. process used monitor this metallization. Calculation 125C operation time 0.01% failure (T.01). A36158.1 A36158.1 A30888.1 A30888.1 A30388.1 A30388.1 A30388.1 Structure P+Con String Flat Step Flat P+Con String T.01 (use,yrs) 214.1 98.1 14.9 163.4
TiW/Al-Si-Cu/TiW Electromigration
Electromigration lifetime measurements TiW/Al-Si(1.0%)-Cu(0.5%)/TiW sandwich metallization used interconnection circuits micron smaller process technologies compiled following table. T0.01 values derived from log-normal regression data. These also listed 125°C years, corresponding life times projected Black's model worst case design rule conditions. extreme robustness this metallization arises from refractory metal cladding. Titanium-tungsten effectively immune electromigration high resistivity compared aluminum alloys. Consequently, most stripe current carried aluminum alloy. Voids extrusions will form because movement atoms, just unclad aluminum stripe. with cladding spanning voids, failure expected occur because extrusion contacting other stripes because steady increase electrical resistance. Nevertheless, "abrupt open" failures (which often characteristic unclad aluminum alloys) don't often occur. these stress levels, "extrusion shorts" sometimes seen, majority fails classified increase electrical resistance. Typical electromigration results summarized below tests that were performed near 220C. process processes used monitor this metallization. Calculation 125C operation time 0.01% failure (T.01). A36411.1 A36411.1 A36411.1 A22719.1 A22719.1 Structure Step Flat Step Step Flat T.01 (use,yrs) 11.4 16.4 12.1 34.5
Ti/Al-Cu/Ti Electromigration
AMI's uses Ti/Al-Cu(0.5%)/Ti sandwich metallization interconnection circuits micron smaller process technologies. same comments TiW/Al-Si-Cu/TiW apply this metallization process. Typical electromigration results summarized below tests that were performed near 220C. process processes used monitor this metallization. Calculation 125C operation time 0.01% failure (T.01). A28140.1 A28140.1 A28140.1 A28140.1 A28381.1 A28381.1 A28381.1 Structure V2CHNM3, V2CHNM2, V1CHNM1, P+CHNM1,1x1 V1CHNM1, V2CHNM2, V2CHNM3, T.01 (use, yrs) 34.9 12.2 86.3 56.2 37.5 38.7
Metal Stress Voiding Stress Migration
There inherent tendency voids form aluminum line because aluminum's large thermal expansion containment rigid glass films. simplistic terms, difference volume defined glass "box" volume aluminum line (were chemically bonded surrounding glass) must, eventually, appear voids metal line. mechanical rigidity glass "box" largely accounts fact that stress voiding becomes more prevalent with narrower metal lines, approaching line widths about microns. With wider metal lines, glass covering metal line effectively becomes more flexible compensates increasing portions volume differential. This volume differential change time, however, because relaxation stresses glass films changing shape containment "box." Silicon nitride films particularly problematic this regard, because their strong tendency relax larger area, circular, crosssectionI. This aspect stress voiding accelerated simple high temperature (upwards 450°C) heat treatments. Conceptually, think glass warping that volume differential remains fixed, independent temperature. Then, increasing temperature simply increases diffusivity aluminum atoms, accelerating process converting volume differential into voids. Otherwise, growth wedge shaped voids inherently found grain boundaries along edges aluminum lines complex dependence temperature, making thermal cycling only general means accelerating creation growth voids that must inevitably appear. There opposing factors: increasing temperature increases diffusivity aluminum atoms, thermal expansion aluminum decreases volume differential that driving force. Conversely, decreasing temperature increases driving force create (and/or grow) voids line, diffusivity aluminum reduced, slowing process. Even though there some temperature which rate void growth reaches maximum, difficult impossible) predict, leaving thermal cycling only general means accelerating stress migration.
Based behavior micron wide Al-Si(1%)-Cu(0.5%) metal lines,
noticeable stress voiding occurs only thick first level metal (M1) voids essentially fully developed fabricated, there apparent growth void size after fabrication, change within range normal voiding variation from metal line next, there appreciable reliability jeopardy presented stress voiding/migration (the maximum void dimension less than microns; effect electromigration lifetime represented variations found characterization Semiconductor's Al-Si-Cu metal electromigration lifetime).
results metal void inspections following various 400°C heat treatments (including 25°C 400°C cyclic treatment) summarized Table While apparent that heat treatments increase number (wedge-shaped) voids, change size voids within size distribution voids fabricated and/or accuracy with which void dimensions measured from images.
While there also indications that voids grow after fabrication, using less subjective measure electromigration (em) lifetime, growth sizes that still within normal range as-fabricated variation voiding from line next, fabricated. effects simple heat treatments lifetimes described regression model (for which only effect temperature larger than standard error value 0.050 factorial experiment), log10 1.984 0.087 0.024 0.038(
where 400oC storage 300oC storage hours time hours time
Likewise, with temperature cycling from -65oC 150oC, there change lifetimes, change represents only about normal line line variation lifetime; i.e., R2=0.241 model. cycles log10 (ttf) 2.165 0.437
Table Tabulation visible void counts found lines with various heat treatments. voids were wedge shaped, along edges lines. voids were found thick lines.
number voids line segments metal
hr,400oC bake untreated control treated
hr,400oC bake treated untreated control
hour cycled 400oC
hour bake
Carrier Immunity
carriers highly energetic electrons holes) transistors. They called "hot" because they have been accelerated intense electric field energies that well (i.e., several above their thermal equilibrium energy. nMOS transistor, carriers created drain (higher potential) transistor when operated near saturation. near-saturation, some fraction electrons become gate current effect exploited programming EPROM E2PROM memory transistors. other hand, electrons produced operating transistor saturation (i.e., Vd>Vdsat) creates negative charge oxide over drain channel, degrading transistor's current-voltage characteristics. general methodology testing immunity transistors deleterious effects carriers measure change three principle transistor parameters, Ids_linear, with time while d.c. bias stressed saturation. This data modeled fitting regression line logarithm measured parameter value change versus logarithm stress time. model then used extrapolate stress-time age, lifetime, corresponding percentage reduction transconductance (Gm) linear region drain current (Ids_linear), corresponding given reduction threshold voltage (VT). These lifetimes then extrapolated from stress voltages circuit voltage levels using either stress acceleration models:
Takeda's model
applicability which determined verifying that plot logarithm lifetime versus reciprocal drain voltage reasonably, straight line with slope Hu's model
applicability which often adequately determined from plotting log-lifetime versus logarithm substrate current, Isub, with ratio -(it/i) simply being slope straight line plot. slope should process independent with value approximately
These results customarily tabulated terms lifetime, corresponding reduction Ids_linear, corresponding reduction maximum rated operating supply voltage technology. Transistors with lifetimes shorter than year (107.5 sec) defined "susceptible" carrier effects. Also included trend plot substrate current show stability process. carrier results following tables were from testing performed when process qualified changed. Substrate current used regular monitor carrier effects part wafer level testing.
Micron Transistors C6(x) Processes
Table Carrier Lifetimes (N20x0.6 Transistor)
Temperature
Idsat
nMOS
25°C
Table
Carrier Lifetime
Temperature
Ring Oscillator Lifetime (10% frequency change)
Ring Oscillator (p10x.6/n5x.6)
25°C
Micron Transistors CW(x) Processes
lifetime nMOS transistor graphed function Leff. Lifetimes measured stressing transistors with accelerated drain voltage volts) gate voltage volts) monitoring shift several transistor parameters. parameters Idsat. These measured forward reverse directions (source drain interchanged with respect stressing conditions). extrapolated threshold, Idsat measured Vds=Vgs=5.5 volts. lifetime definition parameters shift (Idsat) shift (Vt). Lifetimes 25°C -55°C CW(x) process shown Table lifetimes which considered more appropriate circuit operation longer factor which takes into account transition time transistors. factor used here
Figure
electron lifetimes micron CW(x) Processes
Table
Carrier Lifetimes seconds (N20x0.8 Transistor)
20x0.8 nMOS pMOS
Temperature 25°C -55°C 25°C
>1010
>1010
Idsat 1011
Idsatr >1010
Micron Transistors CY(x) Processes
Stress Conditions: volts 6.5, 7.0, 7.5, volts
Table
carrier lifetimes CY(x) processes
20x1.0 lifetime (sec) 5.5V nMOS pMOS
measured with S-Drain same configuration stressed
measured with S-Drain reversed from stress configuration
>1010
Idsat 1010
>1010
Idsatr 1010 >1010
1.25 Micron Transistors CA(x) Processes
Table VIII
carrier lifetimes 1.25 micron CA(x) processes
nMOS lifetime (sec) 5.5V
measured with S-Drain same configuration stressed 1012 1012
Ids_lin 1015
measured with S-Drain reversed from stress configuration Ids_linr 1012 1017 1015
Stress Conditions:
volts 6.0, 6.5, volts
Micron Transistors AB(x) Processes
1.5µ Stress Conditions: volts 6.0, 6.5, volts 3.5µ Stress Conditions: volts 10.5, 11.0, 12.0 volts NOTE: missing entries correspond unrealistic measured lifetimes
Table
carrier lifetimes AB(x) processes
nMOS lifetime (sec) poly 5.5V poly @10.5V
measured with S-Drain same configuration stressed
Ids_lin
measured with S-Drain reversed from stress configuration Ids_linr 1034
1018
106.9
108.9
1035
106.3
Gate Oxide Reliability
Reliability gate oxide typically measured time dependent dielectric breakdown (TDDB) which electric field (below dielectric strength) applied time monitored until breakdown occurs. test structure used terminal device consisting gate oxide dielectric over substrate. Electric fields order achieve breakdowns within day. Since time breakdown depends electric field exponential way, small decrease electric field means large increase time breakdown. TDDB lengthy test. Alternate tests used throughput reasons. ramped voltage test applies increasing voltage capacitor monitors breakdown. This test very fast easy implement. Similarly ramped current tests quick easy implement. advantage current tests that charge through oxide easy calculate (which many researchers believe related breakdown). Vcjox test monitors test capacitor's voltage while constant current density passed though oxide. Vcjox test oxide defect densities listed Table calculated using criterion that measurement less than volts defines failed capacitor.
Table Vcjox gate ox
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