QUALITY SEMICONDUCTOR, INC. Guaranteed Skew 3.3V CMOS Clock Drive

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QUALITY SEMICONDUCTOR, INC. Guaranteed Skew 3.3V CMOS Clock Drive

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QS53806 QS532806 ADVANCE INFORMATION
QUALITY SEMICONDUCTOR, INC.
Guaranteed Skew 3.3V CMOS Clock Driver/Buffer
DESCRIPTION
QS53806 QS532806 ADVANCE INFORMATION
JEDEC compatible LVTTL level skew clock outputs Monitor output Clock inputs tolerant Pinout function compatible with QS5806 QS532806 on-chip resistors noise Input hysteresis better noise margin Guaranteed skew 0.3ns same bank 0.6ns opposite transition 1.0ns different devices Industrial temperature range Available QSOP SOIC (SO)
QS53806 QS532806 clock driver/buffer circuits used clock buffering schemes where skew parameter. QS53806 offers banks five inverting outputs. Designed QSI's proprietary QCMOS process, these devices provide propagation delay buffering with on-chip skew 0.3ns same-transition, same-bank signals. QS532806 on-chip series termination resistors lower noise clock signals. series resistor versions recommended driving unterminated lines with capacitive loading other noise sensitive clock distribution circuits. These clock buffer products designed high-performance workstations, embedded personal computing systems. Several devices used parallel scattered throughout system guaranteed skew, system-wide clock distribution networks.
Figure Functional Block Diagram
Application Note AN-21A more information low-skew clock buffers.
OA5-OA1 OB5-OB1
MDSC-00016-00 NOVEMBER 1997
QUALITY SEMICONDUCTOR, INC.
QS53806 QS532806 ADVANCE INFORMATION Figure Configurations (All Pins View)
QSOP, SOIC
VCCA GNDA GNDQ
VCCB GNDB
Table Description
Name OEA, INA, OAn, Function Output Enable Inputs Clock Inputs Clock Outputs Monitor Outputs (non-disable)
Table Absolute Maximum Ratings
Supply Voltage Ground -0.5V +7.0V Output Voltage VOUT -0.5V +7.0V Input Voltage -0.5V +7.0V Input Voltage (for pulse width 20ns) -3.0V Input Diode Current with -20mA Output Current Max. Sink Current/Pin 120mA Maximum Power Dissipation 85°C, QSOP 0.82 watts SOIC 0.75 watts TSTG Storage Temperature -65° +150°C
Note: Stresses greater than those listed under absolute maximum ratings cause permanent damage devices that result functional reliability type failures.
Table Capacitance
25°C, 1MHz, Pins Pins QSOP SOIC Unit
Note: Capacitance characterized tested.
QUALITY SEMICONDUCTOR, INC.
MDSC-00016-00 NOVEMBER 1997
QS53806 QS532806 ADVANCE INFORMATION Table Electrical Characteristics Over Operating Range
Industrial: -40°C 85°C, 0.3V Symbol Parameter Input HIGH Voltage Input Voltage Clamp Diode Voltage(3) Output HIGH Voltage Test Conditions Guaranteed Logic HIGH Inputs Guaranteed Logic Inputs Min., -18mA Min., -100µA Min., -8mA Output Voltage QS53806 Min., 100µA Min., 16mA Min., 24mA Output Voltage QS532806 IODH IODL ROUT Min., 100µA Min., Min., Input Leakage Current Max., 5.5V, 3.3V, VIL, 1.5V 3.3V, VIL, 1.5V Max., VOUT Output Leakage Current Max., VOUT 5.5V, VOUT Output HIGH Current(2) Output Current(2) Short Circuit Current(2,3) Output Resistance(4) QS532806 -0.5 -0.2 Typ(1) -0.7 -1.2 Unit
-100 -200
Notes: Typical values indicate 3.3V 25°C. more than output should used test this high power condition, duration second. Guaranteed design tested. Output resistance represents total output impedence logic device includes added series termination resistance.
MDSC-00016-00 NOVEMBER 1997
QUALITY SEMICONDUCTOR, INC.
QS53806 QS532806 ADVANCE INFORMATION Table Power Supply Characteristics
Symbol Parameter ICCD Quiescent Power Supply Current Supply Current Input HIGH Dynamic Power Supply Current Output(2) Total Power Supply(2,4) Current Examples Test Conditions(1) Max., Max., 3.0V Max., Outputs toggling duty cycle Max., duty cycle, 10MHz outputs Max., duty cycle, 2.5MHz outputs toggling 3.0V 3.0V Typ(3) 0.01 Unit
Notes: conditions shown Min. Max., appropriate values specified under specifications. Guaranteed tested. 0pF. Typical values reference only. Conditions 3.3V 25°C. (ICC)(DH)(NT) ICCD (fO)(NO) where: Input duty cycle Number HIGH inputs (one two) Output Frequency Number outputs (five ten)
QUALITY SEMICONDUCTOR, INC.
MDSC-00016-00 NOVEMBER 1997
QS53806 QS532806 ADVANCE INFORMATION Table Skew Characteristics Over Operating Range
Industrial: -40°C 85°C, 0.3V QS53806, CLOAD 50pF, RLOAD QS532806, CLOAD 50pF resistor) Symbol Description tSK(O1) tSK(O2) tSK(P)
(1,2)
0.35
Unit
tSK(T)
Skew between outputs same transition, same bank Skew between outputs same transition, different banks Pulse Skew: Skew between opposite transitions same output (tPHL-tPLH) Part part skew(3)
Notes: Skew parameters guaranteed production tested. Skew parameters apply propagation delays only. Test Circuit Waveforms. tSK(T) only applies devices same transition, part type, temperature, power supply voltage, loading, package speed grade.
Table Switching Characteristics Over Operating Range
Industrial: -40°C 85°C, 0.3V QS53806, CLOAD 50pF, RLOAD QS532806, CLOAD 50pF resistor)
Symbol Description(1,2) tPLH tPHL tPZL tPZH tPLZ tPZH
Unit
Propagation Delay(2) Output Rise Time, 0.8V 2.0V(3) Output Fall Time, 2.0V 0.8V Output Enable Time Output Disable Time(3)
Notes: Test Circuit Waveforms. Minimums guaranteed tested. propagation delay range indicated Min. Max. specifications results from process environmental variables. These propagation delay limits imply skew. This parameter guaranteed design tested.
MDSC-00016-00 NOVEMBER 1997
QUALITY SEMICONDUCTOR, INC.
QS53806 QS532806 ADVANCE INFORMATION Figure Test Circuits Waveforms
Parameter Tested
tPLZ, tPZL
Others Pulse Generator VOUT
Switch Position Closed Open
6.0V
50pF
Coax Oscilloscope
Pulse generator pulses: 1.0MHz; 2.5ns; 2.5ns
INPUT tPLH OUPUT tPHL 2.0V 1.5V 0.8V 1.5V
INPUT tPHL 1.5V tPLH OUPUT 1.5V
Propagation Delay
INPUT 1.5V
tPLH1 tPHL1
TSK(p)
tPHL tPLH
Pulse Skew tSK(p)
1.5V
INPUT
tPLHA tPHLA
1.5V
tSK(O1)
OUPUT
OUPUT
ENABLE
tSK(O1) tPLH2
OUPUT
tSK(O2)
1.5V
tSK(O2) 1.5V tPLHB tPHLB
1.5V
OUPUT
tPHL2
tSK(O1) tPLH2 tPLH1 tPHL2 tPHL1
tSK(O2) tPLHB tPLHA tPHLB tPHLA
Output Skew (Same Bank) tSK(O1)
Ouput Skew (Different Banks) tSK(O2)
DISABLE
INPUT
tPLH1 tPHL1
1.5V
CONTROL INPUT tPZL OUTPUT NORMALLY SWITCH CLOSED tPZH OUTPUT NORMALLY HIGH SWITCH OPEN 1.5V 1.5V 0.3V tPHZ 0.3V tPLZ
1.5V
PART OUTPUT
tSK(t)
1.5V
tSK(t) 1.5V tPLH2 tPHL2
PART OUTPUT
tSK(t) tPLH2 tPLH1or tPHL2 tPHL1
Enable Disable Times
Part-to-Part Skew tSK(t)
QUALITY SEMICONDUCTOR, INC.
MDSC-00016-00 NOVEMBER 1997

QUALITY SEMICONDUCTOR, INC. Guaranteed Skew 3.3V CMOS Clock Drive

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