QUALITY SEMICONDUCTOR, INC. Guaranteed Skew 3.3V CMOS Clock Drive
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QS53805, QS532805
QUALITY SEMICONDUCTOR, INC.
Guaranteed Skew 3.3V CMOS Clock Driver/Buffer
DESCRIPTION
QS53805 QS532805
output, skew clock signal buffer Pinout function compatible with QS5805T JEDEC compatible LVTTL inputs outputs Input hysteresis better noise margin QS532805 on-chip resistors noise Monitor output Guaranteed skew: 0.30ns output skew 0.50ns pulse skew 1.0ns part-to-part skew Clock inputs tolerant Industrial temperature range Available QSOP SOIC packages
QS53805 clock buffer/driver circuits used clock buffering schemes where skew parameter. This device offers banks non-inverting outputs. QS53805 device provides propagation delay buffering with on-chip skew 300ps same-transition, same-bank signals. QS532805 includes features QS53805, also incorporates series termination resistors. This clock buffer product designed high performance workstations, embedded personal computing systems using 3.0V 3.6V supply voltages. Several used parallel scattered throughout system guaranteed skew, system-wide clock distribution networks. Both QS53805 QS532805 accept input control signals.
Figure Functional Block Diagram
OA5-OA1 OB5-OB1
Note: QS532805 series termination resistor each clock output including monitor.
MDSC-00013-04 JANUARY 1999
QUALITY SEMICONDUCTOR, INC.
QS53805, QS532805 Table Description
Name OEA, INA, OAn, Functional Description Output enable Clock inputs Clock outputs Monitor output (does 3-state)
VCCA GNDA GNDQ
Figure Configuration
(All Pins View) QSOP, SOIC
VCCB GNDB
Table Capacitance
25°C, 1MHz, VOUT QSOP Pins COUT SOIC
Unit
Note: Capacitance characterized tested.
Table Absolute Maximum Ratings
Supply Voltage Ground -0.5V 7.0V Output Voltage VOUT -0.5V 0.5V Input Voltage -0.5V 7.0V Input Voltage (for pulse width 20ns) -3.0V Input Diode Current with -20mA Output Current Max. sink current/pin 120mA Maximum Power Dissipation 70°C, QSOP watts SOIC 0.92 watts TSTG Storage Temperature -65° 150°C
Note: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage. This stress rating only function operation near these ratings implied. Exposure Absolute Maximum Rating conditions extended periods affect reliability.
Table Recommended Operating Conditions
Symbol VOUT Description Power Supply Voltage Input Voltage Voltage Applied Outputs Ambient Operating Temperature Unit
QUALITY SEMICONDUCTOR, INC.
MDSC-00013-04 JANUARY 1999
QS53805, QS532805 Table Electrical Characteristics Over Operating Range
Industrial: -40°C 85°C, 3.3V ±0.3V Symbol Parameter Input HIGH Voltage Input Voltage Clamp Diode Voltage(3) Output HIGH Voltage Test Conditions Guaranteed Logic HIGH Inputs Guaranteed Logic Inputs Min., -18mA Min., -100µA 3.0V, -8mA Output Voltage QS5805 Min., 100µA 3.0V, 16mA 3.0V, 24mA Output Voltage QS532805 Min., 100µA Min., 3.0V, IODH IODL ROUT Input Leakage Current Max.,0 3.3V, 1.5V(2) 3.3V, 1.5V(2) Max., VOUT Min. Output Leakage Current Max., Outputs High-Z Output HIGH Current Output Current Short Circuit Current(2,3) Output Resistance(4) QS532805 -0.5 VCC-0.2 Typ(1) -0.7 -1.2 Unit
-100 -200
Notes: Typical values indicate 3.3V 25°C. more than output should used test this high power condition, duration second. Guaranteed design tested. Output resistance represents total output impedence logic device includes added series termination resistance.
Table Power Supply Characteristics
Symbol QCCD Parameter Quiescent Power Supply Current Supply Current input HIGH Dynamic Power Supply Current Output Test Conditions Max., Max., -0.6V, 0MHz Max., GND, Output Toggling Duty Cycle Typ(3) 0.01 Unit
Notes: conditions shown Min. Max., appropriate values specified under specifications. Guaranteed design tested. 0pF. Typical values reference only. Conditions 3.3V 25°C. (ICC)(Dh)(Ni) QCCD(fo)(No) where: Input duty cycle, Number inputs Output Frequency, Number outputs
MDSC-00013-04 JANUARY 1999
QUALITY SEMICONDUCTOR, INC.
QS53805, QS532805 Table Skew Characteristics Over Operating Range
Industrial: -40°C 85°C, 3.3V ±0.3V QS53805, CLOAD 50pF, RLOAD QS532805, CLOAD 50pF resistor) Symbol tSK(01) tSK(02) tSK(p) Description(1,2) Skew between outputs same transition, same bank Skew between outputs same transition, different banks Pulse Skew: Skew between opposite transitions transitions same output (tPHL-tPLH) Part-to-part skew(3) 0.35 B(4) C(4)
Unit
tSK(t)
Notes: Skew parameters guaranteed production tested. Skew parameters apply propagation delays only. Test Circuits Waveforms. tSK(t) only applies devices same transition, part type, temperature, power supply voltage, loading, package speed grade. SOIC package available speed only.
Table Switching Characteristics Over Operating Range
Industrial: -40°C 85°C, 3.3V ±0.3V QS53805, CLOAD 50pF, RLOAD QS532805, CLOAD 50pF resistor)
Unit
Symbol tPLH tPHL tPZL tPZH tPLZ tPHZ
Description(1,2) Propagation Delay Output Rise Time, 0.8V 2.0V(3) Output Fall Time, 2.0V 0.8V Output Enable Time(3) Output Disable Time(3)
Notes: Test Circuits Waveforms. Minimums guaranteed tested. propagation delay range indicated Min. Max. specifications results from process environmental variables. These propagation delay limits imply skew. Guaranteed design subject production testing.
QUALITY SEMICONDUCTOR, INC.
MDSC-00013-04 JANUARY 1999
QS53805, QS532805 Figure Test Circuits Waveforms
Pulse Generator VOUT Parameter Switch Tested Position Closed tPLZ, tPZL Others 6.0V Open
1.5V tPHL 1.5V
50pF
Coax Oscilloscope
Pulse generator pulses: 1.0MHz; 2.5ns; 2.5ns
INPUT tPLH OUPUT tPHL 2.0V 1.5V 0.8V 1.5V
INPUT
tPLH OUPUT
Propagation Delay
1.5V
INPUT
tPLHA
tSK(p) tPHL tPLH
Pulse Skew tSK(p)
1.5V
INPUT
tPLH1
OUPUT
OUPUT
ENABLE
tPHL1
1.5V
tSK(01) 1.5V
tPHLA
OUPUT
1.5V
tSK(02) tSK(02) 1.5V tPLHB tPHLB
tSK(01)
OUPUT
tPLH2
tPHL2
tSK(01) tPLH2 tPLH1 tPHL2 tPHL1
tSK(02) tPLHB tPLHA tPHLB tPHLA
Output Skew (Same Bank) tSK(01)
DISABLE CONTROL INPUT tPZL OUTPUT NORMALLY SWITCH CLOSED tPZH OUTPUT NORMALLY HIGH SWITCH OPEN 1.5V tPLZ 3.5V 1.5V
Output Skew (Different Banks) tSK(02)
INPUT tPLH1 PART OUTPUT tPHL1 1.5V 1.5V tSK(t) tSK(t) 1.5V tPLH2 tPHL2
1.5V 0.3V tPHZ 0.3V
PART OUTPUT
tSK(t) tPLH2 tPLH1 tPHL2 tPHL1
Enable Disable Times MDSC-00013-04 JANUARY 1999
Part-to-Part Skew tSK(t)
QUALITY SEMICONDUCTOR, INC.
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