Description device consists four independent channels codec digit
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T8535/T8536 Quad Programmable Codec
Description
device consists four independent channels codec digital signal processing functions chip. addition classic A-to-D D-to-A conversion, each channel provides termination impedance synthesis hybrid balance network. device controlled serial microprocessor interface, series bidirectional leads provided that this control mechanism utilized operate battery feed device, ringing voltage switches, etc. Common data clock paths shared over number devices. filter coefficients, signal processing, SLIC, test features accessible through this interface. This serial interface operated speeds 4.096 Mbits/s. choice also programmable, with channel capable being assigned time slot. operated speeds 16.384 Mbits/s, allowing maximum time slots. Separate transmit receive interfaces available 4-wire designs, they strapped together 2-wire bus. device available three packages. T8536 64-pin TQFP features five data latches channel, ports. T8536 68-pin PLCC features data latches channel, port. T8535 44-pin PLCC same features 68-pin PLCC data latches. PLCC package options compatible with T8533/T8534 Quad Programmable Line Card Signal Processor with Echo Cancellation.
operation Per-channel programmable gains, equalization, termination impedance, hybrid balance Programmable µ-law, linear, A-law modes programmable ports with single double clocking modes time slots frame Supports data rates kbits/s 16.384 Mbits/s Double clock mode timing compatible with ISDN standard interfaces Fully programmable time-slot assignment with offset Analog digital loopback test modes Serial microprocessor interface Normal byte-by-byte control modes Fast scan mode bidirectional control leads channel, SLIC line card function control Differential analog output Mates directly SLICs, eliminating external components Sigma-delta converters with dither noise reduction Quad design minimize package count dense line card applications
T8535/T8536 Quad Programmable Codec
Block Diagram
POWER GROUND
ANALOG GAIN CONVERTER DIGITAL LOOPBACK ANALOG LOOPBACK DIGITAL LOOPBACK
DIGITAL GAIN (GAIN TRANSFER)
CHANNEL
COMMON
ANALOG LOOPBACK DIGITAL LOOPBACK
TO/FROM SLIC
TERMINATION IMPEDANCE
HYBRID BALANCE NETWORK
µ-LAW A-LAW CONVERSION
INTERFACE
TO/FROM
CONVERTER ANALOG BUFFER DIGITAL GAIN (GAIN TRANSFER) CONTROL DATA SIGNALS
BCLK
SLIC CONTROL LATCHES CHANNEL
MICROPROCESSOR CONTROL
FREQUENCY SYNTHESIZER
FILTER
COMMON
SERIAL CONTROL INTERFACE
5-7172F
MCLK
additional information, contact your Microelectronics Group Account Manager following: http://www.lucent.com/micro INTERNET: docmaster@micro.lucent.com E-MAIL: AMERICA: Microelectronics Group, Lucent Technologies Inc., Union Boulevard, Room 30L-15P-BA, Allentown, 18103 1-800-372-2447, 610-712-4106 CANADA: 1-800-553-2448, 610-712-4106) ASIA PACIFIC: Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., Science Park Drive, #03-18 Cintech III, Singapore 118256 Tel. (65) 8833, (65) 7495 CHINA: Microelectronics Group, Lucent Technologies (China) Co., Ltd., A-F2, 23/F, Fong Universe Building, 1800 Zhong Shan Road, Shanghai 200233 China Tel. (86) 6440 0468, ext. 316, (86) 6440 0652 JAPAN: Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan Tel. (81) 5421 1600, (81) 5421 1700 EUROPE: Data Requests: MICROELECTRONICS GROUP DATALINE: Tel. (44) 1189 299, (44) 1189 Technical Inquiries: GERMANY: (49) 95086 (Munich), UNITED KINGDOM: (44) 1344 (Ascot), FRANCE: (33) (Paris), SWEDEN: (46) (Stockholm), FINLAND: (358) 4354 2800 (Helsinki), ITALY: (39) 6608131 (Milan), SPAIN: (34) 1441 (Madrid)
Lucent Technologies Inc. reserves right make changes product(s) information contained herein without notice. liability assumed result their application. rights under patent accompany sale such product(s) information.
Copyright 1999 Lucent Technologies Inc. Rights Reserved Printed U.S.A.
1999 PN99-108ALC
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