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CPC710-133 Bridge SDRAM Memory Controller Highlights Provide
Top Searches for this datasheetSingle-chip solution connecting four PowerPC processors CPC710-133 Bridge SDRAM Memory Controller Highlights Provides high-performance single-chip system controller PowerPC® processor designs geared high-throughput applications Features integrated 133MHz SDRAM controller with support industry-standard memory 133MHz 2.5V interface with internal arbiter that supports multiple processors Dual interfaces ease board design provide design flexibility Multiple internal data paths support high-speed data transfers between interfaces integrated, full-featured design enables wide range configurations geared diverse requirements. Implemented CPU1 CPU2 each bus, along with multiple data paths, allow concurrent non-blocking transfers support fast-access IBM's SA-12e process technology, designs. 7XX/6XX CPC710-133 controller takes advantage PowerPC IBM's advanced ASIC capabilities deliver exceptional price/performance 64+4 bits satisfy price-sensitive applications. PowerPC 60x/7xx Processor Interface PowerPC Processor Interface CPU3 CPU4 SDRAM SDRAM Memory Controller versatile CPC710-133 memory con64+8 bits troller supports wide range SDRAM industry-standard memories, enabling Controller customers choose cost-effective solu- Offering speeds 133MHz tions their applications. memory Reset Internal Clocks 2.5V), CPC710-133 interface Control controller supports 133MHz SDRAMs, Controller JTAG implements 64-bit data PC133-compliant SDRAM modules 32-bit address with internal 33MHz PCI-Bus arbitration logic that supports four PowerPC processors DIMMs, registered SDRAM DIMMs. 66MHz Designers 256Mb memories 4-bank configurations pipelining outstanding design64 3.5GB DIMMs. transactions. Additionally, separate dual Block diagram provides high reliability, CPC710-133 CPC710-133 32-byte load buffers without performance penalty, using 7XX/6XX PowerPC 64+4 bits SDRAM 64+8 bits SDRAM Controller Robust features support diverse high-speed designs CPC710-133 Bridge SDRAM Memory Controller single-chip solution applications requiring high throughput, including networking devices such access routers, gateways, equipment switches, real-time-data signal-processing applications. CPC710-133 controller's highly PowerPC 60x/7xx Processor Interface Reset Clocks JTAG Internal Control Controller 33MHz PCI-Bus 66MHz CPC710-133 block diagram CPC710-133 Block diagram CPC710-133 Bridge SDRAM Memory Controller Specifications Technology Peak performance 0.25um CMOS SA-12e 132MBps 32-bit bus@33MHz 528MBps 64-bit bus@66MHz 1,064MBps memory bandwidth PCI-32 Interface clock: 33MHz PCI-64 Interface clock: 66MHz PowerPC bus: 133MHz, 100MHz 2.1W@133MHz typical (estimate) 3.3V +/-5% (I/O logic) 2.5V +/-2.5% (core logic) -40oC 70oC ambient (85oC junction) -65oC 150oC 728-contact, 1.27mm pitch, 35x35mm, FC-PBGA with direct attach (DLA) Part number IBM25CPC710CF3B133 Copyright Corporation 2002 Rights Reserved Printed United States America 4-02 following trademarks International Business Machines Corporation United States, other countries, both: Logo PowerPC Other company, product service names trademarks service marks others. information contained this document subject change without notice. products described this document intended implantation other life support applications where malfunction result injury death persons. information contained this document does affect change product specifications warranties. Nothing this document shall operate express implied license indemnity under intellectual property rights third parties. information contained this document obtained specific environments, presented illustration. results obtained other operating environments vary. INFORMATION CONTAINED THIS DOCUMENT PROVIDED BASIS. event will liable damages arising directly indirectly from information contained this document. Microelectronics Division 2070 Route Bldg. Hopewell Junction, 12533-6351 home page found ibm.com. Microelectronics Division home page found ibm.com /chips. receive latest updates PowerPC technical information from Microelectronics, subscribe tech e-mail ibm.com/chips/newsbriefs. Clocking Power dissipation Power supply Temperature range Storage temperature Signal I/Os Packaging 8-bit capability single-bit error correct double-bit error detection. Dual Interfaces other chip features Interfaces range other features enhance design flexibility help enable manufacturers take advantage faster 64-bit devices well widely available 32-bit peripherals. Programmable Little/Big Endian byte order conversion Support internal external arbitration boot 256MB extended FLASH support 32-bit Additional features Single-channel, chained Controller Ability address program features configuration registers from processor IEEE 1149. JTAG port Dual Interfaces Fully compliant with Revision 32-bit, 33MHz (3.3V I/O, supports signaling) 64-bit, 66MHz (3.3V, supports only signaling) Programmable base address register, providing memorymapping flexibility master/slave with burst operation more information, visit site www.ibm.com/powerpc Other recent searchesPCF8811 - PCF8811 PCF8811 Datasheet MUBW25-06A6K - MUBW25-06A6K MUBW25-06A6K Datasheet HVL355C - HVL355C HVL355C Datasheet HD6475208F10 - HD6475208F10 HD6475208F10 Datasheet FM30C256 - FM30C256 FM30C256 Datasheet FM30C256-S - FM30C256-S FM30C256-S Datasheet BGA372B - BGA372B BGA372B Datasheet AN3497SB - AN3497SB AN3497SB Datasheet
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