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Reusable processor cores high performance system-on-a-chip application
Top Searches for this datasheetPowerPC® Embedded Cores Reusable processor cores high performance system-on-a-chip applications Highlights Compatible with scalable flexible PowerPC instruction architecture facilitate code reuse Optimized high performance, cost, power consumption system-on-a-chip (SOC) designs Supports product differentiation inclusion custom logic and/ cost JTAG Trace FIFO ports enable robust debug capabilities, even complex designs Available Blue Logiccore library integration with peripheral applicationspecific macro cores develop solutions Supported over third-party vendors IBM's PowerPC Embedded ToolsProgram Full-function simulation models available support SWIFT compliant VHDL Verilog simulation environments PowerPC Compatible with PowerPC User Instruction Architecture Five-stage pipeline 32-bit general purpose registers Hardware multiply divide Branch prediction Cache Controllers Separate cache units Fill-first, data forwarding Non-blocking flush operations Programmable loads store Memory Management Unit Variable page sizes KB-16 64-entry fully-associative Interfaces Processor Local (PLB) Auxiliary Processing Unit (APU) On-Chip Memory (OCM) JTAG Timers 64-bit time-base Programmable interval timer Fixed interval timer Watchdog timer Debug Support Instruction Address, Data Address, Data Value breakpoints Real-time non-invasive trace Exclusive traceback capability Master Inst. Instruction Shadow Entry) Fetch 3-Element Fetch Decode Queue Logic Timers (FIT, PIT, Watchdog) I-Cache I-Cache Array Controller Instruction Cache Unit Cache Units Data Cache Unit D-Cache D-Cache Array Controller Unified Entry) Timers Debug Execute Unit (EXU) Data Shadow Entry) Debug Logic IAC, DAC, DVC) Master Data APU/FPU JTAG Instruction Trace PowerPC 405xx Core block diagram Specifications Technology 405A3 .25µm (.18µm Leff) CMOS SA-12E 2mm2 200WC1 300TC1 200MHz 300MHz 1.0W @200MHz 2.5V 405B3 .25µm (.18µm Leff) CMOS SA-12E 2mm2 200WC1 300TC1 200MHz 300MHz 650mW @200MHz 2.5V 405D4 .18µm (.11µm eff) CMOS SA-27E 1.4mm2 266WC2 390TC2 266MHz 390MHz 500mW @266MHz 1.8V Copyright International Business Machines Corporation 1999, 2000 Rights Reserved Printed United States America 5-00 following trademarks International Business Machines Corporation United States, other countries, both: Logo Blue Logic CodePack PowerPC CoreConnect PowerPC Logo PowerPC Embedded Tools Core Size (est.) Frequency (MHz) Performance (Dhrystone MIPS) Power Dissipation (estimated, typical) Voltage Cache D-Cache Timers JTAG Trace FIFO Other company product service names trademarks service marks others. information contained this document subject change without notice. products described this document intended implantation other life support applications where malfunction result injury death persons.The information contained this document does affect change IBM's product specifications warranties. Nothing this document shall operate express implied license indemnity under intellectual property rights third parties. information contained this document obtained specific environments, presented illustration. results obtained other operating environments vary INFORMATION CONTAINED THIS DOCUMENT PROVIDED BASIS. event will liable damages arising directly indirectly from information contained this document. Microelectronics Division 1580 Route Bldg. Hopewell Junction, 12533-6351 home page found ibm.com. Microelectronics Division home page found www.chips.ibm.com. Worst case conditions (2.3V, slow silicon) Typical conditions (2.5V, nominal silicon) Typical conditions (1.8V nominal silicon) Worst case conditions (1.65V, slow silicon) PowerPC Core Integration Through CoreConnect architecture, PowerPC cores integrate on-chip with other reusable peripheral application-specific cores, such controllers CodePack code decompression shown example below. High speed, high bandwidth peripherals, like core, directly attach processor local (PLB). Less performance-critical cores attach on-chip peripheral (OPB). PowerPC cores CoreConnect available through Blue Logic core library help reduce time market designs. more information Microelectronics core offerings, view Blue Logic core library contact your local Microelectronics sales office. SDRAM Controller CodePack External External Peripheral Master Controller Controller Interface On-Chip Peripheral (OPB) Arbiter UART Processor Local (PLB) 64-Bit UART Bridge I-Cache D-Cache JTAG Trace Timers SRAM SRAM Control Controller GPIO 32-Bit PowerPC 405B3 Core Interrupt Controller 10/100 Ethernet Arbiter PowerPC 405GP embedded processor showing integration 405B3 core GK21-0269-01 *07GK21026901* Other recent searchesZFAT-R512 - ZFAT-R512 ZFAT-R512 Datasheet WSH41F - WSH41F WSH41F Datasheet V850ES - V850ES V850ES Datasheet UDZS13B - UDZS13B UDZS13B Datasheet FJAF4310 - FJAF4310 FJAF4310 Datasheet BD241 - BD241 BD241 Datasheet 66186 - 66186 66186 Datasheet
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