output current channel Independent overcurrent protection each driver

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output current channel Independent overcurrent protection each driver

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Protected Quad Power Driver
output current channel Independent overcurrent protection each driver Thermal protection device each driver output-saturation voltage Integral output flyback diodes CMOS-compatible inputs
Description
Providing improved output current limiting, UDK, UDN, UDQ2559B, quad power drivers combine logic gates high-current bipolar outputs with complete output protection. Each four outputs sink state. outputs have minimum breakdown voltage (load dump) sustaining voltage inputs compatible with CMOS logic systems. Overcurrent protection each channel been designed into these devices activated approximately protects each output from short circuits with supply voltages When output current trip point reached, that output stage driven linearly resulting reduced output current level. over-current short-circuit condition continues, thermal-limiting circuits will first sense rise junction temperature then rise chip temperature, further decreasing output current. Under worst-case conditions, these devices will tolerate short circuits outputs, simultaneously. These devices used drive various loads including incandescent lamps (without warming limiting resistors) inductive loads such relays, solenoids, stepping motors.
Packages:
16-pin with exposed thermal tabs package)
28-pin PLCC (Package
16-pin SOICW with internally fused pins package) scale
packages offer fused leads enhanced thermal dissipation. Package 16-pin power with exposed tabs, 28-lead power PLCC, 16-lead power wide-body SOIC surface-mount applications. lead (Pb) free versions have 100% matte leadframe plating.
Functional Block Diagram
Channels) OUTN ENABLE
Thermal Limit
29317.14J
Protected Quad Power Driver
Selection Guide
Part Number
UDN2559B-T UDN2559EBTR-T UDN2559LBTR-T* UDQ2559B-T* UDQ2559LBTR-T UDK2559B-T UDK2559EBTR* UDK2559EBTR-T UDK2559LBTR* UDK2559LBTR-T
*Variant
Pb-free
Package
16-pin DIP, exposed tabs 28-lead PLCC 16-lead SOIC 16-pin DIP, exposed tabs 16-lead SOIC 16-pin DIP, exposed tabs 28-lead PLCC 28-lead PLCC 16-lead SOIC 16-lead SOIC
Packing
tube reel 1000 reel tube 1000 reel tube reel reel 1000 reel 1000 reel
Ambient Temperature (°C)
production been determined DESIGN. This classification indicates that sale variant currently restricted existing customer applications. variant should purchased design applications because obsolescence near future probable. Samples longer available. Status change: 2009.
Absolute Maximum Ratings
Characteristic Supply Voltage Input Voltage Range Output Voltage Overcurrent-Protected Output Voltage Output Current Symbol VIN, VOUT VOUT(P) IOUT Outputs peak current limited approximately driver. Circuit Description Application section further information. Range Operating Ambient Temperature Maximum Junction Temperature Storage Temperature TJ(max) Tstg Range Range Notes Rating Units
Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
Protected Quad Power Driver
Pin-out Diagrams
Package
Package
OUT4 OUT3 GROUND GROUND OUT2 OUT1
ENABLE GROUND GROUND
GROUND GROUND
ENABLE GROUND GROUND
Dwg. PP-017-1
Dwg. PP-017-6
Package
CONNECTION
GROUND GROUND GROUND GROUND
CONNECTION
SUPPLY
ENABLE
OUT2
OUT1
Dwg. PP-019-1
Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
Protected Quad Power Driver
Thermal Characteristics
Characteristic Symbol Test Conditions*
Package 2-layer with exposed copper each side Package Thermal Resistance Package 1-layer with copper limited solder pads Package 1-layer with copper limited solder pads *Additional thermal information available Allegro website
Value Units
(VOUT1 IOUT1 (VOUTn IOUTn (VCC ICC) TA)/RJA
Copyright 1995, 2002 Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
Protected Quad Power Driver
ELECTRICAL CHARACTERISTICS +25°C (prefix `UDN') over operating temperature range (prefix `UDK' `UDQ'), 4.75 5.25
Limits Characteristic Output Leakage Current Symbol ICEX Test Conditions VOUT VOUT Output Sustaining Voltage Output Saturation Voltage VOUT(SUS) VOUT(SAT) IOUT Devices, IOUT Devices, IOUT package only, IOUT Over-Current Trip Input Voltage ITRIP Logic Logic Input Current Logic Logic Total Supply Current* VIN(1) VEN(1) VIN(0) VEN(0) VIN(1) VEN(1) VIN(0) VEN(0) Outputs Outputs Clamp Diode Forward Voltage Clamp Diode Leakage Current Turn-On Delay tPHL tPLH Thermal Limit IOUT IOUT Min. Typ. <1.0 <1.0 Max. Units
Typical Data design information only. Negative current defined coming (sourcing) specified terminal. used here, -100 defined greater than (absolute magnitude convention) minimum implicitly zero. inputs simultaneously, other tests performed with each input tested separately.
Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
TYPICAL OUTPUT CHARACTERISTIC
Protected Quad Power Driver
CIRCUIT DESCRIPTION APPLICATION
INCANDESCENT LAMP DRIVER High incandescent lamp turn-ON/in-rush currents contribute poor lamp reliability destroy semiconductor lamp drivers. Warming currentlimiting resistors protect both driver lamp significant power either when lamp when lamp respectively. Lamps with steady-state current ratings driven these devices without need warming (parallel) current-limiting (series) resistors. When incandescent lamp initially turned cold filament minimum resistance would normally allow in-rush current. With these drivers, during turn-ON, high in-rush current sensed internal low-value sense resistor. Drive current output stage then diverted shunting transistor, load current momentarily limited approximately During this short transition period, output current reduced value dependent supply voltage filament resistance. During lamp warmup, filament resistance increases maximum value, output stage goes into saturation applies maximum rated voltage lamp. INDUCTIVE LOAD DRIVER Bifilar (unipolar) stepper motors, relays, solenoids driven directly. internal flyback diodes prevent damage output transistors suppressing high-voltage spikes that occur when turning inductive load. rapid current decay (fast turn-OFF speeds), Zener diodes will raise flyback voltage inprove performance. However, peak voltage must exceed specified minimum sustaining voltage (VSUPPLY VOUT(SUS)). FAULT CONDITIONS event shorted load, load current will attempt increase. described above, drive current affected output stage reduced, causing output stage linear, limiting peak output current approximately power dissipation that output stage increases, thermal gradient sensing circuit will become operational, further decreasing drive current affected output stage reducing output current value dependent supply voltage load resistance. Continuous multiple overload conditions causing chip temperature reach approximately 165°C will result additional reduction output current maintain safe level. fault condition corrected, output stage will return normal saturated condition.
TYPICAL OUTPUT BEHAVIOR
Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
Protected Quad Power Driver
Package, 16-pin
with internally fused pins external thermal tabs
19.05±0.25 +0.10 0.38 -0.05 +0.76 6.35 -0.25 +0.38 10.92 -0.25 7.62
5.33 +0.51 3.30 -0.38 1.27 +0.25 1.52 -0.38 0.46 ±0.12 2.54
Reference Only (reference JEDEC MS-001 Dimensions inches, metric dimensions (mm) brackets, reference only Dimensions exclusive mold flash, gate burrs, dambar protrusions Exact case lead configuration supplier discretion within limits shown Terminal mark area
Package, 28-pin PLCC
with internally fused pins through through
12.45±0.13 11.51±0.08 0.51
5.21±0.36
12.45±0.13
11.51±0.08
5.21±0.36
0.74±0.08
0.51
0.10 0.43±0.10
+0.20 4.37 -0.18
SEATING PLANE
1.27 5.21±0.36 5.21±0.36
Reference Only (reference JEDEC MS-018 Dimensions millimeters Dimensions exclusive mold flash, gate burrs, dambar protrusions Exact case lead configuration supplier discretion within limits shown Terminal mark area
Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
Protected Quad Power Driver
Package, 16-pin SOICW
with internally fused pins
10.30±0.20 +0.07 0.27 -0.06
0.65
1.27
7.50±0.10
10.30±0.33 +0.44 0.84 -0.43 2.25
9.50
0.25
Layout Reference View
0.10 0.41 ±0.10 1.27
SEATING PLANE 2.65 0.20 ±0.10
SEATING PLANE GAUGE PLANE
Reference Only Pins internally fused Dimensions millimeters (reference JEDEC MS-013 Dimensions exclusive mold flash, gate burrs, dambar protrusions Exact case lead configuration supplier discretion within limits shown
Terminal mark area
Reference layout (reference SOIC127P1030X265-16M) pads minimum 0.20 from adjacent pads; adjust necessary meet application process requirements layout tolerances
Copyright ©1995-2009, Allegro MicroSystems, Inc. products described here manufactured under more U.S. patents U.S. patents pending. Allegro MicroSystems, Inc. reserves right make, from time time, such departures from detail specifications required permit improvements performance, reliability, manufacturability products. Before placing order, user cautioned verify that information being relied upon current. Allegro's products used life support devices systems, failure Allegro product reasonably expected cause failure that life support device system, affect safety effectiveness that device system. information included herein believed accurate reliable. However, Allegro MicroSystems, Inc. assumes responsibility use; infringement patents other rights third parties which result from use. latest version this document, visit website: www.allegromicro.com
Allegro MicroSystems, Inc. Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com

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