| The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers. |
74LCX86 Voltage Quad 2-Input Exclusive-OR Gate with Tolerant Inputs
Top Searches for this datasheet74LCX86 Voltage Quad 2-Input Exclusive-OR Gate with Tolerant Inputs 74LCX86 Voltage Quad 2-Input Exclusive-OR Gate with Tolerant Inputs tolerant inputs 2.3V-3.6V specifications provided 6.5ns max. (VCC 3.3V), 10µA max. Power down high impedance inputs outputs ±24mA output drive (VCC 3.0V) Implements patented noise/EMI reduction circuitry Latch-up performance exceeds 500mA performance: General Description LCX86 contains four 2-input exclusive-OR gates. inputs tolerate voltages allowing interface systems systems. 74LCX86 fabricated with advanced CMOS technology achieve high speed operation while maintaining CMOS power dissipation. Machine model 2000V Human model 200V Ordering Information Order Number 74LCX86M 74LCX86SJ 74LCX86MTC Package Number M14A M14D MTC14 Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available Tape Reel. Specify appending suffix letter ordering number. packages lead free JEDEC: J-STD-020B standard. ©1995 Fairchild Semiconductor Corporation 74LCX86 Rev. 1.5.0 www.fairchildsemi.com 74LCX86 Voltage Quad 2-Input Exclusive-OR Gate with Tolerant Inputs Connection Diagram Logic Symbol IEEE/IEC Description Names A0-A3 B0-B3 O0-O3 Description Inputs Inputs Outputs ©1995 Fairchild Semiconductor Corporation 74LCX86 Rev. 1.5.0 www.fairchildsemi.com 74LCX86 Voltage Quad 2-Input Exclusive-OR Gate with Tolerant Inputs Absolute Maximum Ratings Stresses exceeding absolute maximum ratings damage device. device function operable above recommended operating conditions stressing parts these levels recommended. addition, extended exposure stresses above recommended operating conditions affect device reliability. absolute maximum ratings stress ratings only. Symbol Supply Voltage Input Voltage Parameter Rating -0.5V +7.0V -0.5V +7.0V State(1) -0.5V 0.5V -50mA -50mA +50mA ±50mA ±100mA ±100mA -65°C +150°C Output Voltage, Output HIGH Input Diode Current, Output Diode Current IGND TSTG Output Source/Sink Current Supply Current Supply Ground Current Ground Storage Temperature Note: Absolute Maximum Rating must observed. Recommended Operating Conditions(2) Recommended Operating Conditions table defines conditions actual device operation. Recommended operating conditions specified ensure optimal performance datasheet specifications. Fairchild does recommend exceeding them designing absolute maximum ratings. Symbol Supply Voltage Operating Data Retention Input Voltage Parameter Min. Max. Units Output Voltage, HIGH State Output Current 3.0V-3.6V 2.7V-3.0V 2.3V-2.7V Free-Air Operating Temperature Input Edge Rate, 0.8V-2.0V, 3.0V Note: Unused inputs must held HIGH LOW. They float. ©1995 Fairchild Semiconductor Corporation 74LCX86 Rev. 1.5.0 www.fairchildsemi.com 74LCX86 Voltage Quad 2-Input Exclusive-OR Gate with Tolerant Inputs Electrical Characteristics -40°C +85°C Symbol Parameter HIGH Level Input Voltage Level Input Voltage HIGH Level Output Voltage 2.3-2.7 2.7-3.6 2.3-2.7 2.7-3.6 2.3-3.6 Conditions Min. Max. Units -100µA -8mA -12mA -18mA -24mA 100µA 12mA 16mA 24mA 5.5V 5.5V 3.6V 5.5V 0.6V 0.55 ±5.0 Level Output Voltage 2.3-3.6 IOFF Input Leakage Current Power-Off Leakage Current Quiescent Supply Current Increase Input 2.3-3.6 2.3-3.6 2.3-3.6 Electrical Characteristics -40°C +85°C, 3.3V 0.3V, 50pF Symbol tPHL, tPLH 2.7V, 50pF Min. 2.5V 0.2V, 30pF Min. Parameter Propagation Delay Skew(3) Min. Max. Max. Max. Units tOSHL, tOSLH Output Output Note: Skew defined absolute value difference between actual propagation delay separate outputs same device. specification applies outputs switching same direction, either HIGH-to-LOW (tOSHL) LOW-to-HIGH (tOSLH). ©1995 Fairchild Semiconductor Corporation 74LCX86 Rev. 1.5.0 www.fairchildsemi.com 74LCX86 Voltage Quad 2-Input Exclusive-OR Gate with Tolerant Inputs Dynamic Switching Characteristics 25°C Symbol VOLP VOLV Parameter Quiet Output Dynamic Peak Quiet Output Dynamic Valley Conditions 50pF, 3.3V, 30pF, 2.5V, 50pF, 3.3V, 30pF, 2.5V, Typical -0.8 -0.6 Unit Capacitance Symbol COUT Parameter Input Capacitance Output Capacitance Power Dissipation Capacitance Conditions Open, 3.3V, 3.3V, VCC, 10MHz Typical Units ©1995 Fairchild Semiconductor Corporation 74LCX86 Rev. 1.5.0 www.fairchildsemi.com 74LCX86 Voltage Quad 2-Input Exclusive-OR Gate with Tolerant Inputs Loading Waveforms (Generic Family) Test tPLH, tPHL tPZL, tPLZ tPZH, tPHZ Open 0.3V 0.2V Switch Figure Test Circuit includes probe capacitance) Waveform Inverting Non-Inverting Functions 3-STATE Output Enable Disable Times Logic Propagation Delay. Pulse Width trec Waveforms Setup Time, Hold Time Recovery Time Logic 3-STATE Output High Enable Disable Times Logic Symbol trise tfall 3.3V 0.3V 1.5V 1.5V 0.3V 0.3V 2.7V 1.5V 1.5V 0.3V 0.3V 2.5V 0.2V 0.15V 0.15V Figure Waveforms (Input Characteristics; 1MHz, 3ns) ©1995 Fairchild Semiconductor Corporation 74LCX86 Rev. 1.5.0 www.fairchildsemi.com 74LCX86 Voltage Quad 2-Input Exclusive-OR Gate with Tolerant Inputs Schematic Diagram (Generic Family) ©1995 Fairchild Semiconductor Corporation 74LCX86 Rev. 1.5.0 www.fairchildsemi.com 74LCX86 Voltage Quad 2-Input Exclusive-OR Gate with Tolerant Inputs Physical Dimensions 8.75 8.50 7.62 0.65 5.60 6.00 4.00 3.80 1.70 INDICATOR 1.27 (0.33) 0.51 0.35 0.25 1.27 LAND PATTERN RECOMMENDATION 1.75 1.50 1.25 DETAIL 0.25 0.10 0.10 NOTES: UNLESS OTHERWISE SPECIFIED 0.25 0.19 R0.10 R0.10 0.50 0.25 THIS PACKAGE CONFORMS JEDEC MS-012, VARIATION ISSUE DIMENSIONS MILLIMETERS. DIMENSIONS INCLUDE MOLD GAGE PLANE FLASH BURRS. LANDPATTERN STANDARD: SOIC127P600X145-14M 0.36 DRAWING CONFORMS ASME Y14.5M-1994 DRAWING FILE NAME: M14AREV13 0.90 0.50 (1.04) DETAIL SCALE: 20:1 SEATING PLANE Figure 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package drawings provided service customers considering Fairchild components. Drawings change manner without notice. Please note revision and/or date drawing contact Fairchild Semiconductor representative verify obtain most recent revision. Package specifications expand terms Fairchild's worldwide terms conditions, specifically warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area most recent package drawings: ©1995 Fairchild Semiconductor Corporation 74LCX86 Rev. 1.5.0 www.fairchildsemi.com 74LCX86 Voltage Quad 2-Input Exclusive-OR Gate with Tolerant Inputs Physical Dimensions (Continued) Figure 14-Lead Small Outline Package (SOP), EIAJ TYPE 5.3mm Wide Package drawings provided service customers considering Fairchild components. Drawings change manner without notice. Please note revision and/or date drawing contact Fairchild Semiconductor representative verify obtain most recent revision. Package specifications expand terms Fairchild's worldwide terms conditions, specifically warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area most recent package drawings: ©1995 Fairchild Semiconductor Corporation 74LCX86 Rev. 1.5.0 www.fairchildsemi.com 74LCX86 Voltage Quad 2-Input Exclusive-OR Gate with Tolerant Inputs Physical Dimensions (Continued) 0.65 0.43 1.65 0.45 6.10 12.00° R0.09 BOTTOM CONFORMS JEDEC REGISTRATION MO-153, VARIATION NOTE DIMENSIONS MILLIMETERS DIMENSIONS EXCLUSIVE BURRS, MOLD FLASH, EXTRUSIONS DIMENSIONING TOLERANCES ANSI Y14.5M, 1982 LANDPATTERN STANDARD: SOP65P640X110-14M DRAWING FILE NAME: MTC14REV6 1.00 R0.09min Figure 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package drawings provided service customers considering Fairchild components. Drawings change manner without notice. Please note revision and/or date drawing contact Fairchild Semiconductor representative verify obtain most recent revision. Package specifications expand terms Fairchild's worldwide terms conditions, specifically warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area most recent package drawings: ©1995 Fairchild Semiconductor Corporation 74LCX86 Rev. 1.5.0 www.fairchildsemi.com 74LCX86 Voltage Quad 2-Input Exclusive-OR Gate with Tolerant Inputs TRADEMARKS following includes registered unregistered trademarks service marks, owned Fairchild Semiconductor and/or global subsidiaries, intended exhaustive list such trademarks. ACEx® Build NowCorePLUSCROSSVOLTCTLCurrent Transfer LogicEcoSPARK® EZSWITCH* Fairchild® Fairchild Semiconductor® FACT Quiet SeriesFACT® FAST® FastvCoreFlashWriter® FPSFRFET® Global Power ResourceSM Green FPSGreen OPTOPLANAR® PDP-SPMPower220® POWEREDGE® Power-SPMPowerTrench® Programmable Active DroopQFET® QSQT OptoelectronicsQuiet SeriesRapidConfigureSMART STARTSPM® STEALTHSuperFETSuperSOT-3 SuperSOT-6 SuperSOT-8 SupreMOSSyncFET Power Franchise® TinyBoostTinyBuckTinyLogic® Ultra FRFETUniFETVCX EZSWITCHand FlashWriter® trademarks System General Corporation, used under license Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES RIGHT MAKE CHANGES WITHOUT FURTHER NOTICE PRODUCTS HEREIN IMPROVE RELIABILITY, FUNCTION, DESIGN. FAIRCHILD DOES ASSUME LIABILITY ARISING APPLICATION PRODUCT CIRCUIT DESCRIBED HEREIN; NEITHER DOES CONVEY LICENSE UNDER PATENT RIGHTS, RIGHTS OTHERS. THESE SPECIFICATIONS EXPAND TERMS FAIRCHILD'S WORLDWIDE TERMS CONDITIONS, SPECIFICALLY WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL FAIRCHILD SEMICONDUCTOR CORPORATION. used herein: Life support devices systems devices systems which, intended surgical implant into body support sustain life, whose failure perform when properly used accordance with instructions provided labeling, reasonably expected result significant injury user. PRODUCT STATUS DEFINITIONS Definition Terms Datasheet Identification Advance Information Product Status Formative Design Definition This datasheet contains design specifications product development. Specifications change manner without notice. This datasheet contains preliminary data; supplementary data will published later date. Fairchild Semiconductor reserves right make changes time without notice improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves right make changes time without notice improve design. This datasheet contains specifications product that been discontinued Fairchild Semiconductor. datasheet printed reference information only. Rev. critical component component life support, device, system whose failure perform reasonably expected cause failure life support device system, affect safety effectiveness. Preliminary First Production Identification Needed Full Production Obsolete Production ©1995 Fairchild Semiconductor Corporation 74LCX86 Rev. 1.5.0 www.fairchildsemi.com Other recent searchesUC1705 - UC1705 UC1705 Datasheet UC2705 - UC2705 UC2705 Datasheet UC3705 - UC3705 UC3705 Datasheet PJ7900 - PJ7900 PJ7900 Datasheet PIC16C74A - PIC16C74A PIC16C74A Datasheet PIC18C442 - PIC18C442 PIC18C442 Datasheet FCQ20C03 - FCQ20C03 FCQ20C03 Datasheet AN-1017 - AN-1017 AN-1017 Datasheet 0352920000 - 0352920000 0352920000 Datasheet
Privacy Policy | Disclaimer |