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Microcontroller Based Data Acquisition Using TLC2543 12-Bit Serial-Out
IMPORTANT NOTICE Texas Instruments (TI) reserves right make changes products discontinue semiconductor product service without notice, advises customers obtain latest version relevant information verify, before placing orders, that information being relied current. warrants performance semiconductor products related software specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. Certain applications using semiconductor products involve potential risks death, personal injury, severe property environmental damage ("Critical Applications"). SEMICONDUCTOR PRODUCTS DESIGNED, INTENDED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT APPLICATIONS, DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. Inclusion products such applications understood fully risk customer. products such applications requires written approval appropriate officer. Questions concerning potential risk applications should directed through local sales office. order minimize risks associated with customer's applications, adequate design operating safeguards should provided customer minimize inherent procedural hazards. assumes liability applications assistance, customer product design, software performance, infringement patents services described herein. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used.
Copyright 1995, Texas Instruments Incorporated
Contents
Title Page
Introduction Scope this Application Report TLC2543 Interface Timing Minimum Number Data Transfers Channel Serial Peripheral Interface (SPI) TLC2543 Interface Timing Software Flowcharts TLC2543 TMS370 Microcontroller Interface Microcontroller Features Interface Circuit Software
List Opto-Isolated 12-Bit Data Acquisition System TLC2543 H8/325 Microcontroller Interface Microcontroller Features Interface Circuit Software
List TLC2543 MC68HC11 Microcontroller Interface Microcontroller Features Interface Circuit Software
List TLC2543 80C51 Microcontroller Interface Microcontroller Features Interface Circuit Software
List Analog Considerations Power Supply Decoupling Grounding Board Layout
Appendix
List Illustrations
Figure Title Page
TLC2543 Block Diagram Timing 16-Clock Transfer Using With First Timing 16-Clock Transfer Using With First Serial Peripheral Interface Internal Structure Data Flow TLC2543 Interface Timing Flowchart Main Program TLC2543 TMS37010 Flowcharts Subroutine DATAIN STORE TLC2543 TMS370C010 Interface Software Flowcharts Subroutine TLC2543 TMS370C010 Interface Software TLC2543 TMS370C010 Interface Circuit Opto-Isolated 12-Bit Data Acquisition System TLC2543 H8/300 Microcontroller Interface Circuit TLC2543 MC68HC811E2 Microcontroller Interface TLC2543 80C51 Microcontroller Interface TLC2543 Microcontroller Interface: Grounding Decoupling Scheme
Introduction
Scope this Application Report
This application report describes construct 12-bit data acquisition systems using TLC2543 serial-out analog-to-digital converter (ADC) conjunction with range four popular microcontrollers. four microcontrollers used TMS370, H8/300, 68HC11 80C51.
TLC2543
TLC2543 12-bit which uses switched capacitor successive approximation technique perform conversion process provides maximum sampling rate samples second (KSPS) while using only (typical) supply current. block diagram TLC2543 shown Figure eleven analog input channels selected programming four most significant bits (MSBs) eight channel/mode control byte applied serially DATA INPUT terminal device. addition three internal test voltages Vref-, Vref+ (Vref+ Vref )/2] applied converter calibration other purposes applying appropriate code same four MSBs. four least significant bits (LSBs) channel/mode control byte used select output data length bits), output data order (MSB first first) whether unipolar (binary) bipolar (2's complement around (Vref+ Vref )/2) format required.
AIN0 AIN1 AIN2 AIN3 AIN4 AIN5 AIN6 AIN7 AIN8 AIN9 AIN10 Input Address Register Control Logic Data Input Clock
Analog Inputs
14-Channel Analog Input
Sample Hold
12-Bit
Output Data Register
Parallel Serial Converter
Serial Data
Self-Test Reference
12-Bit Resolution 66-KSPS Sampling Rate Analog Input Channels
Supply Current (Typ) Power-Down Mode (Typ) Compatible Serial Interface
Figure TLC2543 Block Diagram Interface Timing Four transfer methods available obtaining full bits resolution from TLC2543. Either clock cycles used each conversion data transfer. chip select (CS) pulse inserted start each conversion only once beginning each sequence conversions with remaining until sequence completed.
Figure shows timing method which uses clock cycles each conversion data transfer cycle which inserts between each these transfer cycles. Figure shows timing method which uses clock cycles each conversion data transfer cycle inserts only once start each sequence conversions. This application report describes various microcontroller interfaces, each which uses clock cycles each conversion data transfer. applied start each conversion data transfer. This method allows general case where more conversions required. also simplifies required software.
1.425 CLOCK DATA
Previous Conversion Data
16-Clock Transfer Using (MSB First)
tconv
Figure Timing 16-Clock Transfer Using With First
1.425 CLOCK
DATA
(EOC-DATA)
Previous Conversion Data DATA INPUT
16-Clock Transfer Using (MSB First)
tconv
Figure Timing 16-Clock Transfer Using With First Minimum Number Data Transfers Channel should noted that single data transfer cycle between TLC2543 chosen microcontroller data output from result previous conversion. software listings included this application report have been written general case where conversion results required individual channel sequence channels. this case program included each microcontroller interface must least twice channel that valid data corresponding required analogue input channel mode delivered. Software written implement consecutive channel scanning mode operation TLC2543. this case result from first analog-to-digital conversion should ignored overwritten.
DATA INPUT
Serial Peripheral Interface (SPI)
fastest most efficient method implementing data transfer between TLC2543 microcontroller serial peripheral interface (SPI) microcontroller, this available. TMS370 (Texas Instruments), H8/300 (Hitachi) MC68HC11 (Motorola) offer SPIs equivalent subset each these families microcontrollers. H8/300 offers serial communications interface (SCI) which configured operate similar that standard SPI's offered TMS370 MC68HC11. principle features are:
Simultaneous serial data input output Synchronous operation Provision frequency programmable serial clock Data transfer complete flag
Figure shows structure SPI. this case TMS370C010 used illustrate main elements interface.
TLC2543
TMS370C010 Master (Master/Slave
DATA
SOMI Serial Input Buffer (SPIBUF)
DATA INPUT
SOMO
Shift Register (SPIDAT)
CLOCK
SPICLK
Figure Serial Peripheral Interface Internal Structure Data Flow microcontroller configured software perform master slave. When operating master, data input shift register (SPIDAT) slave master (SOMI) terminal. same time data output from SPIDAT slave master (SIMO) terminal. functions follows. SPIDAT should loaded with first byte data sent. This automatically initiates transmission this byte. During this transmission time data received other SPIDAT shift register. FLAG regularly checked. soon last input data byte received FLAG This then signals that received byte read from serial input buffer (SPIBUF) that SPIDAT ready accept next byte data transmitted. Additional features which apply specific microcontrollers described their respective sections which follow. TLC2543 Interface Timing timing digram clock transfer TLC2543 interface shown Figure channel select/mode data read into TLC2543 positive going edges clock analog-to-digital conversion results read into microcontroller negative going edges clock.
CLOCK DATA DATA
tconv
Figure TLC2543 Interface Timing Software Flowcharts Figures show flow charts main program subroutines used TLC2543 TMS370C010 interface software shown this application report. same program structure also applies other three interfaces included this report.
START CALL SUBROUTINE DATAIN
Reads channel/mode data TLC2543 into microcontroller parallel port. (reformats channel/mode data serial data sent first). Puts channel/mode data into accessible register. Derives destination address STORE from channel data.
CALL SUBROUTINE
Provides high transition prior conversion. Provides serial CLOCK TLC2543. Sends channel/mode data TLC2543. Receives MSbyte then LSbyte previous conversion.
CALL SUBROUTINE STORE
Stores MSbyte even address selected space. Stores LSbyte address selected space (all addresses mapped corresponding channel number).
JUMP START Jump start next conversion
Figure Flowchart Main Program TLC2543 TMS370C01
Read Channel/Mode Data Into Chosen Register Store MSBYTE Even Address (Channel Dependant) Channel Numbers Registers Store LSBYTE Address (Channel Dependant) Destination Address Into Chosen Register STORE
Return
DATAIN
Figure Flowcharts Subroutine DATAIN STORE TLC2543 TMS370C010 Interface Software
Send TLC2543 High MSB/LSB First Send Channel/Mode Data TLC2543 Receive Byte Previous Conversion Result Store BYTE
Delay
Send TLC2543
MSB/LSB First
Send Channel/Mode Data TLC2543 Receive Byte Previous Conversion Result Store BYTE MSB/LSB First Return
Figure Flowcharts Subroutine TLC2543 TMS370C010 Interface Software
TLC2543 TMS370 Microcontroller Interface
Microcontroller Features
Within family TMS370 microcontrollers there several versions which contain serial peripheral interface (SPI) facility. these versions should chosen implement interface method described below. such version TMS370C010 which used illustrate method.
Interface Circuit
Figure shows circuit interconnections TLC2543 TMS370C010 microcontroller interface. Note that extra logic required implement this interface.
Analog Inputs
CLOCK DATA INPUT DATA AIN0 AIN1 AIN2 AIN3 TLC2543 AIN4 AIN5 AIN6 AIN7 AIN8 AIN9 AIN10
SPICLK SPISIMO SPISOMI
SPST Switch
TMS37
Figure TLC2543 TMS370C010 Interface Circuit Depending upon layout particular printed circuit board used necessary insert small value capacitor between between CLOCK input TLC2543 ground. This effect ensuring that data applied DATA INPUT terminal TLC2543 valid before positive going transition CLOCK. positive reference, REF+, TLC2543 provided directly from VCC+ supply. four digital interface terminals, CLOCK, DATA INPUT, DATA OUT, TLC2543 connect directly SPICLK, SPISIMO, SPISOMI terminals respectively TMS370C010. operation mode channel number TLC2543 determined serial data which sent DATA INPUT terminal.
Software
List contains software listing program which controls interface illustrated Figure software consists main program three subroutines called DATA STORE. DATAIN reads channel select mode control data into holding register maps channel select number corresponding pair registers between R91. mapping vector held register R10. provides chip select pulse, controls operation, puts MSByte LSByte each conversion result into registers respectively. STORE puts MSByte into even number register LSByte into number register mapped contents register R10.
user channel select mode control data into holding register within microcontroller, 8-bit wide port bidirectional port, using bank eight toggle switches shown Figure Alternatively, mode channel data sent microcontroller holding register asynchronous serial communications interface (SCI). This option available only those versions TMS370, such TMS370C020, which include both interfaces. Additional software control must appended software shown List provide this method control.
List
LINE SOURCE TLC2543 370Cx10 Interface Program This program reads channel select mode control data (provided toggle switches) into microcontroller, using subroutine DATAIN. then provides control signals TLC2543 perform analog conversion, using subroutine ADC. finally stores MSByte LSByte each conversion consecutive even number registers respectively starting corresponding channel using subroutine STORE. SPICCR .EQU P030 SPICTL .EQU P031 SPIBUF .EQU P037 SPIDAT .EQU P039 SPIPC1 .EQU P03D SPIPC2 .EQU P03E Name Peripheral SPIPRI .EQU P03F Registers APORT2 .EQU P021 ADATA .EQU P022 ADIR .EQU P023 DPORT1 .EQU P02C DPORT2 .EQU P02D DDATA .EQU P02E DDIR .EQU P02F RESET .EQU 7FFEH ;Reset vector named CSBIT .DBIT 7,DDATA ;TLC2543 Chip Select ;named CSBIT .TEXT 4000H ;Main Program START #60H,B LDSP MOVW #4000H,A A,RESET A,APORT2 A,ADIR #080H,DDIR #80H,A A,SPICCR #07,A A,SPICCR #03,A A,SPIPC1 #22H,A A,SPIPC2 SPIF .DBIT 6,SPICTL MSLSB .DBIT 1,R11 CALL DATAIN CALL CALL STORE ;Start program 4000H ;Set address ;Set reset vector
0030 0031 0037 0039 003d 003e 003f 0021 0022 0023 002c 002d 002e 002f 7ffe
4000 4000 5260 4002 4003 88400000 4007 8b7ffe 400a 400b 2121 400d 2123 400f f7802f 4012 2280 4014 2130 4016 2207 4018 2130 401a 2203 401c 213d 401e 2222 4020 213e 4022 '8e402d 4025 '8e403e 4028 '8e409d
;Configure 8-bit ;character length. ;Configure SPICLK ;function direction. ;Configure SPISOMI ;SPISIMO functions. ;SPI FLAG named SPINTF ;Bit named MSLSB
List (Continued)
LINE 402b '00d3 SOURCE START ;Subroutine DATAIN DATAIN ADATA,B B,R11 #0F0H,B #002,B #40H,B B,R1
402d 402f 4031 4033 4034 4035 4036 4037 4039 403b 403d
9122 d10b 53f0 5c02 5840 d10a
;Read mode/channel ;Put mode/channel ;Retain channel number channel numbers registers R64-R91 contains storage address Even numbers Byte* numbers Byte
403e 4040 4043 4044 4046 4047 4049 404b 404d 4051 4053 4055 4059 405c 405f 4063 4066 406a 406c 406e 4072 4075 4077 4079 407d 4080 4082 4084 4086 4088 4089 408b 408e 4090 4092 4094 4096 4097 4099
2203 a4802e '06fd 512e 2207 2131 '76020b19 120b 2139 'a74031fc a21437 71390b 'a74031fc a21537 '77020b32 120b 2139 'a74031fc a21537 120b 2139 'a74031fc a21437 2208 d516 dd14 df16 '06f9 421614 2208 d517 dd15 df17 '06f9 421715
;Subroutine #003H,A SBIT1 CSBIT ;Set Chip Select high. LOOP1 ;Chip Select stays high LOOP1 ;while B,DDATA goes #7,A A,SPICTL ;Enable transmission JBIT1 MSLSB,LS1ST R11,A A,SPIDAT R11,SPIDAT ;Send mode/channel data TLC2543 FLAG1 JBIT0 SPIF,FLAG1;If SPIF=0, repeat check. SPIBUF,R20 ;Put received Byte R11,SPIDAT ;Send mode/channel data TLC2543 FLAG2 JBIT0 SPIF,FLAG2;If SPIF=0, repeat check. SPIBUF,R21 ;Put received Byte JBIT0 MSLSB,RETURN MSLSB=0, RETURN LS1ST R11,A A,SPIDAT FLAG3 JBIT0 SPIF,FLAG3;If SPIF=0, repeat check. SPIBUF,R21 ;Put received Byte R11,A A,SPIDAT FLAG4 JBIT0 SPIF,FLAG4;If SPIF=0, repeat check. SPIBUF,R20 ;Put received Byte #08,A LOOP2 Reformat Byte result LOOP2 R22, #08,A LOOP3 Reformats Byte result LOOP3 R23,R21
List (Continued)
LINE 409c SOURCE RETURN ;Subroutine STORE STORE R20,A A,@R10 R21,A A,@R10 .END
409d 409f 40a1 40a3 40a5 40a7
1214 9b0a d30a 1215 9b0a
;Put Byte into even ;address contained ;(R10)+1 ;Put Byte into ;address contained
Opto-Isolated 12-Bit Data Acquisition System
serial nature data flow between TLC2543 analog-to-digital converter accompanying microcontroller makes this ideal choice isolated 12-bit data acquisition. Figure shows opto-isolated system which uses four optocouplers provide 3-kV isolation barrier. Note that optocoupler which routes conversion result data from TLC2543 microcontroller single device does share same piece silicon with other optocouplers used. This ensures that full isolation maintained between microcontroller. choice VP0610 P-channel enhancement MOSFETs avoids extra inverter stage each optocoupler driver. addition, relatively input capacitance VP0610 (typically allows data rates achieved without need external buffers added outputs TLC2543 TMS370.
VCC1 CLOCK
VCC2 VP0610 SPICLK
GCPL2631 TLC2543 TMS37
DATA INPUT
VP061
GCPL2631
VP0610 DATA AIN0 AIN1 AIN2 AIN3 AIN4 AIN5 AIN6 AIN7 AIN8 AIN9 AIN10
SPISOMI
VP0610
Mode
Channel Number
HCPL2601 Isolation Barrier
Figure Opto-Isolated 12-Bit Data Acquisition System
TLC2543 H8/325 Microcontroller Interface
Microcontroller Features
individual members family microcontrollers differentiated various criteria, example inclusion otherwise on-board 8-bit resolution analog-to-digital converter (ADC). Those members which include generally cost between percent more than their counterparts which not. System requirements such resolution, remote location ADC, flexibility, total cost influence final choice microcontroller architecture. H8/325, used this application report, does include on-board provides RAM, ROM, serial ports. therefore well suited interfacing with TLC2543 serial output ADC.
Interface Circuit
Figure illustrates typical 12-bit data acquisition system which uses H8/325 microcontroller coordinate operation TLC2543 serial (SCI) ports. circuit uses H8's 8-bit parallel port route channel mode information into microcontroller. This information could provided host system data Figure bank eight manually operated toggle switches situated same printed circuit board microcontroller.
TLC2543 CLOCK AIN0 AIN1 DATA INPUT AIN2 DATA AIN3 AIN4 AIN5 AIN6 AIN7 AIN8 AIN9 AIN10 H8/325 SCK0/P5.2 TxD0/P5.0 RxD0/P5.1 P6.0 XTAL EXTAL P4.0 P4.1 P4.2 P4.3 P4.4 P4.5 P4.6 P4.7 (max)
Analog Inputs
Mode
Channel Number
NOTE: Single Chip Mode (MD0
Figure TLC2543 H8/300 Microcontroller Interface Circuit
Software
List shows program which written coordinate interface. uses three subroutines implement overall interface TLC2543. first these called DATAIN which reads channel mode information into microcontroller. also maps converter channel numbers corresponding addresses where conversion results stored. this case addresses from 0040H 0067H were chosen store results. most significant byte each result placed even address least significant byte each result placed corresponding adjacent address. conversion result each channel stored left justified format therefore occupies upper bits 16-bit words which occupy even addresses from 0040H 0066H. second subroutine used ADC. This begins producing chip-select high pulse. trailing negative edge this pulse rapidly followed transmission channel mode information converter.
List
LINE SOURCE TLC2543 Microcontroller Interface Program. This program contains subroutines DATAIN, ADC, FORMAT STORE. DATAIN reads channel number mode data into microcontroller Port4. "ADC" controls conversion. "FORMAT" changes conversion results from first format first format. "Store" places results memory addresses Bytes even addresses, Bytes addresses) according channel number. Define special function register names H'FFDD ;Receive Data Register H'FFDB ;Transmit Data Register H'FFD8 ;Serial Mode Register H'FFDA ;Serial Control Register H'FFDC ;Serial Status Register H'FFD9 ;Bit Rate Register P5DDR H'FFB8 ;Port5 Data Direction Register P5DR H'FFBA ;Port5 Data Register P5DR P4DDR H'FFB5 ;Port4 Data Direction Register P4DR H'FFB7 ;Port4 Data register P4DR P6DDR H'FFB9 ;Port6 Data Direction register P6DR H'FFBB ;Port6 Data Register H'1000 ;Sets start program Main Program MOV.W #H'1000, MOV.W @H'0000 ;Sets reset vector START MOV.W #H'FD00, ;Sets contents Stack Pointer START MOV.B #H'84, MOV.B R1L, @SMR:8 Sets serial port MOV.B #H'31,R1L registers simultaneous* MOV.B R1L, @SCR:8 transmit receive MOV.B #H'01,R1L MOV.B R1L, @BRR:8 MOV.B #H'01, ;Sets R1(Low Byte) MOV.B R1L, @P6DDR ;Set Bit0 Port6 Output @DATAIN:16 ;Read channel/mode data @ADC:16 conversion @FORMAT:16 ;Reformat conversion result @STORE:16 ;Store conversion result START ;Repeat above routine. Subroutine which controls conversion process MOV.B #H'05, ;Put BSET @P6DR:8 ;TLC2543 chip select goes high CSHIGH ;(R2L) CSHIGH zero, stays high BCLR @P6DR:8 ;TLC2543 chip select goes MOV.B @P4DR, ;Puts channel/mode data BTST LSBF channel/mode data LSBYTE not, LSBYTE first MSBYTE BTST @SSR:8 empty MSBYTE empty, repeat check. MOV.B R4H, @TDR:8 ;Put channel/mode data BCLR @SSR:8 ;Reset TDRE TESTB61 BTST @SSR:8 receive shift reg. empty
FFDD FFDB FFD8 FFDA FFDC FFD9 FFB8 FFBA FFB5 FFB7 FFB9 FFBB
1000 79001000 1004 1008 100A 100C 100E 1010 1012 1014 1016 101A 101E 1022 1026 102A 7907FD00 F984 39D8 F931 39DA F901 39D9 F901 6A89FFB9 5E001082 5E00102C 5E0010B4 5E0010AC 40DC
102C 102E 1032 1034 1036 103A 103E 1040 1042 1046 1048 104A 104E
FA05 7FBB7000 1A0A 46FC 7FBB7200 6A0CFFB7 731C 461E 7EDC7370 47FA 34DB 7FDC7270 7EDC736
List (Continued)
LINE SOURCE TESTB61 MOV.B @RDR:8, BCLR @SSR:8 MOV.B R3H, BTST RETURN LSBYTE BTST @SSR:8 LSBYTE MOV.B R4H, @TDR:8 BCLR @SSR:8 TESTB62 BTST @SSR:8 TESTB62 MOV.B @RDR:8, BCLR @SSR:8 MOV.B R3L, BTST MSBYTE empty, repeat check ;Put Byte conversion ;result ;Reset RDRF ;Put Byte even address ;mapped channel number. LSBF channel/mode data not, return from subroutine empty empty, repeat check ;Put channel/mode data ;Reset TDRE receive shift reg. empty empty, repeat check ;(R5L) ;Put Byte conversion ;result ;Reset RDRF ;Put Byte address ;mapped channel number. LSBF channel/mode data not, MSBYTE ;Return from subroutine 1052 47FA 1054 23DD 1056 7FDC7260 105A 68D3 105C 105E 1060 1064 1066 1068 106C 1070 1072 1074 731C 4620 7EDC7370 47FA 34DB 7FDC7270 7EDC7360 47FA 0A0D 2BDD
1076 7FDC7260 107A 68DB 107C 731C 107E 46C2 1080
1082 1086 108A 108E 1090 1092 1094 1096 1098 109C 109E 10A0 10A2 10A4 10A6 10A8 10AA
79040000 79050000 6A0CFFB7 0CCD 110D 110D 110D 110D 79060002 50E5 8D40 F008 110C 1204 1A00 46F8
10AC 68D3 10AE 0A0D 10B0 68DB 10B2
10B4 10B6 10B8 10BA 10BC 10BE 10C0 10C2
F008 1103 1207 1A00 46F8 0C73 F008 110B
RETURN Subroutine "DATAIN" which reads channel/mode data DATAIN MOV.W #H'0000, MOV.W #H'0000, MOV.B @P4DR, ;Puts channel/mode data MOV.B R4L, ;Puts (R4L) SHLR SHLR Retain only channel SHLR number SHLR MOV.W #0002, MULXU R6L, Maps channel numbers ADD.B #H'40, even addresses 5AH* address MOV.B #H'08, ;Put NEXTBIT SHLR ROTXL Reformats channel/mode data* from first first* NEXTBIT Subroutine "STORE" stores conversion results STORE MOV.B R3H, ;Store Byte even address ;corresponding channel ;number ;(R5) MOV.B R3L, ;Store Byte address ;corresponding channel ;number ;Return from subroutine Subroutine "FORMAT" changes received data format first into first format FORMAT MOV.B #H'08, ;Put LOOP1 SHLR ROTXL Reformats MSBYTE LOOP1 MOV.B R7H, MOV.B #H'08, ;Put LOOP2 SHLR
List (Continued)
LINE 10C4 10C6 10C8 10CA 10CC 10CE 120F 1A00 46F8 0CFB 5470 SOURCE ROTXL LOOP2 MOV.B R7L, Reformats LSBYTE ;Return from subroutine
TLC2543 MC68HC11 Microcontroller Interface
Microcontroller Features
members MC68HC11 family microcontrollers contain SPI. case TMS370, user able idle level serial clock 68HC11. This eliminates need external inverter used invert microcontroller's serial clock output prior arrival TLC2543's serial clock input. 68HC11D0, 68HC11D3 68HC711D3 versions contain on-board ADC. these three devices prove most cost effective choice when used with TLC2543. other versions contain either 10-bit resolution ADC.
Interface Circuit
Figure shows circuit diagram interface between 68HC11 TLC2543. microcontroller device type used illustrate this interface 48-pin dual-in-line version MC68HC811E2. master slave (MISO), master slave (MOSI) serial clock (SCK) terminals available alternative, user selectable, functions port pins PD2, PD3, respectively. When configured operate master, SS/PD5 terminal used output drive chip select (CS) terminal TLC2543. This leaves other bidirectional ports microcontroller uncommitted available other uses. Note that extra glue logic required implement interface.
TLC2543 CLOCK DATA INPUT DATA
MC68HC811E2 SCK0/PD4 MISO/PD2 MOSI/PD3 SS/PD5 Mode
MODB
Channel Number
NOTES: Configured single chip mode operation Maximum data rate crystal frequency/8
Figure TLC2543 MC68HC811E2 Microcontroller Interface
Software
listing program which written coordinate control interface between TLC2543 68HC811E2 shown List software consists main program subroutines named TLC2543 STORE. TLC2543 begins providing ADC's chip select pulse. then reads channel/mode data port parallel port subsequently sends this data TLC2543 MOSI terminal SPI. same time, first byte result from previous analog-to-digital conversion received MISO terminal SPI.
List
LINE SOURCE 1000 0000 0003 0007 0008 0009 0028 0029 002A 00F0 00F1 00F2 0000 F800 F800 F802 F804 F806 F808 F80A F80C F80F F812 F815 863E A709 8650 A728 8600 A707 1C0820 BDF817 BDF84A 20E9 $F800 #$0070 Stack Pointer START LDAA #$3E STAA DDRD,X LDAA #$50 STAA SPCR,X LDAA #$00 STAA DDRC,X BSET PORTD,X#$20 TLC2543 STORE START #BASEADD LDAA CSHIGH BSET PORTD,X#$20 Port (TLC2543 high DECA CSHIGH BCLR PORTD,X#$20 BRSET PORTC,X#$02 LSBF set. LDAA PORTC,X STAA SPDR,X receive MSByte LOOP1 BRCLR SPSR,X#$80 LOOP1 repeat check LDAA SPDR,X STAA MSBYTE BRSET PORTC,X#$02 RETURN MSB/LSB-first return LDAA PORTC,X STAA SPDR,X receive LSByte LOOP2 BRCLR SPSR,X#$80 LOOP2 LDAA SPDR,X STAA LSBYTE BRSET PORTC,X#$02 TLC2543 Start $F800 Load Store DDRD Load into master Load into PORTC I/Ps ;ADC high conversion Store results Repeat above TLC2543 12-bit Serial MC68HC11 Microcontroller Interface Program This program contains subroutines "TLC2543" "STORE". "TLC2543" reads mode control channel select data Port then sends this data TLC2543 same time receives result previous conversion. "STORE" puts results into addresses with MSBytes even addresses LSBytes addresses. Channel result addresses Channel result addresses etc. $1000 Register block start Port Data Register Port Data Register Port Data Port Data Register Port Data Control Register Status Register Data Register MSBYTE address LSBYTE address TEMP address
BASEADD PORTA PORTC DDRC PORTD DDRD SPCR SPSR SPDR MSBYTE LSBYTE TEMP
F817 CE1000 F81A 8602 F81C 1C0820 F81F F820 F822 F825 26FA 1D0820 1E03021
first Load Chan/mode data Send data SPIF=0, Store MSByte Load chan/mode data Send data SPIF=0, repeat check Store LSByte
F829 A603 F82B A72A F82D 1F2980FC F831 A62A F833 97F0 F835 1E030210 F839 A603 F83B A72A F83D F841 F843 F845 1F2980FC A62A 97F1 1E0302E
List (Continued)
LINE SOURCE MSB/LSB-first RETURN S'routine stores MSByte even address LSByte address Channel result Channel result etc. (Reserve addresses $30-$4B results channels) STORE LDAA PORTC,X #$30 STAA TEMP LDAA #$F0 ANDA TEMP RORA RORA RORA RORA LDAA #$02 TEMP LDAA MSBYTE STAA TEMP,X LDAA LSBYTE STAA TEMP,X STAA TEMP,X
F849
F84A F84C F84F F851 F853 F855 F856 F857 F858 F859 F85A F85C F85D F85F F861 F863 F864 F866 F866 F868
A603 CE0030 97F2 86F0 94F2 8602 DDF2 96F0 A7F2 96F1 A7F2 A7F2
TLC2543 80C51 Microcontroller Interface
Microcontroller Features
80C51 microcontroller family does provide equivalent facility. order implement interface with TLC2543 analog-to-digital converter, necessry software synthesize operation SPI. This results slower data transfer rate which governed microcontroller's instruction cycle times. These are, turn, influenced clock frequency microcontroller. highest clock frequency possible should therefore selected microcontroller minimize instruction cycle times thus optimize data transfer rate interface.
Interface Circuit
Figure shows circuit interface TLC2543 80C51 microcontroller. CLOCK, DATA INPUT inputs TLC2543 provided bidirectional parallel port terminals P1.0, P1.1, P1.3 respectively. Conversion result data from TLC2543 received 80C51 through P1.2 terminal port channel select/mode data input microcontroller port
TLC2543 CLOCK DATA INPUT DATA P1.0 P1.1 P1.2 P1.3
80C51
P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7
Mode
Channel Number
Figure TLC2543 80C51 Microcontroller Interface
Software
listing program used control interface circuit mentioned above shown List other microcontroller interface programs, consists main program subroutines TLC2543 STORE. main program initializes directions port terminals. P1.2 configured input. P1.0, P1.1, P1.3 programmed perform outputs. chip select terminal TLC2543 high setting P1.3. TLC2543 then called. This subroutine contains instructions which synthesize function controls exchange data between microcontroller TLC2543. least significant first (LSBF) flag which channel select/mode data byte checked determine which byte (most significant MSByte, least significant LSByte) conversion result expected first. function synthesized using accumulator conjunction with rotate left through carry (RLC) instruction shift register. following sequence provides slow motion version function. first first byte conversion result read into carry bit. contents accumulator rotated left through carry first channel select/mode data then output from P1.1. first pulse serial clock then provided toggling P1.0 port first high then low. This sequence repeated seven more times complete transfer first byte data.
second byte data tranferred between TLC2543 80C51 repeating entire sequence eight sets data transfer clock pulse. MSByte placed register (R2) LSByte placed register (R3). subroutine STORE used MSByte LSByte conversion results into even number addresses corresponding particular channel number which been selected.
List
LINE SOURCE TLC2543 12-bit Serial 80C51 Microcontroller Interface Program ;This program reads mode/channel select data into ;80C51 Port transmits this data ;TLC2543 same time reading result from ;the previous conversion storing result ;adjacent pair memory locations from 4CH. ;MSByte Even Address LSByte Address ;MSByte Channel 30H, MSByte Channel etc. 100H START: SP,#50H ;Initialise Stack Pointer P1,#04H ;Initialize port Pins P1.0 ;Set clock SETB P1.3 ;Set chip select high A,#00FFH ACALL TLC2543 ACALL STORE START ;Read mode/channel data into ;and ;Set chip select LSByte first MSB: R5,#08 ;Load counter LOOP1: C,P1.2 ;Read data into carry ;Rotate into accumulator P1.1,C ;Output mode/channel SETB P1.0 ;Set clock high P1.0 ;Set clock DJNZ R5,LOOP1 ;Get/send another R2,A ;Put MSByte A,R4 ;Put mode/channel data ACC.1,RETURN LSB: R5,#08 ;Load counter LOOP2: C,P1.2 ;Read data into carry ;Rotate into accumulator P1.1,C ;Output mode/channel SETB P1.0 ;Set clock high P1.0 ;Set clock DJNZ R5,LOOP2 ;Get/send another R3,A ;Put LSByte A,R4 ;Put mode/channel data ACC.1,MSB MSbyte next RETURN: STORE: A,R4 A,#0F0H SWAP B,#02 ;Put mode/channel data ;Retain only channel number ;Swap high nibble TLC2543:MOV R4,P3 A,R4 P1.3 ACC.1,LSB
0100 0100 0103 0106 0108 010A 010C 010E 0110 0112 0114 0115 0117 011A 011C 011E 011F 0121 0123 0125 0127 0128 0129 012C 012E 0130 0131 0133 0135 0137 0139 013A 013B
758150 759004 C290 D293 74FF 3112 313F 80EE ACB0 C293 20E112 7D08 A292 9291 D290 C290 DDF5 20E112 7D08 A292 9291 D290 C290 DDF5 20E1DC
013E 013F 0140 0142 0143 54F0 75F002
List (Continued)
LINE 0146 0147 0149 014A 014B 2430 SOURCE A,#030H R1,A A,R2 @R1,A ;Add accumulator ;Put MSByte corresponding ;even number address ;Channel address 30H, ;Channel address etc. ;Put LSByte corresponding ;odd number address ;Channel address 31H, ;Channel address etc.
014C 014D 014E
A,R3 @R1,A
014F
Analog Considerations
Power Supply Decoupling
Care should taken with design printed circuit board when using 12-bit devices such TLC2543. power supply terminal each analog integrated circuit should separately decoupled analog ground using ceramic capacitor. inclusion tantalum capacitor parallel with ceramic capacitor each device supply terminal also recommended, particularly noisy environments.
Grounding
Separate ground return paths analog digital components back power supply should used prevent noise currents induced digital components from passing through analog ground return path. These noise currents induce noise voltages occur analog ground return thus corrupt analog signal. Remember that, full scale signal, only microvolts represents approximately half 12-bit ADC. important point remember that ground return paths have finite impedance. This impedance should kept minimum wide printed circuit board tracks ground planes where possible. separate star connected ground topology recommended analog components. This involves connecting each analog component's ground terminal central star point, which then connected wide printed circuit track power supply ground connection.
Board Layout
Digital devices power switching elements should kept away physically from analog components, such TLC2543, possible. Particular attention should paid switching power supplies. high frequency switching currents which flow ground return paths these space saving power blocks introduce several LSBs noise into 12-bit analog circuits. Linear regulated power supplies should used essential, switching regulators should possible from analog circuitry with their outputs decouple. Judicious ground planes help reduce analog ground impedances. Figure illlustrates typical bypassing scheme TLC2543-to-TMS370 microcontroller interface.
Direction Current Flow Connection Output Power Supply
Tantalum Tantalum Creamic TLC2543
Tantalum Creamic TMS370C010 SPICLK SPISIMO SPISOMI
Creamic
Tantalum Connection Output Power Supply
AIN0 CLOCK AIN1 AIN2 DATA INPUT AIN3 DATA AIN4 AIN5 AIN6 Creamic AIN7 AIN8 AIN9 AIN10
External Data/Address Used)
Ground Return Power Supply
Direction Current Flow
Figure TLC2543 Microcontroller Interface: Grounding Decoupling Scheme
Appendix
References
H8/325 Hardware User's Manual H8/300 Series Programming Manual Embedded Microcontrollers Processors M68HC11 Reference Manual (1991) TMS370 Family Data Manual (1993) TLC2543 Data Sheet (Dec. '93) Hitachi Hitachi Intel Corporation Motorola Inc. Texas Instruments Incorporated Texas Instruments Incorporated
Acknowledgement
wish express thanks Mike Williams (Microcontroller Field Applications Engineer Northern European Industrial Segment) useful comments TMS370 interface.
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