Digital Products Quality Flows This document presents flows used

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Digital Products Quality Flows This document presents flows used

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Quality Flows
Digital Products Quality Flows
This document presents flows used manufacturing screening TEMIC Digital (Processors, Memories, ASICs ASSPs).
Process Control
shown following tables, each device constructed manufacturing processes which under surveillance TEMIC Quality organization. Control these processes maintained statistical techniques such capability studies SPC. Results processed accordance with standards, internal specifications, procedures. Audits "self-audits" used extensively continuously monitor quality implement corresponding corrective actions. TEMIC prepares maintains suitable documentation covering phases conception manufacturing. customer verify that suitable documentation exists being utilised. Information designated "Proprietary" will made available customer representative only with written permission TEMIC. Process control recognized vital part concept "built-in quality". addition formal inspections, TEMIC implements various monitoring systems such scanning electron microscope (SEM) glassivation layer integrity.
Wafer Fabrication: Quality Control Flow Chart
Process Step Typical Item
Incoming Inspection Silicon Wafers Resistivity, Bow, TTV, Flatness Oxygen Content, Thickness, Particles Defects Conformity
Frequency
Method
Monitoring Supplier's data
Every Mask Reticule Weekly Monitoring Each Supplier Every
Incoming Inspection Masks Reticules
Dimensions Registration Thickness C(V)
Oxidation
Wafers/Run Parts/Wafer
Monitoring Every
Implant Diffusion
Therma-Wave Resistivity) Thickness Thickness
Wafers/Lot
Every Every Every
Wafers/Run Parts/Wafer
Wafers/Run Parts Wafer Wafers/Run Parts Wafer Wafers/Run Parts Wafer Wafers/Run Parts Wafer Wafers/Run Parts Wafer Wafers/Run Parts Wafer
Si-Nitride Deposition Etching
Critical Dimensions Thickness Delta C(V)
Every Every Every Every
Gate-Oxidation
Thickness
Polysilicon Deposition Etching
Critical Dimensions Inspection
Monitoring 100%
MATRA Rev. Oct.
Quality Flows
Wafer Fabrication: Quality Control Flow Chart
Process Step Typical Item
Resistivity
Frequency
Method
Every Week Every Shift Every Every
Wafer
Reflectivity Thickness
Metal Deposition Etching
Wafer/Lot Parts/Wafer Wafers/Lot
Critical Dimensions Inspection Thickness Stress
Parts Wafers
Monitoring 100% Every Every
Wafer/Run Parts/Wafer Wafer/Run
Glassivation Deposition Etching
Inspection
Monitoring/100%
Test Site
Electrical Parameters Functional Test Visual Defects
Every Lot/visual inspenction lots Every
100% Wafers Site/Wafer 100% Wafers 100% Dice Wafers/Lot Wafers/Lot
Wafer-Sort
Visual Inspection Acceptance
Monitoring/100%
results/Gate lots
Note: representatives audit operations time.
Assembly: Quality Control Flow Chart
Various assembly flows used MIL-STD-883 Class Level Compliant Hermetic Assembly MIL-STD-883 Class Level 9000 Space Hermetic Assembly TEMIC/MHS Military Hermetic Assembly Plastic Assembly Prototype Hermetic Assembly
Hermetic Assembly Equivalent STD-883 Class Level performance Equivalent STD-883 Class Level 9000 performance Note: representatives audit operations time.
MATRA Rev. Oct.
Quality Flows
Hermetic Assembly: Quality Control Flow Chart
These flow charts apply military range products.
Frequency Process Process Step
Incoming Inspection First Optical Optical Inspection Inspection Inspection 0.4% Visual Visual Die-Bonding Die-Shear Stud-Pull X-Ray Inspection 0.4% Visual Visual Wire-Bonding Bond-Pull Loop-Height Inspection 0.4% Third Optical Inspection 0.4% Prestab Bake Sealing Stabilization Bake Thermal Cycling Test Constant Acceleration Visual Visual Dimensional Visual Thickness Every Every 100% Visual Visual Visual 100% Cond. 100% Every 100% Every Monitoring 100% Every Visual Visual Visual 100% Every Every LTPD (low magnification) Monitoring 0.4% Every MIL-2001 Cond. Every Cond. Every Cond. 100% Cond. 100%2 4#/40 Wires/Every 5#/Every Monitoring AQL= 0.4% Monitoring 100% Every Every Cond.
Typical Item
Base/Frame/Caps/ Bonding-Materials/Wires Visual Visual
Every Material Every Lot/100% Wafers
Method
TEMIC/MHS TEMIC/MHS Spec
100% Cond.
100%2
0.4%
MIL-2010 TEMIC/MHS Spec MIL-2010 TEMIC/MHS Spec MIL-2010 MIL-2019 MIL-2027 MIL-2010 TEMIC/MHS Spec
Monitoring Same Second Optical eutectic) silver glass) Monitoring 100%2
1MIL-2010/ TEMIC/MHS Spec
MIL-2011 TEMIC/MHS Spec MIL-2010 TEMIC/MHS Spec MIL-2010 TEMIC/MHS Spec MIL-2010 2010 TEMIC/MHS Spec TEMIC/MHS Spec MIL-1010 Cond.
Trimming/Forming Solder-Dip PIND Test Fine/Gross Leak Marking (back-side) Final Inspection Inspection 0.4%
1MIL-2010 2TEMIC/MHS
MIL-2009 MIL-2009 MIL-2020 MIL-1014 TEMIC/MHS Spec MIL-2009 MIL-2009
100% Every
Spec
MATRA Rev. Oct.
Quality Flows
These flow charts apply space range products, limited multilayer packages.
Frequency Process
Every Material Every Lot/100% Wafers 100% Cond. A1** Visual Visual Die-Bonding Die-Shear Stud-Pull X-Ray Inspection 0.4% Visual Visual Wire-Bonding Bond-Pull Loop-Height Inspection 0.4% Third Optical Inspection/Precap Gate 0.4% Precap Prestab Bake Sealing Stabilization Bake Thermal Cycling Constant Acceleration Trimming/Forming PIND Test Fine/Gross Leak Marking (back-side) Final Inspection Inspection 0.4% Visual Visual Test Visual Visual Dimensional Visual Visual Visual Visual Visual Every 100% Cond. 4#/40 Wires/Every 5#/Every Every Cond. 100% Cond. Every Cond. Every Cond. 100% Every Every 100% Every Every 100% Every 100% Every 100% Every 100% Every Every Monitoring Monitoring Report Monitoring 100%2 Every Lot1 Every Cond. Same Second Optical eutectic) silver glass) Monitoring 100%2 MIL-2010 TEMIC/MHS Spec MIL-2010/ TEMIC/MHS Spec MIL-2011 TEMIC/MHS Spec MIL-2010 TEMIC/MHS Spec MIL-2010 TEMIC/MHS Spec 2010 MIL-2010 TEMIC/MHS Spec 100%2 Every Lot2 Every Lot2
Process Step
Incoming Inspection First Optical Optical Inspection Inspection Inspection 0.4%
Typical Item
Base/Frame/Caps/ Bonding-Materials/Wires Visual Visual
Method
TEMIC/MHS Spec SCC9000 TEMIC/MHS Spec MIL-2010 TEMIC/MHS Spec MIL-2018/SCC21400 TEMIC/MHS Spec MIL-2010 TEMIC/MHS Spec MIL-2010 MIL-2019 MIL-2027
TEMIC/MHS Spec MIL-1010 Cond. cycles MIL-2001 Cond Cond. MIL-2009 SCC20500 MIL-2020 cond MIL-1014 TEMIC/MHS Spec
MIL-2009 20500
MIL-2009 20500
Visual
micron technologies using multiple metal levels, some criteria Method 2010 visible. such case most appropriate performance spec substituted.
1MIL-2010 2TEMIC/MHS
Spec
MATRA Rev. Oct.
Quality Flows
Plastic Assembly: Quality Control Flow Chart
Process Step
Incoming Inspection Optical Inspection Dicing Optical Inspection Bonding
Typical Item
Frame/Resin/Bonding-Materials/ Wires .Thickness, Particles Visual Water Kerf Width Visual Visual Visual Die-Shear Cure Temperature Visual Bond-Pull Ball-Shear Bond Crater Visual X-Ray Step Temperature Time Visual Cure-Temperature Permanency Composition Thickness Solderability Visual Visual Dimensional incl. Coplanarity Visual Coplanarity Open/Shorts
Frequency
Every Material
Sampling
Every Lot/Sampling
TEMIC/MHS Spec 0.65% Lower
TEMIC/MHS Spec 0.65% Lower
Every Lot/Sampling
Wire Bonding
Optical Inspection Molding Marking (top side) Optional
Every Lot/Sampling
TEMIC/MHS Spec 0.65% Lower
Solder Plating Marking (back-side) Trimming/Forming Final Inspection Electrical Test
Every Lot/Sampling Monitoring TEMIC/MHS Spec 0.1% TEMIC/MHS Spec
Note: representatives audit operations time.
MATRA Rev. Oct.
Quality Flows
Form: Quality Control Flow Chart
products available form upon request. They screened using either TEMIC standards based SPACE market standards.
Standard Flow
Process Step
Typical Item
Frequency
Method
Wafer Test Site
Control Flow Chart Electrical Characterization
100% Wafers/5
Sorting: standard level Sorting: level
Static/Dynamic/Functionnal Tests
probes Room or/and high temperature probes Room or/and high temperature
100% Wafers
TEMIC/MHS Spec TEMIC/MHS Spec TEMIC/MHS Spec TEMIC/MHS Spec Prototype flow
Dicing (Die Form Sawn Wafer) Optical Inspection Acceptance Sample Assembly Visual based 2010 Cond Visual Every Lot/Sampling 0.4% Optional applicable level Optional applicable level Acceptance Test
Static/Dynamic/Functionnal Tests Fast Dynamic Burn-In
TEMIC/MHS Spec
Space Flow
Process Step
Typical Item
Frequency
Method
Wafer Test Site
Control Flow Chart Electrical Characterization
100% Wafers/5 100% Wafers temp 100% Dice Every Flow
Sorting Dicing
Static/Dynamic Functional Tests Visual
TEMIC/MHS Spec TEMIC/MHS Spec TEMIC/MHS Spec 0.4%
Visual based 2010 Cond Visual
Optical Inspection Precab Gate Acceptance Sample Assembly
Mechanical Conformance Electrical Test
Bond Pull
Parts Wires Size 100% 100% 100%
MIL-2011
Room Temp Hight Temp Temp Electrical
Static /Dynamic /Functionnal Test
TEMIC/MHS Spec
Acceptance electrical refect
Note: information dies delivered according (Known Good Die) flow available GoodDie site http://www.gooddie.com
MATRA Rev. Oct.
temperature test depending product probe test condition: temperature Commercial, temperature Industrial
MATRA Rev. Oct. TEMIC offers broad range screening flows, such commercial, industrial, automotive, military space. Methods associated with each step covered TEMIC
Product Flows
Shipping Inspection
Data Package
Certification Compliance
Customer Source Inspection
Reliability Conformation
Mechanical Conformation
Electrical Conformation
Global
External Visual
X-Ray Inspection
Gross Fine Leaks
Electrical Test
Dynamic Burn-In
Burn-In Test
Serialization
Marking
Assembly Flow
Wafer Inspection
Process Steps
Electrical Gate
Electrical
Drift
Temperature
High Temperature
Room Temperature
Commercial 70_C
Test Date Code
Deliveries
0.065%
Monitoring
Monitoring
Monitoring
Monitoring
100%*
100%*
L4/L7
100%
Industrial 85_C
procedures procedures defined standards (MIL-STD-883) depending flow. following tables describe these flows.
Test Date Code
Deliveries
0.065%
Monitoring
Monitoring
Monitoring
Monitoring
100%*
100%*
100%*
L4/L7
100%
Quality Flows
Automotive 125_C
100% 12h/150°C
Test Date Code
Deliveries
0.065%
Monitoring
Monitoring
Monitoring
Monitoring
L4/L7
100%
100%
100%
Quality Flows
*Technilogy product dependant. Shipping Inspection Data Package Reliability Conformation Mechanical Conformation Electrical Conformation Global External Visual X-Ray Inspection Gross Fine Leaks Electrical Test Dynamic Burn-In Burn-In Test Serialization Marking Assembly Flow Wafer fab. flow
Process Steps
Military Space
Electrical Gate
Electrical
Drift
Temperature
High Temperature
Room Temperature
TEMIC Flow
0.065%
Standard/RT
Monitoring
Monitoring
Monitoring
Deliveries
Test Date Code
100%
100%
100%
Military 125_C
168h/125_C Equivalent
Proposed QML-Q
Room Temp.
Sealing Date Code
Standard/RT
Monitoring
Deliveries
Deliveries
Group
Group
100%
100%
100%
100%
Class Level
Deliveries
Deliveries
Deliveries
168h/125_C Equivalent
Room Temp.
Sealing Date Code
Standard/RT
requested
Group
Group
Group
100%
100%
100%
100%
100%
Deliveries
Deliveries
Deliveries
Deliveries
Sealing Date Code
168h/125_C
requested
9000 Level
Global
100%
100%
100%
100%
100%
100%
Space 125_C
Global
Deliveries
Deliveries
Deliveries
Deliveries
Sealing Date Code
240h/125_C
requested
9000 Level
100%
100%
Room Temp. Functionnal)
MIL-883 Class Level
Deliveries
Deliveries
Deliveries
Deliveries
240h/125_C Equivalent
Sealing Date Code
requested
Specified
Group
Group
Group
100%
100%
100%
MATRA Rev. Oct.
240h/125_C Equivalent
Proposed QML-V
Room Temp.
Sealing Date Code
requested
Monitoring
Deliveries Deliveries Deliveries Group 100%* 100%* 100%* 100%* 100% 100% Group

Digital Products Quality Flows This document presents flows used

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