CMOS Analog Multiplexers/Demultiplexers Pinout CD4067BMS VIE

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CMOS Analog Multiplexers/Demultiplexers Pinout CD4067BMS VIE

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CD4067BMS CD4097BMS
CMOS Analog Multiplexers/Demultiplexers
Pinout
CD4067BMS VIEW
December 1992 February 1995
Features
High Voltage Types (20V Rating) CD4067BMS Single Channel Multiplexer/Demultiplexer CD4097BMS Differential Channel Multiplexer/Demultiplexer Resistance: (typ) Over 15Vp-p Signal Input Range High Resistance: Channel Leakage ±10pA (typ) Matched Switch Characteristics: (typ) Very Quiescent Power Dissipation Under Digital Control Input Supply Conditions: 0.2µW (typ) Binary Address Decoding Chip Parametric Ratings 100% Tested Quiescent Current Maximum Input Current Over Full Package Temperature Range; 100nA +25oC Standardized Symmetrical Output Characteristics
COMMON OUT/IN
INHIBIT
CHANNEL
IN/OUT
Applications
Analog Digital Multiplexing Demultiplexing Conversion Signal Gating
When these devices used demultiplexers "CHANNEL IN/OUT" terminals outputs "COMMON OUT/IN" terminals inputs.
COMMON OUT/IN CHANNEL IN/OUT COMMON OUT/IN CHANNEL INHIBIT IN/OUT CHANNEL IN/OUT
CD4097BMS VIEW
Description
CD4067BMS CD4097BMS CMOS analog multiplexers/ demultiplexers* digitally controlled analog switches having Impedance, leakage current, internal address decoding. addition, resistance relatively constant over full input-signal range. CD4067BMS channel multiplexer with four binary control inputs, inhibit input, arranged that combination inputs selects switch. CD4097BMS differential channel multiplexer having three binary control inputs inhibit input. inputs permit selection eight pairs switches. logic present inhibit input turns channels off. CD4067BMS CD4097BMS supplied these lead outline packages: Braze Seal Frit Seal Ceramic Flatpack *CD4067B Only *H4V *H1Z *H4P CD4097B
CAUTION: These devices sensitive electrostatic discharge. Users should follow proper I.C. Handling Procedures. Copyright
Harris Corporation 1992
File Number
3190
Specifications CD4067BMS, CD4097BMS
Absolute Maximum Ratings
Supply Voltage Range, (VDD) -0.5V +20V (Voltage Referenced Terminals) Input Voltage Range, Inputs .-0.5V +0.5V Input Current, Input .±10mA Operating Temperature Range -55oC +125oC Package Types Storage Temperature Range (TSTG) -65oC +150oC Lead Temperature (During Soldering) +265oC Distance 1/16 1/32 Inch (1.59mm 0.79mm) from case Maximum
Reliability Information
Thermal Resistance Ceramic FRIT Package 80oC/W 20oC/W Flatpack Package 70oC/W 20oC/W Maximum Package Power Dissipation (PD) +125 -55oC +100oC (Package Type 500mW +100oC +125oC (Package Type Derate Linearity 12mW/oC 200mW Device Dissipation Output Transistor 100mW Full Package Temperature Range (All Package Types) Junction Temperature +175oC
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP SUBGROUPS 18V, Input Leakage Current Input Leakage Current ON-State Resistance Returned VSS/2 Threshold Voltage Threshold Voltage Functional (Note VNTH VPTH 10V, -10µA 10µA 2.8V, 20V, 18V, Input Voltage (Note Input Voltage High (Note Input Voltage (Note Input Voltage High (Note Thru |ISS| Channels Thru |ISS| Channels LIMITS TEMPERATURE +125oC -55oC +125oC -55oC +25oC +125oC -55oC +25oC +125oC -55oC +25oC +125oC -55oC +25oC +125oC -55oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC
PARAMETER Supply Current
SYMBOL
CONDITIONS (NOTE 20V,
-100 -1000 -100 -2.8
1000 1000 1050 1300 -0.7
UNITS
VDD/2 VDD/2
+25oC, +125oC, -55oC +25oC, +125oC, -55oC
Specifications CD4067BMS, CD4097BMS
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP SUBGROUPS IOZH VOUT NOTES: voltages referenced device GND, 100% testing being implemented. Go/No test with limits applied inputs. LIMITS TEMPERATURE +25oC +125oC -55oC +25oC +125oC -55oC -0.1 -1.0 -0.1 UNITS
PARAMETER Channel Leakage Channel Channels (Common OUT/IN)
SYMBOL IOZL
CONDITIONS (NOTE VOUT
accuracy, voltage measured differentially VDD. Limit 0.050V max. 2.8/3.0V, 200K 20V/18V,
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP SUBGROUPS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC LIMITS UNITS
PARAMETER Propagation Delay (Signal Output) Propagation Delay Address Inhibit Signal Out. (Channel Turning NOTES:
SYMBOL TPHL TPLH TPZH TPZL
CONDITIONS (Notes (Notes
50pF, 200K, Input 20ns. -55oC +125oC limits guaranteed, 100% testing being implemented. 50pF, 10K, Input 20ns. TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL CONDITIONS NOTES TEMPERATURE
UNITS
+25oC
+125oC 10V, -55oC, +25oC +125oC 15V, -55oC, +25oC +125oC Input Voltage Input Voltage High Channel +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC +25oC
Propagation Delay Address Inhibit Signal Out. (Channel Turning Propagation Delay Signal Output
TPZH TPZL
TPHL TPLH
+25oC +25oC
Specifications CD4067BMS, CD4097BMS
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Propagation Delay Address Inhibit Signal (Channel Turning Off) Input Capacitance NOTES: voltages referenced device GND. parameters listed Table controlled design process directly tested. These parameters characterized initial design release upon design changes which would affect these characteristics. 50pF, 200K, Input 20ns. 50pF, 10K, Input 20ns. 50pF, 300, Input 20ns. TABLE POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current Threshold Voltage Threshold Voltage Delta Threshold Voltage Threshold Voltage Delta Functional SYMBOL VNTH CONDITIONS 20V, 10V, -10µA 10V, -10µA 10µA 10µA 18V, Propagation Delay Time TPHL TPLH +25oC NOTES TEMPERATURE +25o -2.8 VDD/2 -0.2 VDD/2 1.35 +25oC Limit UNITS SYMBOL TPHZ TPLZ CONDITIONS Address Inhibit NOTES TEMPERATURE +25oC +25oC
UNITS
+25oC +25oC +25oC
NOTES: voltages referenced device GND. 50pF, 200K, Input 20ns.
Table +25oC limit. Read Record
TABLE BURN-IN LIFE TEST DELTA PARAMETERS +25OC PARAMETER Supply Current MSI-2 Resistance SYMBOL RONDEL10 1.0µA Pre-Test Reading DELTA LIMIT
TABLE APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) Interim Test (Post Burn-In) Interim Test (Post Burn-In) (Note Interim Test (Post Burn-In) (Note Final Test MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 GROUP SUBGROUPS Deltas Deltas IDD, IOL5, IOH5A, RONDEL10 READ RECORD IDD, IOL5, IOH5A, RONDEL10 IDD, IOL5, IOH5A, RONDEL10 IDD, IOL5, IOH5A, RONDEL10
Specifications CD4067BMS, CD4097BMS
TABLE APPLICABLE SUBGROUPS CONFORMANCE GROUP Group Group Subgroup Subgroup Group MIL-STD-883 METHOD Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP SUBGROUPS Deltas Subgroups Subgroups READ RECORD
NOTE: Parameteric, Functional; Cumulative Static
TABLE TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD POST-IRRAD Table READ RECORD PRE-IRRAD POST-IRRAD Table
CONFORMANCE GROUPS Group Subgroup
TABLE BURN-IN IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION PART NUMBER CD4067BMS Static Burn-In Note Static Burn-In Note Dynamic Burn-In Note Irradiation Note PART NUMBER CD4097BMS Static Burn-In Note Static Burn-In Note Dynamic Burn-In Note Irradiation Note NOTE: Each except will have series resistor 0.5V Each except will have series resistor Group Subgroup sample size dice/wafer, failures, 0.5V 14kHz, 7kHz, 1.7kHz, 3.5kHz 14kHz, 7kHz, 3.5kHZ (Note (Note OPEN GROUND -0.5V 50kHz 25kHz
CD4067BMS, CD4097BMS Functional Diagram
INHIBIT INHIBIT DECODERS IN/OUT IN/OUT OUT/IN IN/OUT OUT/IN OUT/IN DECODERS
CD4067 CD4067 TRUTH TABLE SELECTED CHANNEL None
tPZL 20ns
CD4097 CD4097 TRUTH TABLE SELECTED CHANNEL None
20ns TURN-ON TIME
tPLZ
TURN-OFF TIME
FIGURE WAVEFORM CHANNEL BEING TURNED
20ns 20ns
TURN-ON TIME tPZH
tPHZ
TURN-OFF TIME
FIGURE PROPAGATION DELAY WAVEFORM, CHANNEL BEING TURNED OFF,
CD4067BMS, CD4097BMS
CHANNEL IN/OUT
BINARY DECODERS WITH INHIBIT
COMMON OUT/IN
INHIBIT
*ALL INPUTS PROTECTED
CMOS PROTECTION NETWORK
FIGURE CD4067BMS LOGIC DIAGRAM
CD4067BMS, CD4097BMS
CHANNEL IN/OUT
CHANNEL IN/OUT
COMMON OUT/IN
BINARY DECODERS WITH INHIBIT
INHIBIT
COMMON OUT/IN
*ALL INPUTS PROTECTED
CMOS PROTECTION NETWORK
FIGURE CD4097BMS LOGIC DIAGRAM
CD4067BMS, CD4097BMS Typical Performance Characteristics
SUPPLY VOLTAGE (VDD VSS) CHANNEL RESISTANCE (RON) CHANNEL RESISTANCE (RON) INPUT SIGNAL VOLTAGE (VIS) +25oC -55oC AMBIENT TEMPERATURE (TA) +125oC -10.0 -7.5 +25oC -55oC AMBIENT TEMPERATURE (TA) +125oC SUPPLY VOLTAGE (VDD VSS)
-5.0
-2.5
10.0
INPUT SIGNAL VOLTAGE (VIS)
FIGURE TYPICAL RESISTANCE INPUT SIGNAL VOLTAGE (ALL TYPES)
FIGURE TYPICAL RESISTANCE INPUT SIGNAL VOLTAGE (ALL TYPES)
CHANNEL RESISTANCE (RON)
CHANNEL RESISTANCE (RON)
AMBIENT TEMPERATURE (TA) +25oC SUPPLY VOLTAGE (VDD VSS)
SUPPLY VOLTAGE (VDD VSS)
AMBIENT TEMPERATURE (TA) +125oC
+25oC -55oC
-10.0 -7.5 -5.0 -2.5 10.0 INPUT SIGNAL VOLTAGE (VIS)
-10.0 -7.5
-5.0
-2.5
10.0
INPUT SIGNAL VOLTAGE (VIS)
FIGURE TYPICAL RESISTANCE INPUT SIGNAL VOLTAGE (ALL TYPES)
FIGURE TYPICAL RESISTANCE INPUT SIGNAL VOLTAGE (ALL TYPES)
CD4067BMS, CD4097BMS Chip Dimensions Layouts
CD4067BMSH
Dimensions parentheses millimeters derived from basic inch dimensions indicated. Grid graduations mils (10-3 inch)
CD4097BMSH
Special Considerations applications where separate power sources used drive signal inputs, current capability should exceed VDD/RL effective external load). This provision avoids permanent current flow clamp action supply when power applied removed from CD4067BMS CD4097BMS. When switching from address another, some periods channels multiplexers will overlap momentarily, which objectionable certain applications. Also when channel turned address input, there momentary conductive path from channel VSS, which will dump some charge from capacitor connected input output channel. inhibit input turning channel will similarly dump some charge VSS. amount charge dumped mostly function signal level above VSS. Typically, 10V, 100pF capacitor connected input output channel will lose voltage moment channel turns off. This loss voltage essentially independent address inhibit signal transition time, transition time less than 2µs. When inhibit signal turns channel off, there charge dumping VSS. Rather, there slight rise channel voltage level (65mV typ.) capacitive coupling from inhibit input channel input output. Address inputs also couple some voltage steps onto channel signal levels. certain applications, external load resistor current include both signal-line components. avoid drawing current when switch current flows into transmission gate inputs, voltage drop across bidirectional switch must exceed volt (calculated from values shown ELECTRICAL CHARACTERISTICS CHART Table current will flow through switch current flows into terminal CD4067BMS, terminals CD4097BMS. METALLIZATION: Thickness: PASSIVATION: Silane BOND PADS: 0.004 inches 0.004 inches 0.0198 inches 0.0218 inches THICKNESS:
7-10

CMOS Analog Multiplexers/Demultiplexers Pinout CD4067BMS VIE

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