4421.1 Buck Pulse-Width Modulator (PWM) Controller Output Voltage

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4421.1 Buck Pulse-Width Modulator (PWM) Controller Output Voltage

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HIP6015
4421.1
Buck Pulse-Width Modulator (PWM) Controller Output Voltage Monitor
HIP6015 provides complete control protection DC-DC converter optimized high-performance microprocessor applications. designed drive N-Channel MOSFET standard buck topology. HIP6015 integrates control, output adjustment, monitoring protection functions into single package. output voltage converter easily adjusted precisely regulated. HIP6015 includes fully TTLcompatible 5-input digital-to-analog converter (DAC) that adjusts output voltage from 2.1VDC 3.5VDC 0.1V increments from 1.8VDC 2.05VDC 0.05V steps. precision reference voltage-mode regulator hold selected output voltage within over temperature line voltage variations. HIP6015 provides simple, single feedback loop, voltage-mode control with fast transient response. includes 200kHz free-running triangle-wave oscillator that adjustable from below 50kHz over 1MHz. error amplifier features 15MHz gain-bandwidth product 6V/µs slew rate which enables high converter bandwidth fast transient performance. resulting duty ratio ranges from 100%. HIP6015 monitors output voltage with window comparator that tracks output issues Power Good signal when output within ±10%. HIP6015 protects against over-current over-voltage conditions inhibiting operation. Additional built-in over-voltage protection triggers external crowbar input supply. HIP6015 monitors current using rDS(ON) upper MOSFET which eliminates need current sensing resistor.
Features
Drives N-Channel MOSFET Operates from +12V Input Simple Single-Loop Control Design Voltage-Mode Control Fast Transient Response High-Bandwidth Error Amplifier Full 100% Duty Ratio Excellent Output Voltage Regulation Over Line Voltage Temperature TTL-Compatible 5-Bit Digital-to-Analog Output Voltage Selection Wide Range 1.8VDC 3.5VDC 0.1V Binary Steps 2.1VDC 3.5VDC 0.05V Binary Steps 1.8VDC 2.05VDC Power-Good Output Voltage Monitor Over-Voltage Over-Current Fault Monitors Does Require Extra Current Sensing Element, Uses MOSFET's rDS(ON) Small Converter Size Constant Frequency Operation 200kHz Free-Running Oscillator Programmable from 50kHz over 1MHz
Applications
Power Supply Pentium®, Pentium Pro, Pentium PowerPCTM, K6TM, 6X86and AlphaMicroprocessors High-Power 3.xV DC-DC Regulators Low-Voltage Distributed Power Supplies
Pinout
HIP6015 (SOIC) VIEW
VSEN OCSET VID0 VID1 VID2 VID3 VID4 COMP BOOT UGATE PHASE PGOOD
Ordering Information
PART NUMBER HIP6015CB TEMP. RANGE (oC) PACKAGE SOIC PKG. M20.3
6X86is trademark Cyrix Corporation. Alphais trademark Digital Equipment Corporation. K6is trademark Advanced Micro Devices, Inc. Pentium® registered trademark Intel Corporation. PowerPCis trademark IBM.
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CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. http://www.intersil.com 407-727-9207 Copyright Intersil Corporation 1999
HIP6015 Typical Application
+12V PGOOD VID0 VID1 VID2 VID3 VID4 UGATE MONITOR PROTECTION BOOT OCSET +12V
HIP6015
PHASE +VOUT
COMP
VSEN
Block Diagram
VSEN 110% POWER-ON RESET (POR)
115% OVERVOLTAGE 10µA
PGOOD
SOFTSTART BOOT UGATE PHASE
OCSET 200µA
OVERCURRENT
REFERENCE
VID0 VID1 VID2 VID3 VID4 COMP
CONVERTER (DAC)
DACOUT
COMPARATOR
INHIBIT
GATE CONTROL LOGIC
ERROR
OSCILLATOR
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HIP6015
Absolute Maximum Ratings
Supply Voltage, +15V Boot Voltage, VBOOT VPHASE +15V Input, Output Voltage .GND -0.3V +0.3V Classification Class
Thermal Information
Thermal Resistance (Typical, Note (oC/W) SOIC Package. SOIC Package (with 3in2 Copper) Maximum Junction Temperature (Plastic Package) .150oC Maximum Storage Temperature Range -65oC 150oC Maximum Lead Temperature (Soldering 10s) .300oC (SOIC Lead Tips Only)
Operating Conditions
Supply Voltage, +12V ±10% Ambient Temperature Range 70oC Junction Temperature Range 125oC
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTE: measured with component mounted evaluation board free air.
Electrical Specifications
PARAMETER SUPPLY CURRENT Nominal Supply POWER-ON RESET Rising Threshold Falling Threshold Rising VOCSET Threshold OSCILLATOR Free Running Frequency Total Variation Ramp Amplitude REFERENCE
Recommended Operating Conditions, Unless Otherwise Noted SYMBOL TEST CONDITIONS UNITS
UGATE Open
VOCSET 4.5V VOCSET 4.5V
1.26
10.4
Open 200k VOSC Open
VP-P
(VID0-VID4) Input Voltage (VID0-VID4) Input High Voltage DACOUT Voltage Accuracy ERROR AMPLIFIER Gain Gain-Bandwidth Product Slew Rate GATE DRIVER Upper Gate Source Upper Gate Sink PROTECTION Over-Voltage Trip (VSEN/DACOUT) OCSET Current Source Sourcing Current Soft Start Current IOCSET IOVP VOCSET 4.5V VSEN 5.5V; VOVP IUGATE
RUGATE
-1.0
+1.0
COMP 10pF
V/µs
VBOOT VPHASE 12V, VUGATE
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HIP6015
Electrical Specifications
PARAMETER POWER GOOD Upper Threshold (VSEN /DACOUT) Lower Threshold (VSEN /DACOUT) Hysteresis (VSEN /DACOUT) PGOOD Voltage VPGOOD VSEN Rising VSEN Falling Upper Lower Threshold IPGOOD -5mA Recommended Operating Conditions, Unless Otherwise Noted SYMBOL TEST CONDITIONS UNITS
Typical Performance Curves
1000 RESISTANCE PULLUP +12V (mA) PULLDOWN CUGATE 10pF CUGATE 1000pF CUGATE 3300pF
SWITCHING FREQUENCY (kHz)
1000
1000
SWITCHING FREQUENCY (kHz)
FIGURE RESISTANCE FREQUENCY
FIGURE BIAS SUPPLY CURRENT FREQUENCY
Functional Description
VSEN OCSET VID0 VID1 VID2 VID3 VID4 COMP BOOT UGATE PHASE PGOOD
converter over-current (OC) trip point according following equation:
OCSET PEAK
over-current trip cycles soft-start function.
(Pin
Connect capacitor from this ground. This capacitor, along with internal 10µA current source, sets softstart interval converter.
VID0-4 (Pins 4-8) VSEN (Pin
This connected converters output voltage. PGOOD comparator circuits this signal report output voltage status overvoltage protection. VID0-4 input pins 5-bit DAC. states these five pins program internal voltage reference (DACOUT). level DACOUT sets converter output voltage. also sets PGOOD thresholds. Table specifies DACOUT combinations inputs.
OCSET (Pin
Connect resistor (ROCSET) from this drain upper MOSFET. ROCSET, internal 200µA current source (IOCS), upper MOSFET on-resistance (rDS(ON))
COMP (Pin (Pin
COMP available external pins error amplifier. inverting input error amplifier COMP error amplifier output. These pins used compensate voltage-control feedback loop converter.
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HIP6015
(Pin
Signal ground voltage levels measured with respect this pin.
Functional Description
Initialization
HIP6015 automatically initializes upon receipt power. Special sequencing input supplies necessary. Power-On Reset (POR) function continually monitors input supply voltages. monitors bias voltage input voltage (VIN) OCSET pin. level OCSET equal less fixed voltage drop (see over-current protection). function initiates soft start operation after both input supply voltages exceed their thresholds. operation with single +12V power source, equivalent +12V power source must exceed rising threshold before initiates operation.
PGOOD (Pin
PGOOD open collector output used indicate status converter output voltage. This pulled when converter output within ±10% DACOUT reference voltage. Exception this behavior cases where pins combination yield converter output; these cases PGOOD asserts high level.
PHASE (Pin
Connect PHASE upper MOSFET source. This used monitor voltage drop across MOSFET over-current protection. This also provides return path upper gate drive.
Soft Start
function initiates soft start sequence. internal 10µA current source charges external capacitor (CSS) Soft start clamps error amplifier output (COMP pin) reference input terminal error amp) voltage. Figure shows soft start interval with 0.1µF. Initially clamp error amplifier (COMP pin) controls converter's output voltage. Figure voltage reaches valley oscillator's triangle wave. oscillator's triangular waveform compared ramping error amplifier voltage. This generates PHASE pulses increasing width that charge output capacitor(s). This interval increasing pulse width continues With sufficient output voltage, clamp reference input controls output voltage. This interval between Figure voltage exceeds DACOUT voltage output voltage regulation. This method provides rapid controlled output voltage rise. PGOOD signal toggles `high' when output voltage (VSEN pin) within DACOUT. hysteresis built into power good comparators prevents PGOOD oscillation nominal output voltage ripple.
UGATE (Pin
Connect UGATE upper MOSFET gate. This provides gate drive upper MOSFET.
BOOT (Pin
This provides bias voltage upper MOSFET driver. bootstrap circuit used create BOOT voltage suitable drive standard N-Channel MOSFET.
(Pin
connection.
(Pin
connection.
(Pin
Provide bias supply chip this pin.
(Pin
used drive external event overvoltage condition. Output rising more than DAC-set voltage triggers high output this disables gate drive circuitry.
(Pin
This provides oscillator switching frequency adjustment. placing resistor (RT) from this GND, nominal 200kHz switching frequency increased according following equation:
200kHz
PGOOD (2V/DIV.)
SOFT-START (1V/DIV.) OUTPUT VOLTAGE (1V/DIV.) TIME (5ms/DIV.)
GND)
Conversely, connecting pull-up resistor (RT) from this reduces switching frequency according following equation:
200kHz
12V)
FIGURE SOFT START INTERVAL
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HIP6015
Over-Current Protection
over-current function protects converter from shorted output using upper MOSFET's on-resistance, rDS(ON) monitor current. This method enhances converter's efficiency reduces cost eliminating current sensing resistor.
SOFT-START
inhibits operation. soft-start function recharges operation resumes with error amplifier clamped voltage. Should overload occur while recharging soft start function inhibits operation while fully charging complete cycle. Figure shows this operation with overload condition. Note that inductor current increases over during charging interval causes over-current trip. converter dissipates very little power with this method. measured input power conditions Figure 2.5W. over-current function will trip peak inductor current (IPEAK) determined
OCSET OCSET PEAK
OUTPUT INDUCTOR
TIME (20ms/DIV.)
where IOCSET internal OCSET current source (200µA typical). trip point varies mainly MOSFET's rDS(ON) variations. avoid over-current tripping normal operating load range, find ROCSET resistor from equation above with: maximum rDS(ON) highest junction temperature. minimum IOCSET from specification table. Determine IPEAK PEAK where output inductor ripple current. equation ripple current section under component guidelines titled "Output Inductor Selection." small ceramic capacitor should placed parallel with ROCSET smooth voltage across ROCSET presence switching noise input voltage.
FIGURE OVER-CURRENT OPERATION
over-current function cycles soft-start function hiccup mode provide fault protection. resistor (ROCSET) programs over-current trip level. internal 200µA current sink develops voltage across ROCSET that referenced When voltage across upper MOSFET (also referenced VIN) exceeds voltage across ROCSET, over-current function initiates soft-start sequence. softstart function discharges with 10µA current sink
NAME VID4 VID3 VID2 VID1 VID0 NOMINAL OUTPUT VOLTAGE DACOUT 1.80 1.85 1.90 1.95 2.00 2.05
TABLE OUTPUT VOLTAGE PROGRAM NAME VID4 VID3 VID2 VID1 VID0 NOMINAL OUTPUT VOLTAGE DACOUT
NOTE: connected VSS, connected through pull-up resistors.
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HIP6015
Output Voltage Program
output voltage HIP6015 converter programmed discrete levels between 1.8VDC 3.5VDC voltage identification (VID) pins program internal voltage reference (DACOUT) with TTL-compatible 5-bit digital-toanalog converter (DAC). level DACOUT also sets PGOOD thresholds. Table specifies DACOUT voltage different combinations connections pins. output voltage should adjusted while converter delivering power. Remove input power before changing output voltage. Adjusting output voltage during operation could toggle PGOOD signal exercise overvoltage protection. combinations resulting output setting activate Power-On Reset function disable gate drive circuitry. these specific combinations, though, PGOOD asserts high level. This unusual behavior been implemented order allow operation dualmicroprocessor systems AND-ing PGOOD signals from individual power converters. Figure shows critical power components converter. minimize voltage overshoot interconnecting wires indicated heavy lines should part ground power plane printed circuit board. components shown Figure should located close together possible. Please note that capacitors each represent numerous physical capacitors. Locate HIP6015 within inches MOSFET, circuit traces MOSFET's gate source connections from HIP6015 must sized handle peak current. Figure shows circuit traces that require additional layout consideration. single point ground plane construction circuits shown. Minimize leakage current paths locate capacitor, close because internal current source only 10µA. Provide local decoupling between pins. Locate capacitor, CBOOT close practical BOOT PHASE pins.
+VIN BOOT CBOOT VOUT LOAD
Application Guidelines
Layout Considerations
high frequency switching converter, layout very important. Switching current from power device another generate voltage transients across impedances interconnecting bond wires circuit traces. These interconnecting impedances should minimized using wide, short printed circuit traces. critical components should located close together possible using ground plane construction single point grounding.
HIP6015
PHASE +12V
CVCC
FIGURE PRINTED CIRCUIT BOARD SMALL SIGNAL LAYOUT GUIDELINES
Feedback Compensation
Figure highlights voltage-mode control loop buck converter. output voltage (VOUT) regulated Reference voltage level. error amplifier (Error Amp) output (VE/A) compared with oscillator (OSC) triangular wave provide pulse-width modulated (PWM) wave with amplitude PHASE node. wave smoothed output filter CO).
HIP6015
UGATE PHASE
VOUT LOAD
RETURN
FIGURE PRINTED CIRCUIT BOARD POWER GROUND PLANES ISLANDS
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HIP6015
COMPARATOR DRIVER VOUT PHASE
Compensation Break Frequency Equations
VOSC
VE/A ERROR
(PARASITIC) REFERENCE
DETAILED COMPENSATION COMPONENTS VOUT
COMP
Figure shows asymptotic plot DC-DC converter's gain frequency. actual Modulator Gain high gain peak high factor output filter shown Figure Using above guidelines should give Compensation Gain similar curve plotted. open loop error amplifier gain bounds compensation gain. Check compensation gain with capabilities error amplifier. Closed Loop Gain constructed log-log graph Figure adding Modulator Gain Compensation Gain dB). This equivalent multiplying modulator transfer function compensation transfer function plotting gain. compensation gain uses external impedance networks provide stable, high bandwidth (BW) overall loop. stable control loop gain crossing with -20dB/decade slope phase margin greater than degrees. Include worst case component variations when determining phase margin.
GAIN (dB) FESR 100K MODULATOR GAIN 20LOG (R2/R1) OPEN LOOP ERROR GAIN
HIP6015
DACOUT
FIGURE VOLTAGE-MODE BUCK CONVERTER COMPENSATION DESIGN
modulator transfer function small-signal transfer function VOUT/VE/A. This function dominated Gain output filter CO), with double pole break frequency zero FESR Gain modulator simply input voltage (VIN) divided peak-to-peak oscillator voltage VOSC
Modulator Break Frequency Equations
20LOG (VIN/VOSC) COMPENSATION GAIN CLOSED LOOP GAIN
compensation network consists error amplifier (internal HIP6015) impedance networks goal compensation network provide closed loop transfer function with highest crossing frequency (f0dB) adequate phase margin. Phase margin difference between closed loop phase f0dB degrees. equations below relate compensation network's poles, zeros gain components (R1, Figure these guidelines locating poles zeros compensation network: Pick Gain (R2/R1) desired converter bandwidth Place Zero Below Filter's Double Pole (~75% FLC) Place Zero Filter's Double Pole Place Pole Zero Place Pole Half Switching Frequency Check Gain against Error Amplifier's Open-Loop Gain Estimate Phase Margin Repeat Necessary
FREQUENCY (Hz)
FIGURE ASYMPTOTIC BODE PLOT CONVERTER GAIN
Component Selection Guidelines
Output Capacitor Selection
output capacitor required filter output supply load transient current. filtering requirements function switching frequency ripple current. load transient requirements function slew rate (di/dt) magnitude transient load current. These requirements generally with capacitors careful layout. Modern microprocessors produce transient load rates above 1A/ns. High frequency capacitors initially supply transient
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HIP6015
slow current load rate seen bulk capacitors. bulk filter capacitor values generally determined (effective series resistance) voltage rating requirements rather than actual capacitance requirements. High frequency decoupling capacitors should placed close power pins load physically possible. careful inductance circuit board wiring that could cancel usefulness these inductance components. Consult with manufacturer load specific decoupling requirements. example, Intel recommends that high frequency decoupling Pentium composed least forty (40) ceramic capacitors 1206 surface-mount package. only specialized low-ESR capacitors intended switching-regulator applications bulk capacitors. bulk capacitor's will determine output ripple voltage initial voltage drop after high slew-rate transient. aluminum electrolytic capacitor's value related case size with lower available larger case sizes. However, equivalent series inductance (ESL) these capacitors increases with case size reduce usefulness capacitor high slew-rate transient loading. Unfortunately, specified parameter. Work with your capacitor supplier measure capacitor's impedance with frequency select suitable component. most cases, multiple electrolytic capacitors small case size perform better than single large case capacitor. response time transient different application load removal load. following equations give approximate response time interval application removal transient load:
TRAN RISE TRAN FALL
where: ITRAN transient load current step, tRISE response time application load, tFALL response time removal load. With input source, worst case response time either application removal load dependent upon DACOUT setting. sure check both these equations minimum maximum output levels worst case response time. With +12V input, output voltage level equal DACOUT, tFALL longest response time.
Input Capacitor Selection
input bypass capacitors control voltage overshoot across MOSFETs. small ceramic capacitors high frequency decoupling bulk capacitors supply current needed each time turns Place small ceramic capacitors physically close MOSFETs between drain anode Schottky diode important parameters bulk input capacitor voltage rating current rating. reliable operation, select bulk capacitor with voltage current ratings above maximum input voltage largest current required circuit. capacitor voltage rating should least 1.25 times greater than maximum input voltage voltage rating times conservative guideline. current rating requirement input capacitor buck regulator approximately load current. through hole design, several electrolytic capacitors (Panasonic series Nichicon series Sanyo MVGX equivalent) needed. surface mount designs, solid tantalum capacitors used, caution must exercised with regard capacitor surge current rating. These capacitors must capable handling surgecurrent power-up. series available from AVX, 593D series from Sprague both surge current tested.
Output Inductor Selection
output inductor selected meet output voltage ripple requirements minimize converter's response time load transient. inductor value determines converter's ripple current ripple voltage function ripple current. ripple voltage current approximated following equations:
Increasing value inductance reduces ripple current voltage. However, large inductance values reduce converter's response time load transient. parameters limiting converter's response load transient time required change inductor current. Given sufficiently fast control loop design, HIP6015 will provide either 100% duty cycle response load transient. response time time required slew inductor current from initial current value transient current level. During this interval difference between inductor current transient current level must supplied output capacitor. Minimizing response time minimize output capacitance required.
MOSFET Selection/Considerations
HIP6015 requires N-Channel power MOSFET. should selected based upon rDS(ON) gate supply requirements, thermal management requirements. high-current applications, MOSFET power dissipation, package selection heatsink dominant design factors. power dissipation includes loss components; conduction loss switching loss. conduction losses largest component power dissipation MOSFET.
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HIP6015
Switching losses also contribute overall MOSFET power loss (see equations below). These equations assume linear voltage-current transitions approximations. gate-charge losses dissipated HIP6015 heat MOSFET. However, large gatecharge increases switching interval, tSW, which increases upper MOSFET switching losses. Ensure that MOSFET within maximum junction temperature high ambient temperature calculating temperature rise according package thermal-resistance specifications. separate heatsink necessary depending upon MOSFET power, package type, ambient temperature flow.
PCOND rDS(ON) Where: duty cycle VOUT switching interval, switching frequency.
+12V DBOOT BOOT CBOOT UGATE PHASE VG-S
HIP6015
FIGURE UPPER GATE DRIVE BOOTSTRAP OPTION
Standard-gate MOSFETs normally recommended with HIP6015. However, logic-level gate MOSFETs used under special circumstances. input voltage, upper gate drive level, MOSFET's absolute gateto-source voltage rating determine whether logic-level MOSFETs appropriate. Figure shows upper gate drive (BOOT pin) supplied bootstrap circuit from boot capacitor, CBOOT, develops floating supply voltage referenced PHASE pin. This supply refreshed each cycle voltage less boot diode drop (VD) when schottky diode, conducts. Logic-level MOSFETs only used MOSFET's absolute gate-to-source voltage rating exceeds maximum voltage applied Figure shows upper gate drive supplied direct connection This option should only used converter systems where main input voltage +5VDC less. peak upper gate-to-source voltage approximately less input supply. main power +12VDC bias, gate-to-source voltage logiclevel MOSFET good choice under these conditions.
+12V
LESS
HIP6015
BOOT
UGATE PHASE
NOTE: VG-S
FIGURE UPPER GATE DRIVE DIRECT DRIVE OPTION
Schottky Selection
Rectifier conducts when upper MOSFET off. diode should Schottky type power losses. power dissipation Schottky rectifier approximated PCOND Where: duty cycle VOUT Schottky forward voltage drop addition power dissipation, package selection heatsink requirements main design tradeoffs choosing schottky rectifier. Since three factors interrelated, selection process iterative procedure. maximum junction temperature rectifier must remain below manufacturer's specified value, typically 125oC. using package thermal resistance specification schottky power dissipation equation (shown above), junction temperature rectifier estimated. sure available airflow ambient temperature determine junction temperature rise.
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HIP6015 HIP6015 DC-DC Converter Application Circuit
Figure shows application circuit DC-DC Converter Intel Pentium microprocessor. Detailed information circuit, including complete Bill-ofMaterials circuit board description, found application note AN9706. Although Application Note details HIP6005, same evaluation platform used evaluate HIP6015. Intersil AnswerFAX (407-7247800) doc. #99706.
+12V
1000µF +12V
2N6394
0.1µF 0.1µF VSEN VID0 VID1 VID2 VID3 VID4
1000pF
OCSET PGOOD BOOT 0.1µF 1.1K
MONITOR PROTECTION
UGATE PHASE
HIP6015
COMP
1000µF
2.2nF 8.2nF 0.082µF
Component Selection Notes: Each 1000µF 6.3WVDC, Sanyo MV-GX Equivalent Each 330µF 25WVDC, Sanyo MV-GX Equivalent Core: Micrometals T60-52; Each Winding: Turns 17AWG Core: Micrometals T50-52; Winding: Turns 18AWG 1N4148 Equivalent 25A, Schottky, Motorola MBR2535CTL Equivalent Intersil MOSFET; RFP70N03
FIGURE PENTIUM DC-DC CONVERTER
Intersil semiconductor products manufactured, assembled tested under ISO9000 quality systems certification.
Intersil semiconductor products sold description only. Intersil Corporation reserves right make changes circuit design and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
information regarding Intersil Corporation products, site http://www.intersil.com
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4421.1 Buck Pulse-Width Modulator (PWM) Controller Output Voltage

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