CMOS -Bit D-Type Registers Pinout CD4076BMS VIEW CLOCK
|
|
|
Top Searches for this datasheet
CD4076BMS
CMOS -Bit D-Type Registers
Pinout
CD4076BMS VIEW
CLOCK RESET DATA DATA DATA DATA DATA INPUT DISABLE
Features
High Voltage Type (20V Rating) Three State Outputs Input Disabled Without Gating Clock Gated Output Control Lines Enabling Disabling Outputs Standardized Symmetrical Output Characteristics 100% Tested Quiescent Current Maximum Input Current Over Full Package Temperature Range; 100nA +25oC Noise Margin (Over Full Package/Temperature Range) 2.5V Parametric Ratings Meets Requirements JEDEC Tentative Standard 13B, "Standard Specifications Description Series CMOS Devices"
OUTPUT DISABLE
Functional Diagram
DATA INPUT DISABLE TYPE FLIP-FLOPS WITH AND-OR LOGIC CLOCK OUTPUT DISABLE
Description
CD4076BMS types four-bit registers consisting D-type flip-flops that feature three-state outputs. Data Disable inputs provided control entry data into flip-flops. When both Data Disable inputs low, data inputs loaded into their respective flip-flops next positive transition clock input. Output Disable inputs also provided. When Output Disable inputs both low, normal logic states four outputs available load. outputs disabled independently clock high logic level either Output Disable input, present high impedance. CD4076BMS supplied these lead outline packages: Braze Seal Frit Seal Ceramic Flatpack
RESET
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. http://www.intersil.com 407-727-9207 Copyright Intersil Corporation 1999
File Number
3325
7-1029
Specifications CD4076BMS
Absolute Maximum Ratings
Supply Voltage Range, (VDD) -0.5V +20V (Voltage Referenced Terminals) Input Voltage Range, Inputs .-0.5V +0.5V Input Current, Input .±10mA Operating Temperature Range -55oC +125oC Package Types Storage Temperature Range (TSTG) -65oC +150oC Lead Temperature (During Soldering) +265oC Distance 1/16 1/32 Inch (1.59mm 0.79mm) from case Maximum
Reliability Information
Thermal Resistance Ceramic FRIT Package 80oC/W 20oC/W Flatpack Package 70oC/W 20oC/W Maximum Package Power Dissipation (PD) +125 -55oC +100oC (Package Type 500mW +100oC +125oC (Package Type Derate Linearity 12mW/oC 200mW Device Dissipation Output Transistor 100mW Full Package Temperature Range (All Package Types) Junction Temperature +175oC
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP SUBGROUP 18V, Input Leakage Current Input Leakage Current Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) Threshold Voltage Threshold Voltage Functional VOL15 VOH15 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH 15V, Load 15V, Load (Note VOUT 0.4V 10V, VOUT 0.5V 15V, VOUT 1.5V VOUT 4.6V VOUT 2.5V 10V, VOUT 9.5V 15V, VOUT 13.5V 10V, -10µA 10µA 2.8V, 20V, 18V, Input Voltage (Note Input Voltage High (Note Input Voltage (Note Input Voltage High (Note Tri-State Output Leakage IOZL 4.5V, 0.5V 4.5V, 0.5V 15V, 13.5V, 1.5V 15V, 13.5V, 1.5V VOUT LIMITS TEMPERATURE +25oC +125oC +25oC +125oC -55oC +25oC +125oC -55oC +25oC, +125oC, 55oC +25oC, +125oC, 55oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC, +125oC, 55oC -0.4 -0.4
PARAMETER Supply Current
SYMBOL
CONDITIONS (NOTE 20V,
-100 -1000 -100 14.95 0.53 -2.8 VDD/2
1000 1000 -0.53 -1.8 -1.4 -3.5 -0.7 VDD/2
UNIT
+25oC, +125oC, 55oC +25oC, +125oC, 55oC +25oC, +125oC, 55oC +25oC +125oC -55oC
7-1030
Specifications CD4076BMS
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP SUBGROUP NOTES: voltages referenced device GND, 100% testing being implemented. Go/No test with limits applied inputs. LIMITS TEMPERATURE +25oC +125oC -55oC UNIT
PARAMETER Tri-State Output Leakage
SYMBOL IOZH
CONDITIONS (NOTE VOUT
accuracy, voltage measured differentially VDD. Limit 0.050V max.
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP SUBGROUPS TEMPERATURE +25oC +125oC, -55oC LIMITS UNITS
PARAMETER Propagation Delay Clock Output Transition Time
SYMBOL TPHL TPLH TTHL TTLH
CONDITIONS (Notes
+25oC +125oC, -55oC
NOTES: 50pF, 200K, Input 20ns. -55oC +125oC limits guaranteed, 100% testing being implemented. TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL CONDITIONS NOTES TEMPERATURE -55oC, +25oC +125oC 10V, +125oC 15V, -55oC, +25oC +125oC Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) IOL5 Load 10V, Load Load 10V, Load VOUT 0.4V +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +125oC -55oC Output Current (Sink) IOL10 10V, VOUT 0.5V +125oC -55oC Output Current (Sink) IOL15 15V, VOUT 1.5V +125oC -55oC Output Current (Source) IOH5A VOUT 4.6V +125oC -55oC Output Current (Source) IOH5B VOUT 2.5V +125oC -55oC Output Current (Source) IOH10 10V, VOUT 9.5V +125oC -55oC 4.95 9.95 0.36 0.64 -0.36 -0.64 -1.15 -2.0 -0.9 -2.6
UNITS
7-1031
Specifications CD4076BMS
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Output Current (Source) SYMBOL IOH15 CONDITIONS =15V, VOUT 13.5V NOTES TEMPERATURE +125oC Input Voltage Input Voltage High Propagation Delay Clock Output Propagation Delay Reset TPHL1 TPLH1 TPHL2 10V, 10V, Propagation Delay State TPHZ TPLZ Propagation Delay State TPZH TPZL Transition Time TTHL TTLH TTLH Maximum Clock Input Frequency Minimum Data Setup Time Minimum Data Hold Time Reset Pulse Width Minimum Clock Pulse Width Minimum Data Input SetUp Time Maximum Clock Input Rise Fall Time TRCL TFCL Input Capacitance Input +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC +25oC +25oC
-2.4 -4.2
UNITS
+25oC +25oC +25oC +25oC
+25oC
Transition Time
+25oC +25oC +25oC +25oC
+25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC
7-1032
Specifications CD4076BMS
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER NOTES: voltages referenced device GND. parameters listed Table controlled design process directly tested. These parameters characterized initial design release upon design changes which would affect these characteristics. 50pF, 200K, Input 20ns. 50pF, Input 20ns. more than unit cascaded, TRCL should made less than equal transition time fixed propagation delay output driving stage estimated capacitive load. TABLE POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current Threshold Voltage Threshold Voltage Delta Threshold Voltage Threshold Voltage Delta Functional SYMBOL VNTH CONDITIONS 20V, 10V, -10µA 10V, -10µA 10µA 10µA 18V, Propagation Delay Time TPHL TPLH +25oC NOTES TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC -2.8 VDD/2 -0.2 VDD/2 1.35 +25oC Limit UNITS SYMBOL CONDITIONS NOTES TEMPERATURE UNITS
NOTES: voltages referenced device GND. 50pF, 200K, Input 20ns.
Table +25oC limit. Read Record
TABLE BURN-IN LIFE TEST DELTA PARAMETERS +25OC PARAMETER Supply Current MSI-2 Output Current (Sink) Output Current (Source) SYMBOL IOL5 IOH5A 1.0µA Pre-Test Reading Pre-Test Reading DELTA LIMIT
TABLE APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) Interim Test (Post Burn-In) Interim Test (Post Burn-In) (Note Interim Test (Post Burn-In) (Note Final Test Group Group Subgroup Subgroup Group MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP SUBGROUPS Deltas Deltas Deltas Subgroups Subgroups IDD, IOL5, IOH5A READ RECORD IDD, IOL5, IOH5A IDD, IOL5, IOH5A IDD, IOL5, IOH5A
NOTE: Parameteric, Functional; Cumulative Static
7-1033
Specifications CD4076BMS
TABLE TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD POST-IRRAD Table READ RECORD PRE-IRRAD POST-IRRAD Table
CONFORMANCE GROUPS Group Subgroup
TABLE BURN-IN IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In Note Static Burn-In Note Dynamic Burn-In Note Irradiation (Note NOTE: Each except will have series resistor 0.5V Each except will have series resistor Group Subgroup sample size dice/wafer, failures, 0.5V OPEN GROUND -0.5V 50kHz 25kHz
OUTPUT DISABLE
DATA DATA INPUT DISABLE
DATA
CLOCK
DATA
INPUTS PROTECTED
CMOS PROTECTION NETWORK DATA
RESET
FIGURE CD4076BMS LOGIC DIAGRAM
7-1034
CD4076BMS
TRUTH TABLE DATA INPUT DISABLE RESET High Level Level CLOCK DATA Don't Care Change NEXT STATE OUTPUT
When either Output Disable high, outputs disabled (high impedance state), however sequential operation flip-flops affected.
Typical Performance Characteristics
OUTPUT (SINK) CURRENT (IOL) (mA) OUTPUT (SINK) CURRENT (IOL) (mA) AMBIENT TEMPERATURE (TA) +25oC AMBIENT TEMPERATURE (TA) +25oC
GATE-TO-SOURCE VOLTAGE (VGS)
15.0 GATE-TO-SOURCE VOLTAGE (VGS) 12.5 10.0
DRAIN-TO-SOURCE VOLTAGE (VDS)
DRAIN-TO-SOURCE VOLTAGE (VDS)
FIGURE TYPICAL OUTPUT (SINK) CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) AMBIENT TEMPERATURE (TA) +25oC GATE-TO-SOURCE VOLTAGE (VGS)
FIGURE MINIMUM OUTPUT (SINK) CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) AMBIENT TEMPERATURE (TA) +25oC GATE-TO-SOURCE VOLTAGE (VGS)
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
-10V
-10V
-15V
-15V
FIGURE TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
FIGURE MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
7-1035
CD4076BMS Typical Performance Characteristics (Continued)
PROPAGATION DELAY TIME (tPHL, tPLH) (ns) AMBIENT TEMPERATURE (TA) +25oC TRANSITION TIME (tTHL, tTLH) (ns) AMBIENT TEMPERATURE (TA) +25oC
SUPPLY VOLTAGE (VDD)
SUPPLY VOLTAGE (VDD)
LOAD CAPACITANCE (CL) (pF)
LOAD CAPACITANCE (CL) (pF)
FIGURE TYPICAL PROPAGATION DELAY TIME LOAD CAPACITANCE (CLOCK
AMBIENT TEMPERATURE (TA) +25oC LOAD CAPACITANCE (CL) 50pF MAXIMUM CLOCK FREQUENCY (fCL MAX) (MHz)
FIGURE TYPICAL TRANSITION TIME LOAD CAPACITANCE
POWER DISSIPATION GATE (PD) (µW)
AMBIENT TEMPERATURE (TA) +25oC SUPPLY VOLTAGE (VDD)
50pF 15pF
SUPPLY VOLTAGE (VDD) 10-1 INPUT FREQUENCY (kHz)
FIGURE TYPICAL MAXIMUM CLOCK INPUT FREQUENCY SUPPLY VOLTAGE
FIGURE TYPICAL DYNAMIC POWER DISSIPATION FREQUENCY
CLOCK
DATA INPUT DIABLE RESET
tTHL OUTPUT tPHL tPLH
tTLH
tPHL
FIGURE FUNCTIONAL WAVEFORM
7-1036
CD4076BMS
OUTPUT DISABLE tPLZ tPZL tPHZ tPZH
TEST CHARACTER tPHZ tPLZ tPZL tPZH
VOLTAGE
OUTPUT OUTPUT
FIGURE FUNCTIONAL WAVEFORM
Chip Dimensions Layout
Dimensions parentheses millimeters derived from basic inch dimensions indicated. Grid graduations mils (10-3 inch)
METALLIZATION: PASSIVATION:
Thickness:
Silane
BOND PADS: 0.004 inches 0.004 inches THICKNESS: 0.0198 inches 0.0218 inches
Intersil semiconductor products manufactured, assembled tested under ISO9000 quality systems certification.
Intersil products sold description only. Intersil Corporation reserves right make changes circuit design and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
information regarding Intersil Corporation products, site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation 883, Mail Stop 53-204 Melbourne, 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil Mercure Center 100, Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, Hsing North Road Taipei, Taiwan Republic China TEL: (886) 2716 9310 FAX: (886) 2715 3029
1037
Other recent searches
XF2K - XF2K XF2K Datasheet
TL071 - TL071 TL071 Datasheet
TL071A - TL071A TL071A Datasheet
TL071B - TL071B TL071B Datasheet
SJ-1520 - SJ-1520 SJ-1520 Datasheet
MR2400F - MR2400F MR2400F Datasheet
HMC187MS8 - HMC187MS8 HMC187MS8 Datasheet
CDLE-033-809 - CDLE-033-809 CDLE-033-809 Datasheet
AF4953P - AF4953P AF4953P Datasheet
2SK1188 - 2SK1188 2SK1188 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
