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12A, 100V, 0.200 Ohm, N-Channel Logic Level Power MOSFET 2N6902 N


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2N6902
12A, 100V, 0.200 Ohm, N-Channel Logic Level Power MOSFET
2N6902 N-Channel enhancement mode silicon gate power field effect transistor specifically designed with logic level (5V) driving sources applications such programmable controllers, automotive switching, solenoid drivers. This performance accomplished through special gate oxide design which provides full rated conduction gate biases range, therefore facilitating true on-off power control directly from logic circuit supply voltages.
September 1997
Features
12A, 100V rDS(ON) 0.200 Design Optimized Gate Drive Driven Directly from QMOS, NMOS, Circuits Compatible with Automotive Drive Requirements Power Dissipation Limited Nanosecond Switching Speeds Linear Transfer Characteristics High Input Impedance Majority Carrier Device
Symbol
Ordering Information
PART NUMBER 2N6902 PACKAGE TO-204AA BRAND
2N6902
NOTE: When ordering, include entire part number.
Packaging
JEDEC TO-204AA
DRAIN (FLANGE)
SOURCE (PIN GATE (PIN
CAUTION: These devices sensitive electrostatic discharge. Users should follow proper Handling Procedures. Copyright
Harris Corporation 1997
File Number
1878.2
2N6902
Absolute Maximum Ratings
25oC, Unless Otherwise Specified 2N6902 UNITS W/oC
Drain Source Voltage VDSS Drain Gate Voltage (RGS VDGR Continuous Drain Current Pulsed Drain Current Gate Source Voltage. Maximum Power Dissipation. Above 25oC, Derate Linearly Operating Storage Junction Temperature Range TSTG Maximum Lead Temperature Soldering. Distance 1/8in (3.17mm) from Seating Plane
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
Electrical Specifications
25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS IGSS VDS(ON) rDS(ON) CISS COSS CRSS td(ON) td(OFF) TEST CONDITIONS 1mA, VDS, 25oC 125oC ±10V, 7.6A, 12A, 7.6A, 25oC 125oC 7.6A 0.1MHz 7.6A, RGEN ±100 1.52 0.200 0.320 1.67 UNITS oC/W
PARAMETER Drain Source Breakdown Voltage Gate Source Threshold Voltage Zero Gate Voltage Drain Current Gate Source Leakage Current Drain Source Voltage (Note Drain Source Resistance (Note Forward Transconductance (Note Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Thermal Resistance Junction Case
Source Drain Diode Specifications
PARAMETER Source Drain Diode Voltage (Note Reverse Recovery Time NOTE: SYMBOL TEST CONDITIONS dISD/dt 100A/µs UNITS
Pulsed: pulse duration 300µs max, duty cycle
Typical Performance Curves
POWER DISSIPATION MULTIPLIER
Unless Otherwise Specified
RATED DRAIN CURRENT 10µs 100µs 1.0ms 10ms 100ms
OPERATION THIS AREA LIMITED rDS(ON)
CASE TEMPERATURE (oC) VDSS 100V VDS, DRAIN SOURCE VOLTAGE 1000
FIGURE NORMALIZED POWER DISSIPATION CASE TEMPERATURE
FIGURE FORWARD BIAS SAFE OPERATING AREA
2N6902 Typical Performance Curves
ID(ON), ON-STATE DRAIN CURRENT PULSE DURATION 80µs DUTY CYCLE rDS(ON), DRAIN SOURCE RESISTANCE() -40oC 25oC 125oC
Unless Otherwise Specified (Continued)
125oC
25oC -40oC
PULSE DURATION 80µs DUTY CYCLE DRAIN CURRENT
125oC
-40oC VGS, GATE SOURCE VOLTAGE
FIGURE TRANSFER CHARACTERISTICS
FIGURE DRAIN SOURCE RESISTANCE DRAIN CURRENT
NORMALIZED GATE THRESHOLD VOLTAGE
NORMALIZED DRAIN SOURCE RESISTANCE 7.6A
JUNCTION TEMPERATURE (oC)
JUNCTION TEMPERATURE (oC)
FIGURE NORMALIZED DRAIN SOURCE RESISTANCE JUNCTION TEMPERATURE
FIGURE NORMALIZED GATE THRESHOLD VOLTAGE JUNCTION TEMPERATURE
1MHz gfs, TRANSCONDUCTANCE
-40oC
25oC 125oC
CAPACITANCE (pF)
CISS
COSS CRSS
PULSE DURATION 80µs DUTY CYCLE DRAIN CURRENT
VDS, DRAIN SOURCE VOLTAGE
FIGURE CAPACITANCE DRAIN SOURCE VOLTAGE
FIGURE TRANSCONDUCTANCE DRAIN CURRENT
2N6902 Test Circuits Waveforms
td(ON)
tOFF td(OFF)
RGEN
PULSE WIDTH
FIGURE SWITCHING TIME TEST CIRCUIT
FIGURE RESISTIVE SWITCHING WAVEFORMS
TO-204AA
JEDEC TO-204AA HERMETIC STEEL PACKAGE
SEATING PLANE
INCHES
TERM.
MILLIMETERS 7.88 1.53 0.97 3.51 8.38 1.65 1.06 3.68 20.32 5.46 10.92 10.93 3.94 4.06 NOTES
SYMBOL
0.310 0.060 0.038 0.138
0.330 0.065 0.042 0.145 0.800
0.215 0.430 0.430 0.155 0.160
1.187 0.495 0.131 0.655 0.525 0.185 0.675
30.15 12.58 3.33 16.64 13.33 4.69 17.14
NOTES: These dimensions within allowable dimensions Rev. JEDEC TO-204AA outline dated 11-82. Lead dimension (without solder). typically 0.002 inches (0.05mm) solder coating. Position lead measured 0.250 inches (6.35mm) from bottom seating plane. Controlling dimension: Inch. Revision dated 6-93.
Harris Semiconductor products manufactured, assembled tested under ISO9000 quality systems certification.
Harris Semiconductor products sold description only. Harris Semiconductor reserves right make changes circuit design and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Harris believed accurate reliable. However, responsibility assumed Harris subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Harris subsidiaries.

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