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Operation of the HC5503C, HC5503T Family of SLICs Evaluation Board HC5503XEVAL1
Author: Don LaFontaine
Operation of the HC5503C, HC5503T Family of SLICs Evaluation Board (HC5503XEVAL1)
Application Note November 1998 AN9813.1
Author: Don LaFontaine
Features
· One Evaluation Board for Performance Testing of the HC5503C, HC5503J and HC5503T Family of SLICs · Includes On-Board Op Amp and Cross Point Switch for Evaluation of "Junctor" Applications · Monitoring of Switch Hook Detect (SHD) via On Board LED · Automatic On / Off Controller for Cross Point Switch Connection
designated GND. It is recommended that the analog, digital and battery grounds of the SLIC be tied together as close to the device pins as possible. The three external power supplies should each be grounded to the evaluation board.
Getting Started
Verify that the sample is oriented in its socket correctly. Correct orientation is with pin 1 pointing towards the onboard pin 1 designator located in the upper left hand corner of the sockets. (Reference the data sheet for location of device pin 1.)
Functional Description
Evaluation Board
Verifying Basic SLIC Operation
The operation of the sample parts can be verified by performing 4 tests: 1. Power Supply Current Verification. 2. Normal Loop Feed Verification. 3. Tip and Ring Voltage Verification. 4. Gain Verification (4-wire to 2-wire). The above 4 tests require the following equipment: a 600 load, a sine wave generator, an AC volt meter and two external supplies (VBAT, VCC). Application Tip: When terminating tip and ring, it is handy to assemble terminators using a Pomona MDP dual banana plug connector as the terminating resistor receptacle. Refer to Figure 1 for details.
HC5503C
The HC5503C is a low cost Subscriber Line Interface Circuit (SLIC), that replaces the components of an unbalanced discrete Analog circuit design.
HC5503J
The HC5503J is a low cost Subscriber Line Interface Circuit (SLIC), that replaces discrete or thick film hybrid "Junctor" unbalanced design solutions 1.
FIGURE 1. TERMINATION ADAPTER
HC5503T
The HC5503T is a low cost Subscriber Line Interface Circuit (SLIC), that replaces the components of a discrete Transformer Analog circuit design.
Power Requirements for the HC5503C / J / T
Power Supply Connections
Using the termination shown in Figure 1 provides an unobtrusive technique for terminating tip and ring while still providing access to both signals using the banana jack feature of the MDP connector. Posts are also available that fit into holes A and B, providing a solderable connection for the terminating resistor.
Test #1 Power Supply Current Verification
A quick check of evaluation board and the sample is to measure the supply currents. The readings should be similar to the values listed in Table 1. The measurements can be made using a series ammeter on each supply, or power supplies with current displays.
Ground Connections
The HC5503C / J / T evaluation board has tied the analog, digital and battery grounds to a common ground plane
Discussion
The currents measured include those of the SLIC and supporting circuitry (i.e., 2nd HC5503X SLIC, Op Amp,
Application Note 9813
Setup
1. Connect the power supplies to the Evaluation board. 2. Set VBAT to -48V, VCC to +5V and Ground the VEE pin (VEE supply not required for this test). 3. Set the DPDT switch (S1) to standard operation. This connects the Transmit and Receive outputs to banana jacks TX and RX. 4. Terminate tip and ring Channel A with a 600 load (Channel B is disconnected during standard operation). 5. Measure the supply currents and compare to those in Table 1.
Test #4 Gain Verification (4-Wire to 2-Wire)
This test will verify the SLIC is operating properly and that the 4-wire to 2-wire gain is 1.0 or 0.0dB.
Discussion
When terminated with 600 load, the SLIC will exhibit unity gain from the RX input pin to across tip and ring (VTR). When an open circuit exists, a mismatch occurs and the tip to ring voltage doubles. The dB gain is calculated in Equation 1.
Setup
1. Connect the power supplies to the Evaluation board. 2. Set VBAT to -48V, VCC to +5V and Ground the VEE pin (VEE supply not required for this test). 3. Set the DPDT switch (S1) to standard operation. This connects the Transmit and Receive outputs to banana jacks TX and RX. 4. Terminate tip and ring Channel A with a 600 load (Channel B is disconnected during standard operation). 5. Connect a sine wave generator, referenced to ground, to the RX input. 6. Set the generator for 1VRMS at 1kHz. 7. Connect an AC voltmeter across tip and ring.
Test #2 Normal Loop Feed Verification
This test verifies loop current operation and loop current detection via the onboard LED.
Discussion
When power is applied to the SLIC a loop current will flow from tip to ring through the 600 load. Loop current detection occurs when this loop current triggers an internal detector that pulls the output of SHD low, illuminating the LED through the +5V supply.
Setup
1. Connect the power supplies to the Evaluation board. 2. Set VBAT to -48V, VCC to +5V and Ground the VEE pin (VEE supply not required for this test). 3. Set the DPDT switch (S1) to standard operation. This connects the Transmit and Receive outputs to banana jacks TX and RX. 4. Terminate tip and ring Channel A with a 600 load (Channel B is disconnected during standard operation).
Verification
1. Tip to ring AC voltage of 1VRMS when terminated. 2. Tip to ring AC voltage of 2VRMS when not terminated.
Verifying Junctor Operation
The operation of the Junctor application circuit using the 2 HC5503X samples provided can be verified by performing 4 tests: 1. Channel to Channel Transhybrid Balance. 2. Inter-Channel Transhybrid Balance. 3. Channel to Channel Gain. 4. Intra-Channel Transhybrid Balance with different loads. The above 4 tests require the following equipment: Two 600 loads, a sine wave generator, an AC volt meter and three external supplies (VBAT, VCC , VEE).
Verification:
1. The SHD LED is on when tip and ring are terminated with 600. 2. The SHD LED is off when tip and ring are an open circuit.
Test #3 Tip and Ring Voltage Verification
This test verifies the tip and ring voltages.
Setup
1. Connect the power supplies to the Evaluation board. 2. Set VBAT to -48V, VCC to +5V and Ground the VEE pin (VEE supply not required for this test). 3. Set the DPDT switch (S1) to standard operation. This connects the Transmit and Receive outputs to banana jacks TX and RX.
Definition of Junctor Circuit
The function of the Junctor application circuit is to convert a two port network with a Transmit Output (TX) and a Receive Input (RX) into a one-port network. The conversion to a oneport network now makes it easy to connect phone lines in a small PBX or Key System through a single Cross Point. This
Application Note 9813
conversion is accomplished by the connection of a Differential Amplifier and a Summing Amplifier. The Differential Amplifier and Summing Amplifier are used to cancel the return signal and prevent echo (reference Figure 6). In this one-port network, echo can occur in two ways: Channel to Channel and Intra-Channel. Reference Figure 5 for signal path for both channel-to-channel and intra-channel signals. cancellation of echo, within a channel. In other words, IntraChannel Transhybrid Balance is when the transmit signal from Channel A is feed back into the input of Channel A. Intra-Channel Transhybrid Balance is performed by the Differential Amplifier (the output of this amplifier is DIFF A and DIFF B in Figure 6). Calculation of resistor value (R4) for optimum Intra-Channel Transhybrid Balance is discussed in Test #8.
Test #5 Channel to Channel Transhybrid
Definition
The removal of the receive signal from the transmit signal, to prevent an echo on the transmit side is defined as Channel to Channel Transhybrid Balance. In other words, Channel to Channel Transhybrid signals occur when the receive signal (from Channel B) is retransmitted along with the transmit signal of Channel A back to Channel B. Channel to Channel Transhybrid Balance is performed by the Summing Amplifier (the output of this amplifier is SUM A and SUM B in Figure 6).
Setup
1. Connect the power supplies to the Evaluation board. 2. Set VBAT to -48V, VCC to +5V and VEE to -5V. 3. Set the DPDT switch (S1) to Junctor operation. This connects the Onboard Op Amp, Cross Point Switch and the second HC5503X SLIC to the Transmit and Receive outputs of Channel A. 4. Terminate tip and ring of both Channel A and Channel B with a 600 load. 5. Connect a sine wave generator in parallel with the 600 load across tip and ring of Channel A. The output of this generator needs to be floating. 6. Set the generator for 1VRMS and 1kHz. 7. Connect an AC volt meter between test point SUM A and ground. This will measure the AC voltage at the input to the Differential Amplifier (SUM A). 8. Connect an AC volt meter between test point DIFF A and ground. This will measure the AC voltage at the output of the Differential Amplifier (DIFF A). 9. The Inter-Channel Transhybrid Balance is calculated using the following formula in Equation 3.
Setup
1. Connect the power supplies to the Evaluation board. 2. Set VBAT to -48V, VCC to +5V and VEE to -5V. 3. Set the DPDT switch (S1) to Junctor operation. This connects the Onboard Op Amp, Cross Point Switch and the second HC5503X SLIC to the Transmit and Receive outputs of Channel A. 4. Terminate tip and ring of both Channel A and Channel B with a 600 load. 5. Connect a sine wave generator in parallel with the 600 load across tip and ring of Channel A. The output of this generator needs to be floating. 6. Set the generator for 1VRMS at 1kHz. 7. Connect an AC volt meter between test point DIFF B and ground. This will measure the AC voltage at the output to the Differential Amplifier (DIFF B). 8. Connect an AC volt meter between test point SUM B and ground. This will measure the AC voltage at the output of the Summing Amplifier (SUM B). 9. The Channel to Channel Transhybrid Balance is calculated using the following formula in Equation 2.
10. To measure Inter-Channel Transhybrid Balance on Channel B, connect the sine wave generator in parallel with the 600 load across tip and ring of Channel B and repeating steps 7 through 9 in a similar fashion. Voltage measurements taken at SUM B and DIFF B. Results for both Channels should be the same. 11. Compare results to that listed in Table 3.
TABLE 3. SUM TYP (VRMS) DIFF TYP (VRMS) TRANSHYBRID BALANCE (dB)
TEST Channel to Channel Transhybrid Balance Channel A to B Channel B to A Intra-Channel Transhybrid Balance Channel A Channel B
10. To measure Channel to Channel Transhybrid Balance on Channel A, connect the sine wave generator in parallel with the 600 load across tip and ring of Channel B and repeating steps 7 through 9 in a similar fashion. Voltage measurements taken at DIFF A and SUM A. Results for both Channels should be the same. 11. Compare results to that listed in Table 3.
18.45m 20.79m
64.9m 67.0m
Test #6 Intra-Channel Transhybrid
Definition
Intra-Channel Transhybrid Balance is defined as the removal of the transmit signal from the receive signal, and thereby
Test #7 Channel A to Channel B Gain
This demo board is configured to have a Channel to Channel gain of 1 or 0dB. This test will illustrate a procedure for calculating the proper R4 resistor value to achieve a Channel
Application Note 9813
to Channel gain of 1 with any Cross Point or network used to connect the two line cards. Also included is an easy procedure to verify the calculations. Equation 8 can be used for the calculation of R14 to achieve a Channel A to Channel B Gain of one. A similar analysis for the calculation of R4 to achieve a Channel B to Channel A gain of one is given in Equation 9.
Discussion
Channel to Channel gain is dependent upon: the 2-wire to 4-wire and the 4-wire to 2-wire gains of the HC5503X being one, the gain setting resistors of the differential amplifier (R4 , R5 , R14 , and R15), the resistance of the Cross Point Switch (Rx) and resistors R6 and R16 (Reference Figure 5). The resistance values of R6 and R16 are generally set to 604 for impedance matching to a transformer line card. If impedance matching to a 600 transformer is not a design requirement, then the values of R6 and R16 are not critical and can be set to match various impedances. It is important however, that R6 equal R16 . Figure 2 is a simplified version of the Junctor circuit and shows the critical components required to calculate the optimum R14 value to obtain a Channel A to Channel B gain of one. Because the 2-wire to 4-wire gain of the HC5503X is one, the voltage appearing at V1 is the tip to ring voltage of Channel A (Summing amplifier configured for a gain of one). The tip to ring voltage of Channel B is equal to the voltage at VO, because the 4-wire to 2-wire gain of the HC5503X is also one. Writing an equation for VO in terms of V1 will enable the gain to be set to one and the corresponding resistor values determined. Equation 4 can be used to determine the output voltage of the differential amplifier, and therefore the tip to ring voltage of Channel B, in terms of the voltage at V2.
CHANNEL A R1 10k R2 10k 5V R6 600 X POINT 50 R10 100 R16 600
R5 10k R6 600 JUNC A
V1 NETWORK
RX R10
V2 DIFFERENTIAL AMPLIFIER VO 5V +
CHANNEL B R11 10k
-5V R12 10k 5V R14 12.7k R15 10k R16 600 JUNC B V2 TRANSMIT OUTPUT OF CHANNEL B IS ZERO
The voltage at V2, with respect to V1, is:
FIGURE 2. CHANNEL TO CHANNEL TRANSHYBRID BALANCE
Verification
The following procedure can be used to verify the above calculations.
Dividing both sides by V1 yields an equation for Channel A to Channel B gain.
Setup
1. Connect the power supplies to the Evaluation board. 2. Set VBAT to -48V, VCC to +5V and VEE to -5V. 3. Set the DPDT switch (S1) to Junctor operation. This connects the Onboard Op Amp, Cross Point Switch and the second HC5503X SLIC to the Transmit and Receive outputs of Channel A. 4. Terminate tip and ring of both Channel A and Channel B with a 600 load.
Application Note 9813
5. Connect a sine wave generator in parallel with the 600 load across tip and ring of Channel A. The output of this generator needs to be floating. 6. Set the generator for 1VRMS and 1kHz. 7. Measure the AC voltage across tip and ring (VTR) of both Channels A and B. 8. The Channel A to Channel B Gain is calculated using the following formula in Equation 10.
9. To measure Channel B to Channel A Gain connect the sine wave generator in parallel with the 600 load across tip and ring of Channel B and repeating steps 7 and 8 in a similar fashion. Results for both Channels should be about the same. 10. Compare results to that listed in Table 4.
TABLE 4. TIP TO RING TIP TO RING CHANNEL A CHANNEL B GAIN (VRMS) (VRMS) (dB) 1.0074 1.0035 1.0063 1.0068 -0.01 -0.03
Equation 13 can be used for the calculation of R4 to achieve a good Intra-Channel Transhybrid Balance in Channel A. A similar analysis for Channel B is given in Equation 14.
TEST Channel A to Channel B Gain Channel B to Channel A Gain
Test #8 Intra-Channel Transhybrid Balance with Different Loads
This evaluation board is configured to give the optimum Intra-Channel Transhybrid Balance for an impedance of 150 between the two Junctor inputs / outputs. This test will illustrate a procedure for calculating the proper R4 and R14 resistor values to optimize the Intra-Channel Transhybrid Balance when a different Cross Point or network is used. Also included is an easy procedure to verify the calculations.
Discussion
Intra-Channel Transhybrid Balance is performed by the Differential Amplifier (Reference Figure 3). The goal is to cancel all of the transmit signal of Channel A by the Differential Amplifier, so that none of the transmit signal is feed back into the receive terminal of channel A. The transmit signal can be cancelled by the differential amplifier by adjusting the value of resistor R4 . The value of R4 is dependent upon: the resistance value of R6 , the resistance of the network that connects the two Junctor inputs / outputs together (Cross Point + R10) and resistor R16 . Figure 3 is a simplified version of the Junctor circuit and shows the critical components required to calculate the optimum R4 value for Intra-Channel Transhybrid Balance. Equation 11 is the characteristic equation for the output voltage of the Differential Amplifier.
DIFFERENTIAL AMPLIFIER
CHANNEL A R2 10k R1 10k 5V
-5V R4 12.7k R5 10k R6 600
R12 CHANNEL B
R16 600 -5V
JUNC B
TRANSMIT OUTPUT OF CHANNEL B IS ZERO
FIGURE 3. INTRA-CHANNEL TRANSHYBRID BALANCE
Application Note 9813
Verification
The following procedure can be used to verify the above calculations.
CA324E TABLE 6. JUNCTOR CIRCUIT Intersil Quad Op Amp
Setup
R1 , R2 , R3 , Transhybrid Balance and Gain setting resistors for R11 , R12 , R13 the Summing Amplifiers. R4 , R5 , R14 , R15 Transhybrid Balance and Gain setting resistors for the Differential Amplifiers.
C8 , C17 , C25 , Compensation Capacitors to roll of the high C26 , C23 , C24 frequency gain of the Summing and Differential Amplifier. C23 and C24 prevent a DC loop. R6 , R16 R10 Provides a 600 termination looking into the Junctor input. Series resistor to bring the total resistance of the "Network" to 150. The "Network" is defined as the total resistance that connects Junctor A to Junctor B. AC decoupling capacitors for the HC5503X Transmit (TX) and Receive (RX) outputs.
C4 , C5 , C6 , C7, C21, C22
12. To measure Intra-Channel Transhybrid Balance on Channel B, connect the sine wave generator in parallel with the 600 load across tip and ring of Channel B and repeating steps 8 through 11 in a similar fashion. Voltage measurements taken at SUM B and DIFF B. Results for both Channels should be the same 13. Compare results to that listed in Table 3 section "Intra-Channel Transhybrid Balance."
TABLE 8. SUPPLY DECOUPLING CAPACITORS C2 , C 3 , C9 -C16 , C19 , C20 Supply decoupling capacitors.
Functional Circuit Component Descriptions
A brief description of each component is provided below. The components will be grouped by function to provide further insight into the operation of the HC5503C / J / T board.
TABLE 5. TWO WIRE SIDE, TIP AND RING RB1 , RB2 , RB3 , RB4 , RB5 , RB6 , RB7 , RB8 D1 , D2 , D3 , D4 , D5 , D6 , D7 , D8 Feed resistors (RB1 , RB2 , RB3 , RB4 , RB5 , RB6 , RB7 and RB8) that set the 2-wire impedance to 600. RB2 , RB4 , RB6 and RB8 are used for loop current detection. RB1 , RB3 , RB5 and RB7 are used for current limiting during a surge event. Secondary surge protection.
TABLE 9. SHD LEDs R9 , R20 , D9 , R9 and R20 are the Current limiting resistors for the D10 SHD LEDs (D9 and D10). TABLE 10. PULLUP RESISTORS R17 , R19 Pull up resistors (R17 , R19). Required for proper operation of the SLIC.
Reference
1 HC5503J - Future Product. For more information call Don LaFontaine at (407) 729-5604.
Application Note 9813 Schematic Diagram for Standard Operation
5V D11 R17 1K 6 RS TIP RB1 RB2 1 8 TIP TIP FEED R18 510 12 SHD U1 RX 19 RX C6 TX C7
HC5503X
TX 22 18 17 16 4 PIN NUMBERS GIVEN FOR 22 PIN DIP C1 S1 STANDARD OPERATION
CHANNEL A
VBAT RB4
VB(INT) / RF
2 RING
RING VBAT
T1 C1 BGND DGND AGND 5 VCC 21 C 3 3 VCC
FIGURE 4. APPLICATION SCHEMATIC FOR STANDARD OPERATION
CHANNEL A
PATH FOR CHANNEL-TO-CHANNEL TRANSHYBRID
CHANNEL B
HC5503
JUNCTOR
CROSS POINT SWITCH
JUNCTOR
HC5503
PATH FOR INTRA-CHANNEL TRANSHYBRID
FIGURE 5. INTRA-CHANNEL AND CHANNEL-TO-CHANNEL PATHS THROUGH THE SYSTEM
HC5503C / J / T Evaluation Board Parts List
Application Note 9813 Schematic Diagram for Junctor Application
5V D11 R17 1K 6 RS R18 510 12 SHD U1 TIP RB1 1 RB2 8 D2 CH A D1 VBAT D3 RB4 RB3 RING 2 RING VBAT 10 BGND DGND AGND C2 11 5 21 C1 VCC C3 3 C1 5V VCC STROBE R7 AUTOMATIC ON / OFF CONTROLLER 5V D10 R19 1K 6 RS TIP RB5 RB6 D6 CH B R20 510 12 SHD U2 1 8 TIP TIP FEED RX 19 -5V 5V D9 Q1 R8 Q2 R9 SUM B DIFF B DATA Y0 R10 VSS U4 X0 AX0 AX1 AX2 AX3 AY0 AY1 AY2 RESET -5V 9 VB(INT) / RF RX 19 C4 C24 TX 22 S1 JUNCTOR OPERATION C5 R3 5V + SUM A DIFF A
TIP TIP FEED
SLIC HC5503X
C25 R2 5V
-5V R4 C8 R5 R6 JUNC A
C15 5V -5V
CD22M3493 CROSS POINT SWITCH
C21 C23 R13
C22 C26 R12 5V -5V
SLIC HC5503X
R14 C17 R15 R16 JUNC B
D5 VBAT D7 RB8 2 RING 9 VB(INT) / RF
+ -5V C9 C10 C11
VBAT RB7
BGND DGND AGND 5
VCC 3 C18
10 C19 11 -48V
21 C20
U3 CA324E QUAD OP AMP PIN NUMBERS GIVEN FOR 22 PIN DIP
FIGURE 6. APPLICATION SCHEMATIC FOR JUNCTOR OPERATION
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