This note about conversion previously analog receiver designs into dig

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Digital Subsampling Using HI5702, HSP45116 HSP43220
This note about conversion previously analog receiver designs into digital form. includes technique subsampling that simplify digital circuits compared correspondence with analog methods. example Digital Receiver design based off-the shelf Intersil Components, included.
Discussion
often desired downconvert bandpass signal baseband representation. Bandpass signals expressed quadrature components which degrees phase. general: x(t) x1(t) cosc x2(t) sinc where x1(t) phase component, x2(t) quadrature component signal x(t) center frequency band pass signal (carrier frequency). down conversion process receiver needs effectively shift carrier frequency baseband (DC). achieve this must multiply incoming bandpass signal x(t) with complex phasor [cosc jsinc then pass filter result. This operation will accomplish desired frequency shift. x(t) [cosc jsinc 1/2[x1(t) x1(t) cos2c jx1(t) sin2c x2(t) sin2c jx2(t) jx2(t)cos2c After pass filtering, second harmonic components filtered result desired baseband signal representation x(t): (output) =1/2[x1(t) jx2(t)]. Figure illustrates Functional Block Diagrams that represent this mathematical process.
x(t) x1(t) cosct x2(t) sinct cosct sinct x2(t) x1(t)
digital implementation this function implies that converter needs digitize incoming waveform x(t). carrier frequency typically much higher than frequency actual baseband signal. Nyquist criterion specifies minimum sampling rate required signal reconstruction. This minimum sampling rate defined twice frequency baseband signal. Based this definition alone appears that carrier frequency does influence sampling rate converter. example, baseband signal 9600 bits/sec transmitted using 45MHz input, then sampling rate reconstruct 9600 bits/sec signal needs minimum 9600 19.2kHz. 19.2kHz rate signal reconstruction requirement sampling rate independent value Based this discussion, speed potentially used sample signal very high frequencies still recover baseband information. This concept referred undersampling subsampling. Subsampling makes digital implementation down conversion high frequencies (i.e., 40MHz-200MHz) feasible. This because A/Ds would longer present limiting factor. A/Ds sampling rates relatively inexpensive available. From pure Nyquist rate, theoretical standpoint, this appears viable approach; practice though there number additional factors that need evaluated such design. requirements still factor they impact design outcome overall feasibility great extent. designer must carefully analyze following requirements before deciding particular undersampling application. Dynamic Range Requirement: This derived examining operational environment desired system signal noise ratio. noise environment, signal interference conditions, multipath, adjacent channel rejection requirements some primary variables that influence dynamic range specifications classical receiver architecture. addition, existence system parameters filters that proceed need taken into account these calculations. Sampling Rate Requirement: This derived primarily from baseband signal bandwidth. minimum rate defined Nyquist criterion. overall system frequency plan baseband digital rates required system also influence decision rate selection. Implementation issues such availability only certain clock rates also play role selecting sampling rate. minimum rate track hold droop specification.
FIGURE BASEBAND DOWNCONVERSION BLOCK DIAGRAM
1-888-INTERSIL 321-724-7143 Copyright
Intersil Corporation 1999
Application Note 9509
Track Hold Aperture Jitter Requirement: This requirement function frequency. track hold circuit must have enough bandwidth adequately cover frequency that being sampled. addition, effects system performance sampling aperture error have evaluated. aperture jitter track hold directly influences this aperture error result. degradation aperture jitter function sampled frequency. higher frequency, tighter track hold aperture jitter requirements become order maintain desired aperture error system specification. example digital receiver application will used further elaborate undersampling demonstrate points made thus far. This design based Intersil HI5702 sampling, Intersil HSP45116 numerically controlled oscillator/modulator (NCOM) perform multiplication samples with complex phasor [cosc jsinc followed Intersil decimating digital filters HSP43220 that generate rate filtered baseband data. down conversion filtering operations followed with digital FSK/FM demodulator that processes baseband phase quadrature data being output from digital pass filters (HSP43220). digital demodulator simple discriminator implementation based delay multiply calculations channels. Figure illustrates this general purpose digital design. Block Diagram includes optional circuit. utility this circuit explained later this paper.
HSP45116 HI5702 MSPS
target receiver design standard FSK/FM receiver with 45MHz 25kHz channel bandwidth. also assumed that data deviation (±6.4kHz). This example modified ETACS, AMPS, Nordic Telephone, other applications. Existing systems that traditional analog techniques place after analog discriminator which performs FSK/FM demodulation. These systems experience problems with matching detection filtering discriminator. Assuming curve characteristics analog discriminator, apparent that frequency matching analog filters becomes essential maintain acceptable performance. digital implementation doesn't suffer from possible filter mismatching digital filters subject phase linearities. addition, digital approach improve performance adjacent signal rejection over rejection that provided analog filter, front converter. Diagram Figure shows this basic approach which uses subsampling convert 45MHz 1MHz This assumes that track hold integrated with case with HI5702. Frequency Spectrum Diagrams Figure show basic signal processing flow subsampling. input signal first filtered using analog bandpass filter then amplified amplifier level sufficient drive converter. then sampled high speed track hold, quantized 4MHz rate clock converter. sampling process creates spectrum that repeats original spectrum every multiple sampling frequency shown Figure negative part spectrum shown folded back interleaved with positive part.
HSP43220 FSK/FM DEMOD.
cosct
HSP43220
sinct
NCOM
SIGNAL
45MHz
45MHz 1MHz
FIGURE DIGITAL BASEBAND DOWNCONVERSION BLOCK DIAGRAM
BEFORE SAMPLING AMPL
SAMPLING FREQUENCY
AFTER SAMPLING
FREQUENCY (MHz) ORIGINAL 45MHz
AMPL
DESIRED 1MHz ALIAS
FREQUENCY
FIGURE UNDERSAMPLING FREQUENCY PLAN
Application Note 9509
repeats (aliases) found frequencies between sampling frequency subsampling approach thought generating signal replica much lower frequency close this example aliased signal centered 1MHz. This signal later going processed NCOM, shown Figure shift center where digitally filtered. sampling rate, well resolution chosen based following considerations: highest usable sampling rate converter subsequent digital processing circuits. power operation ease processing, lower rate, better. Fundamentally, lowest rate twice signal bandwidth according Nyquist criterion. this example, that works 50kHz, given that signal occupies 25kHz channel. Practically, however, filtering circuits usually sufficient ensure good performance this close sampling frequency high enough that noise interference passing through filtering does fold back within sampling bandwidth. These filters only partially reject interference bandwidth that wider than channel bandwidth. Additionally, minimum sampling rate lowest rate that converter without suffering much track hold droop. Intersil HI5702, lowest rate 0.5MHz. these reasons, sampling rate chosen 4MHz. This sampling rate aliases 45MHz create 1MHz This rate also easily handled Intersil Digital Signal Processing devices (HSP45116, HSP43220) which follow with complex down conversion, decimating filtering. Higher sampling rates also employed more oversampling baseband signal desired. digital filters that follow processing chain provide additional adjacent channel rejection improve selectivity beyond what analog filter offering. This additional selectivity 30-40dB more than provided filter prior A/D. this example combination analog filter digital filter selectivities provide overall adjacent channel rejections 60dB 70dB. consideration addressed placement gain AGC. most analog designs, majority gain final after filtering that establishes selectivity. Since using digital processing some this filtering, large interfering signals might exist input converter. cannot allow clipping prior converter because these adjacent channel signals. this reason, will have operated with adequate headroom order ensure that adjacent channel signals above full scale. Another reason headroom Raleigh fading multipath. This phenomenon causes rapid variations signal level number applications such mobile cellular terminal. receiver this fading signal needs handle variations that potentially range from +10dB -40dB. Excluding requirements multipath interference, +10dB detection alone, required number bits (assuming 6dB/bit). system, though, needs achieve 40dB more adjacent channel rejection which implies that will -30dB given +10dB detection that needed. This, along with headroom, sets required quantization minimum bits about 36dB ENOB (equivalent number bits). ensure good ENOB performance, 8-bit should sufficient. Note that driving specification spurious free dynamic range that system requires. choosing subsampling rate should also concerned with phase noise clock edge jitter sampling clock. This combined with inherent aperture jitter limit sampling rate set. approximation aperture error converter derived from formula:
fmax
where: number bits aperture error fmax frequency given frequency sampling rate aperture error converter needs less than 27ps degradation bits. hold time 250ns 4MHz sampling rate. these requirements exceeded with HI5702 converter. quantization noise another noise source that needs attention. this example, given choice sampling frequency, quantization noise will spread over 4MHz bandwidth will therefore attenuated when signal filtered 25kHz bandwidth during detection filtering. This reduction bandwidth gives 22dB improvement. With required 35dB 3kHz bandwidth after final filtering demodulator, quantization noise concern. digital filtering process needs also evaluated since this process essential achieve additional filter selectivity overall system. using HSP43220 additional filter selectivity desired this application achieved. HSP43220 decimating digital filter. Decimation filtering operation employed digital filtering that accomplishes rate reduction from filter input filter output. summary HSP43220 features include: 33MHz clock rate 16-bit complement input 20-bit coefficients 24-bit extended precision output Programmable Decimation maximum 16,384
Decimation factors, sampling rates number filter taps need traded configuring filter response. application this example HSP43220 programmed provide desired filter response. example possible filter specifications attached. filter coefficients these cases were generated using DECIMATEwhich software filter design tool developed HSP43220. user defines desired filter response program determines HSP43220 implement given response then derives necessary coefficients, hardware configuration.
Application Note 9509
filter parameters well frequency response these filter examples follows: Filter Passband 7500 Transition Band 3000 Passband Attenuation 0.5dB Stopband Attenuation 60dB Input Sample Rate 4e+06 Input Rate 125000 Output Rate 62500s
INTERSIL DECI MATE
FREQUENCY RESPONSE 0.0003 FREQUENCY RESPONSE
MAGNITUDE (dB) MAGNITUDE (dB) 5E+05 1E+06 FREQUENCY (Hz) 1E+06 2E+06
-28.6316
-57.2636
-85.8956
-120
-114.527
1E+04
3E+04 FREQUENCY (Hz)
4E+04
6E+04
SYSTEM FREQUENCY RESPONSE
-32.7848 MAGNITUDE (dB)
-65.5697
-98.3546
-131.139
-163.924 6250 12500 18750 FREQUENCY (Hz) 25000 31250
Application Note 9509
Filter Passband 10000 Transition Band 3000 Passband Attenuation 0.5dB Stopband Attenuation 60dB Input Sample Rate 4e+06 Input Rate 125000 Output Rate 62500
INTERSIL DECI MATE
FREQUENCY RESPONSE 0.0001 FREQUENCY RESPONSE
MAGNITUDE (dB) MAGNITUDE (dB)
-28.0562
-56.1128
-84.1690
-120
5E+05
1E+06 FREQUENCY (Hz)
1E+06
2E+06
-112.225
1E+04
3E+04 FREQUENCY (Hz)
4E+04
6E+04
SYSTEM FREQUENCY RESPONSE 5.78E-15
-32.5081 MAGNITUDE (dB)
-65.0163
-97.5245
-130.032
-162.540
6250
12500
18750 FREQUENCY (Hz)
25000
31250
HSP43220 architecture composed cascade filtering stages. High Order Decimation Filter (HDF), followed Finite Impulse Response (FIR) filter. individual responses both filters shown frequency spectrum responses. sinx/x type response does initial filtering followed that provides desired stopband transition band output characteristics. cascaded final system response which actual output HSP43220 shown bottom frequency response plot.
Besides HSP43220, Intersil number other high speed digital filters that appropriate undersampling applications. reference part numbers some these filter products include HSP43168, HSP43124, HSP43216 HSP50016. Information more details these digital filters well other Digital Signal Processing (DSP) products found Intersil Data Book.
Intersil semiconductor products manufactured, assembled tested under ISO9000 quality systems certification.
Intersil semiconductor products sold description only. Intersil Corporation reserves right make changes circuit design and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries. information regarding Intersil Corporation products, site http://www.intersil.com

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