DATE 5/01/01 DESCRIPTION APPVD III. TIMING TYPE Cl
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DESCRIPTION: W9Q316647LB-222 8Mx64 industry standard 168-pin PC-100-222 SDRAM DIMM Manufactured with 16Mx8 400-mil TSOPII-54 PC100-222 Synchronous DRAM devices Requires 3.3V+/-0.3V power supply Inputs outputs LVTTL compatible Fully board layout compatible Intel's PC100 module specification Supports auto self refresh modes Uses refresh cycles 12/10/2 row/column/bank addressing 64ms Supports Burst Mode operation burst length: 4,and With serial presence detect EEPROM contacts gold plated
DATE 5/01/01
DESCRIPTION
APPVD
III. TIMING
TYPE Clock Cycle Time: Clock Frequency: Access Time From Clock: Command Setup Time: Command Hold Time: (min) (max) (max) (min) (min)
CL=2 10ns 100MHz
CL=3 125MHz
MECHANICAL LAYOUT:
BACK
FRONT
5.250
5.171
SIDE
.157max
.079R(2X) .118D(2X)
.700
1.000
.118 .350
.250 .450 1.450 1.700
.250
.039
.050 2.150 2.507 0.050±.003
DIMENSIONS INCHES ZD256M58H
WINTEC INDUSTRIES
16X64 PC-100 SDRAM DIMM SPECIFICATION W9Q316647LB-222
SCALE NONE SIZE DRAWINGS AW9Q316647LB-222 SHEET
5.014
APPROVALS DRAW YAMEI CHECKED DATE 3/24/99
Tolerances:+/- 0.005" unless otherwise specified
SCALE DRAWINGS
PINOUT:
PIN# SYMBOL PIN# SYMBOL DQMB1 CS0# DQ10 CLK0 DQ11 DQ12 DQ13 CS2# DQMB2 DQ14 DQMB3 DQ15 DQ16 DQMB0 DQ17 PIN# SYMBOL PIN# SYMBOL PIN# SYMBOL PIN# SYMBOL DQ18 DQMB5 DQ50 DQ19 DQ32 DQ51 DQ33 RAS# DQ20 DQ34 DQ52 DQ35 DQ36 DQ37 DQ21 DQ38 DQ53 DQ22 DQ39 DQ54 DQ23 DQ40 DQ55 DQ24 DQ41 DQ56 DQ25 DQ42 DQ57 DQ26 DQ43 DQ58 DQ27 DQ44 CKE0 DQ59 DQ45 DQ28 DQMB6 DQ60 DQ29 DQ46 DQMB7 DQ61 DQ30 DQ47 DQ62 DQ31 DQ63 CLK2 RSVD CAS# DQ48 DQMB4 DQ49
NAMES:
SYMBOL A0-A11 BA0, DQ0-DQ63 CS0#, CS2# RAS# CAS# DQM0-7 CLK0,2 CKE0 SA0-2 RSVD DESCRIPTION Address Inputs Bank Selects Data Inputs/Outputs Chip Select Address Strobe Column Address Strobe Write Enable Outputs Disable/Write Mask Clock Input Clock Enable Serial Data Clock Address Reserved Future Power (+3.3V) Ground Connection
DIMENSIONS INCHES
WINTEC INDUSTRIES
16X64 100MHz SDRAM DIMM SPECIFICATION
APPROVALS DRAW CHECKED
DATE
W9Q316647LB-222
SCALE NONE SIZE DRAWINGS AW9Q316647LB-222 SCALE DRAWINGS SHEET
FUNCTIONAL DIAGRAM
CS0# DQMB0
16MX8 SDRAM
DQMB1
16MX8 SDRAM
CS2# DQMB2
16MX8 SDRAM
DQMB3
16MX8 SDRAM
CS0# DQMB4
16MX8 SDRAM
DQMB5
16MX8 SDRAM
CS2# DQMB6
16MX8 SDRAM
DQMB7
16MX8 SDRAM
DQ[0:7]
DQ[8:15]
DQ[16:23]
DQ[24:31]
DQ[32:39]
DQ[40:47]
DQ[48:55]
DQ[56:63]
SERIAL BA0,BA1 RAS# CAS# CKE0 SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM CLK0 CLK2 SDRAM U0,1,4,5 SDRAM U2,3,6,7 3.3pF
Decoupling capacitors SDRAMs
WINTEC INDUSTRIES
SPECIFICATION
W9Q316647LB-222
Note: Unless otherwise noted, resistor values ohms.
SCALE NONE DRAWINGS AW9Q316647LB-222 SCALE DRAWINGS SHEET SIZE
Absolute Maximum Ratings
Item Voltage relative Power Dissipation Operating Temperature Storage Temperature Short Circuit Output Current Ratings +4.6 +150 Unit
Recommended Operating Conditions
+70°C) Parameter Supply Voltage Ground Input High Voltage Input Voltage Symbol -0.5 Vcc+0.3 Unit
Characteristics
(Vcc 3.3V±0.3V, +70°C) Parameter Operating Current (One Bank Active) Precharge Standby Current power-down mode Precharge Standby Current power-down mode Operating Current Symbol Icc1 ICC2 ICC2 ICC2 ICC2 ICC3 ICC3 ICC4 ICC5 ICC6 Test Conditions min., min. Active-precharge command cycling, burst operation (min.), VIL(max) (min.), VIH(min) min., VIH(min), active state (max. banks) Latency Latency min. Infinity min. Infinity VIH(min.) VIL(max.) (Power down mode) Latency=2 Latency=3 1000 1080 2160 Unit Note
Burst Operating Current Auto Refresh Current Self Refresh Current Output logic high voltage Output logic voltage Input leakage current Output leakage current Note: Measured with outputs open.
min., Read/Write command cycling min., Auto Refresh command cycling Self Refresh Mode, 0.2V -2mA Vout Vcc, Dout Disable
Capacitance
3.3V±0.3V, MHz) Parameter Input capacitance (A0-A11, BA0, BA1, RAS#, CKE0,CAS#,WE#) Input capacitance (CS0#,CS2#, CLK0,CLK2) Input capacitance (DQMB0-DQMB7) capacitance (DQ0-DQ63) Input capacitance (SA0-SA2, SCL) capacitance (SDA) Symbol CIO1 Unit
WINTEC INDUSTRIES
SPECIFICATION
W9Q316647LB-222
SCALE NONE SIZE DRAWINGS AW9Q316647LB-222 SHEET
SCALE DRAWINGS
Characteristics (note 3.3V±0.3V, Parameter Symbol Unit Note Parameter Symbol Unit Note
Clock Clock Enable Clock Cycle Time CAS# Latency CAS# Latency Clock Frequency CAS# Latency CAS# Latency Access Time from CAS# Latency Clock CAS# Latency Clock High Pulse Width Clock Pulse Width Transition time Setup Hold Times Command Setup Time Address Setup Time Data Setup Time Setup Time Setup Time (Self Refresh exit) Command Hold Time Address Hold Time Data Hold Time Hold Time Common Parameters Column Delay Time Active Time Cycle Time Precharge Time Activate(a) Activate(b) Command period CAS#(a) CAS#(b) Command period Mode Register Set-up time Power Down Mode Entry Time
Refresh Cycle Refresh Period (4096 cycles) Self Refresh Exit Time Read Cycle Data Hold Time Data Impedance Time Data High Impedance Time Data Disable Latency Write Cycle Write Recovery Time DQMB Write Mask Latency
tREF tSREX
tDQZ
tCKS tCKSR tCKH
tDQW
Note:
timing tests have 0.4V 2.4V with timing referenced 1.4V crossover point. transition time measured between VIL. measurements assume 1ns. clock rising time longer than 1ns, time 0.5) added this parameter. longer than 1ns, time added this parameter. These parameters account number clock cycles depend operating frequency clock follows: number clock cycle specified value timing period Self Refresh Exit synchronous operation begins positive clock edge after returns high. Self Refresh Exit complete until time period equal satisfied once Self Refresh Exit command registered. reference time which output achieves open circuit condition, output voltage levels.
tRCD tRAS tRRD tCCD tRSC
120K
WINTEC INDUSTRIES
SPECIFICATION
W9Q316647LB-222
SCALE NONE SIZE DRAWINGS AW9Q316647LB-222 SHEET
SCALE DRAWINGS
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