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Operation Inputs Accept Voltages 3-State Noninverting Outputs Drive Li


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SN54AC374, SN74AC374 OCTAL TYPE EDGE TRIGGERED FLIP FLOPS WITH STATE OUTPUTS
Operation Inputs Accept Voltages 3-State Noninverting Outputs Drive Lines Directly Full Parallel Access Loading
SN54AC374 PACKAGE SN74AC374 PACKAGE (TOP VIEW)
description/ordering information
These 8-bit flip-flops feature 3-state outputs designed specifically driving highly capacitive relatively low-impedance loads. devices particularly suitable implementing buffer registers, ports, bidirectional drivers, working registers. eight flip-flops 'AC374 devices D-type edge-triggered flip-flops. positive transition clock (CLK) input, outputs logic levels data inputs. buffered output-enable (OE) input used place eight outputs either normal logic state (high logic levels) high-impedance state. high-impedance state, outputs neither load drive lines significantly. high-impedance state increased drive provide capability drive lines bus-organized systems without need interface pullup components.
SN54AC374 PACKAGE (TOP VIEW)
does affect internal operations flip-flop. data retained data entered while outputs high-impedance state. ORDERING INFORMATION
PDIP SOIC 85°C -40°C SSOP TSSOP CDIP 125°C -55°C LCCC PACKAGE Tube Tube Tape reel Tape reel Tape reel Tube Tape reel Tube Tube Tube ORDERABLE PART NUMBER SN74AC374N SN74AC374DW SN74AC374DWR SN74AC374NSR SN74AC374DBR SN74AC374PW SN74AC374PWR SNJ54AC374J SNJ54AC374W SNJ54AC374FK AC374 SNJ54AC374J SNJ54AC374W SNJ54AC374FK AC374 AC374 AC374 TOP-SIDE MARKING SN74AC374N
Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package. Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet.
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters.
POST OFFICE 655303
DALLAS, TEXAS 75265
products compliant 38535, parameters tested unless otherwise noted. other products, production processing does necessarily include testing parameters.
Copyright 2003, Texas Instruments Incorporated
SN54AC374, SN74AC374 OCTAL TYPE EDGE TRIGGERED FLIP FLOPS WITH STATE OUTPUTS
description/ordering information (continued)
ensure high-impedance state during power power down, should tied through pullup resistor; minimum value resistor determined current-sinking capability driver.
FUNCTION TABLE (each flip-flop) INPUTS OUTPUT
logic diagram (positive logic)
Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, -0.5 Input voltage range, (see Note -0.5 Output voltage range, (see Note -0.5 Input clamp current, VCC) Output clamp current, VCC) Continuous output current, VCC) Continuous current through ±200 Package thermal impedance, (see Note package 70°C/W package 58°C/W package 69°C/W package 60°C/W package 83°C/W Storage temperature range, Tstg -65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD 51-7.
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AC374, SN74AC374 OCTAL TYPE EDGE TRIGGERED FLIP FLOPS WITH STATE OUTPUTS
recommended operating conditions (see Note
SN54AC374 Supply voltage Low-level input voltage Input voltage Output voltage Low-level output current Input transition rise fall rate 4.5V 3.15 3.85 1.35 1.65 SN74AC374 3.15 3.85 1.35 1.65 ns/V UNIT
High-level input voltage
High-level output current
Operating free-air temperature NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS GND, 2.56 3.86 4.86 0.36 0.36 0.36 ±0.1 ±0.25 25°C SN54AC374 SN74AC374 2.46 3.76 4.76 0.44 0.44 0.44 ±2.5 UNIT
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AC374, SN74AC374 OCTAL TYPE EDGE TRIGGERED FLIP FLOPS WITH STATE OUTPUTS
timing requirements over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
25°C fclock Clock frequency Pulse duration, high Setup time, data before Hold time, data after SN54AC374 SN74AC374 UNIT
timing requirements over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
25°C fclock Clock frequency Pulse duration, high Setup time, data before Hold time, data after SN54AC374 SN74AC374 UNIT
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER fmax tPLH tPHL tPZH tPZL tPHZ tPLZ (INPUT) (OUTPUT) 25°C 10.5 13.5 12.5 11.5 11.5 12.5 11.5 SN54AC374 16.5 SN74AC374 15.5 14.5 12.5 UNIT
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER fmax tPLH tPHL tPZH tPZL tPHZ tPLZ (INPUT) (OUTPUT) 25°C SN54AC374 10.5 12.5 10.5 SN74AC374 10.5 12.5 UNIT
operating characteristics, 25°C
PARAMETER Power dissipation capacitance TEST CONDITIONS UNIT
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AC374, SN74AC374 OCTAL TYPE EDGE TRIGGERED FLIP FLOPS WITH STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
From Output Under Test (see Note Open TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Open
LOAD CIRCUIT Timing Input Input VOLTAGE WAVEFORMS Data Input VOLTAGE WAVEFORMS
Input tPLH In-Phase Output tPHL Out-of-Phase Output tPHL tPLH VOLTAGE WAVEFORMS
Output Control (low-level enabling) tPZL Output Waveform (see Note Output Waveform Open (see Note
tPLZ tPZH tPHZ VOLTAGE WAVEFORMS
NOTES: includes probe capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. input pulses supplied generators having following characteristics: MHz, outputs measured time with input transition measurement.
Figure Load Circuit Voltage Waveforms
POST OFFICE 655303
DALLAS, TEXAS 75265
MECHANICAL DATA
MCFP006B JANUARY 1995 REVISED JULY 2003
(R-GDFP-F20)
0.300 (7,62) 0.245 (6,22)
CERAMIC DUAL FLATPACK
Base Seating Plane
0.045 (1,14) 0.026 (0,66)
0.100 (2,54) 0.045 (1,14) 0.320 (8,13)
0.009 (0,23) 0.004 (0,10)
0.022 (0,56) 0.015 (0,38)
0.050 (1,27) 0.540 (13,72)
0.005 (0,13) Places
0.370 (9,40) 0.250 (6,35)
0.370 (9,40) 0.250 (6,35) 4040180-4 07/03
NOTES:
linear dimensions inches (millimeters). This drawing subject change without notice. This package hermetically sealed with ceramic using glass frit. Index point provided terminal identification only. Falls within Mil-Std 1835 GDFP2-F20
POST OFFICE 655303
DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B OCTOBER 1996
(S-CQCC-N**)
TERMINAL SHOWN
LEADLESS CERAMIC CHIP CARRIER
TERMINALS
0.342 (8,69) 0.442 (11,23) 0.640 (16,26) 0.739 (18,78) 0.938 (23,83) 1.141 (28,99) 0.358 (9,09) 0.458 (11,63) 0.660 (16,76) 0.761 (19,32) 0.962 (24,43) 1.165 (29,59) 0.307 (7,80) 0.406 (10,31) 0.495 (12,58) 0.495 (12,58) 0.850 (21,6) 1.047 (26,6)
0.358 (9,09) 0.458 (11,63) 0.560 (14,22) 0.560 (14,22) 0.858 (21,8) 1.063 (27,0)
0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25)
0.020 (0,51) 0.010 (0,25)
0.055 (1,40) 0.045 (1,14)
0.045 (1,14) 0.035 (0,89)
0.028 (0,71) 0.022 (0,54) 0.050 (1,27)
0.045 (1,14) 0.035 (0,89)
4040140 10/96 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. This package hermetically sealed with metal lid. terminals gold plated. Falls within JEDEC MS-004
POST OFFICE 655303
DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E JANUARY 1995 REVISED DECEMBER 2001
(R-PDSO-G**)
PINS SHOWN 0,65 0,38 0,22 0,15
PLASTIC SMALL-OUTLINE
0,25 0,09 5,60 5,00 8,20 7,40
Gage Plane 0,25 0,95 0,55
Seating Plane 2,00 0,05 0,10
PINS
6,50
6,50
7,50
8,50
10,50
10,50
12,90
5,90
5,90
6,90
7,90
9,90
9,90
12,30 4040065 12/01
NOTES:
linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-150
POST OFFICE 655303
DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C JANUARY 1995 REVISED FEBRUARY 1999
(R-PDSO-G**)
PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0,65
0,30 0,19
0,10
0,15 4,50 4,30 6,60 6,20 Gage Plane 0,25 0,75 0,50
Seating Plane 1,20 0,15 0,05 0,10
PINS
3,10
5,10
5,10
6,60
7,90
9,80
2,90
4,90
4,90
6,40
7,70
9,60
4040064/F 01/97 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-153
POST OFFICE 655303
DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. Customers should obtain latest relevant information before placing orders should verify that such information current complete. products sold subject TI's terms conditions sale supplied time order acknowledgment. warrants performance hardware products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques used extent deems necessary support this warranty. Except where mandated government requirements, testing parameters each product necessarily performed. assumes liability applications assistance customer product design. Customers responsible their products applications using components. minimize risks associated with customer products applications, customers should provide adequate design operating safeguards. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right relating combination, machine, process which products services used. Information published regarding third-party products services does constitute license from such products services warranty endorsement thereof. such information require license from third party under patents other intellectual property third party, license from under patents other intellectual property Reproduction information data books data sheets permissible only reproduction without alteration accompanied associated warranties, conditions, limitations, notices. Reproduction this information with alteration unfair deceptive business practice. responsible liable such altered documentation. Resale products services with statements different from beyond parameters stated that product service voids express implied warranties associated product service unfair deceptive business practice. responsible liable such statements. Following URLs where obtain information other Texas Instruments products application solutions: Products Amplifiers Data Converters Interface Logic Power Mgmt Microcontrollers amplifier.ti.com dataconverter.ti.com dsp.ti.com interface.ti.com logic.ti.com power.ti.com microcontroller.ti.com Applications Audio Automotive Broadband Digital Control Military Optical Networking Security Telephony Video Imaging Wireless Mailing Address: Texas Instruments Post Office 655303 Dallas, Texas 75265 Copyright 2004, Texas Instruments Incorporated www.ti.com/audio www.ti.com/automotive www.ti.com/broadband www.ti.com/digitalcontrol www.ti.com/military www.ti.com/opticalnetwork www.ti.com/security www.ti.com/telephony www.ti.com/video www.ti.com/wireless

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