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QF1D512 Programmable Single Channel Digital Filter Descripti


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QF1D512
Programmable Single Channel Digital Filter
Description
single channel, programmable digital filter designed seamless insertion serial data path digital signal used coprocessor. circuit example below shows QF1D512 operating between MCU. device programmed using Quickfilter Design Software which supports most digital filter configurations. filter taps capable generating "brick wall" filters such pass filter with cutoff frequency, 140dB rejection, total transition band only filter operate over broad range data rates from 10sps 500ksps support ADC's with resolutions ranging from bits.
Applications
Wireless Sensor Networks Leak Detection Industrial control monitoring Digital Sensors Medical patient monitoring diagnostic equipment Military/Avionics
Features
Digital Filter Maximum 512-tap symmetric 256-tap non-symmetric digital filter data words, coefficients Programmable Box-car Averager Down-sampler preFIR, including bypass mode Reprogrammable circuit Data Rates 10sps 500ksps Interface Configuration Interface: 4-wire (all modes supported) Data Interface: Fully programmable synchronous serial modes operates with wide variety ADC's 3.3V I/O, tolerant Operates serial data clock (20MHz max.) daisy chain multiple devices Programmable Bypass mode (e.g. process data, configure Power Scales with input data rate, Scales with filter length, e.g. taps: <1mW 1ksps 10ksps 100ksps Design Software Filter Types Create complete filter design using Quickfilter Design Software Supports many filter types including Lowpass, Notched Lowpass, Highpass, Bandpass, Dual Bandpass, Bandstop, Dual Bandstop Parks-McClellan Windows Sinc filter algorithms Development $199: Includes hardware software necessary design, implement, test complete filter design both data power Other Package: Temperature range: +85°C 3.3V 1.8V supplies Internal linear voltage regulator used single rail operation
RVDD33 RVDD18 VDD18 VDD33
RGND
16-pin
RSTN
SCLK
DCLK
Block Diagram
Typical Application
QF1D512
DCLK DSEL
CTRL Registers
DSEL
mosi
Data Fmt/ Control
Intfc
miso
SCLK
sclk
COEFF
dout sclk /drdy
drdy
Serial Connection between Host tied
PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Quickfilter reserves right change discontinue these products without notice.
Additional Application Examples
QF1D512
dout dclk dseln dout sclk
miso
uP/DSP
dout sclk
sclk mosi
Serial with
QF1D512
dclk dsel dout sclk
miso
uP/DSP
sclk mosi
Built-in
Slave Co-processor with embedded
QF1D512
miso
sclk
QF1D512
dclk dsel
QF1D512
miso
sclk
dsel dclk
miso
sclk
QF1D512
dsel dclk
miso
sclk
dout
dsel dclk
dout
sclk
dout
sclk
dout
sclk
dout
sclk
uP/DSP
sclk mosi drdy start
Daisy Chain (serial) Multi-channel, Cascaded Filtering, Filter Down-sampler
Confidential: customer only
2006 Quickfilter Technologies, Inc., 1024 Greenville Avenue, Suite 100, Allen, 75002 www.quickfiltertech.com Phone: 214-547-0460
3/30/06

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