LP3986 Dual Micropower Ultra Low-Dropout CMOS Voltage Regulators micro
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LP3986 Dual Micropower Ultra Low-Dropout CMOS Voltage Regulators micro Package
LP3986 Dual Micropower Ultra Low-Dropout CMOS Voltage Regulators micro Package
LP3986 dual dropout regulator designed portable wireless applications with demanding performance board space requirements. LP3986 stable with small ±30% ceramic output capacitor requiring smallest possible board space. LP3986's performance optimized battery powered systems deliver ultra noise, extremely dropout voltage quiescent current independent load current. Regulator ground current increases very slightly dropout, further prolonging battery life. Optional external bypass capacitor reduces output noise further without slowing down load transient response. Fast start-up time achieved utilizing speed-up circuit that actively precharges bypass capacitor. Power supply rejection better than frequencies kHz. High power supply rejection maintained input voltage levels common battery operated circuits. LP3986 available micro package. Performance specified -40°C +125°C temperature range. single applications, please refer LP3985 datasheet.
Features
Miniature 8-I/O micro package Stable with ceramic high quality tantalum output
capacitors Fast turn-on independent regulators Logic controlled enable Over current thermal protection
Specifications
Guaranteed output current regulator typical quiescent current when both regulators
shutdown mode typical dropout voltage output current typical ground current typical output noise fast turn-on circuit -40°C +125°C junction temperature
Applications
CDMA cellular handsets cellular handsets Portable information appliances Portable battery applications
Typical Application Circuit
20003401
2007 National Semiconductor Corporation
200034
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LP3986
Block Diagram
LP3986
20003402
Descriptions
Name VOUT2 BYPASS VOUT1 *micro Function Output Voltage second Enable input second Bypass capacitor bandgap Common ground Common ground Enable input first Output Voltage first Common input both LDOs
Note: numbering scheme micro package revised April 2002 conform JEDEC standard. Only numbers were revised. changes physical location inputs/outputs were made. reference purposes, obsolete numbering scheme VOUT2 BYPASS pins VOUT1
Connection Diagram
20003404
View Bump micro Package Package Number TLA08
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LP3986
Ordering Information
micro Package thickness 0.600mm) Output Voltage 2.85 2.85 Grade Package Marking LP3986 Supplied Units, Tape Reel LP3986TL-2525 LP3986TL-2528 LP3986TL-2518 LP3986TL-2626 LP3986TL-2818 LP3986TL-2828 LP3986TL-285285 LP3986TL-2929 LP3986TL-3028 LP3986TL-3030 LP3986TL-3131 LP3986TL-3133 LP3986TL-3333 LP3986 Supplied 3000 Units, Tape Reel LP3986TLX-2525 LP3986TLX-2528 LP3986TLX-2518 LP3986TLX-2626 LP3986TLX-2818 LP3986TLX-2828 LP3986TLX285285 LP3986TLX-2929 LP3986TLX-3028 LP3986TLX-3030 LP3986TLX-3131 LP3986TLX-3133 LP3986TLX-3333
20003403
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LP3986
Absolute Maximum Ratings (Notes
Military/Aerospace specified devices required, please contact National Semiconductor Sales Office/ Distributors availability specifications. VIN, VOUT Junction Temperature Storage Temperature Temp. (Note -0.3 6.5V -0.3 (VIN+0.3V) 6.5V 150°C -65°C +150°C 235°C
Maximum Power Dissipation (Note Rating (Note Human Body Model Machine Model
364mW 200V
Operating Ratings
Junction Temperature Thermal Resistance
(Notes (VIN+ 0.3V) -40°C +125°C 220°C/W 250mW
Maximum Power Dissipation (Note
Electrical Characteristics
Unless otherwise specified: VOUT(nom) 0.5V, IOUT 1mA, COUT CBYPASS 0.01µF. Typical values limits appearing standard typeface 25°C. Limits appearing boldface type apply over entire junction temperature range operation, -40°C +125°C. (Notes Symbol Parameter Output Voltage Tolerance VOUT Line Regulation Error (Note IOUT (VOUT(nom) 0.5V) 6.0V, IOUT 0.006 0.003 Conditions Limit -2.5 -3.0 0.092 0.128 0.006 0.01 Units VOUT
(nom)
%/mA mVP-P
Load Regulation Error (Note IOUT Output Line Regulation VOUT(nom) IOUT (Figure 3.1V, kHz, IOUT (Figure 3.1V, kHz, IOUT (Figure Both Regulators 1.4V, IOUT Both Regulators 1.4V, IOUT Regulator 1.4V IOUT Regulator 1.4V IOUT 0.4V, Both Regulators (shutdown) Dropout Voltage (Note IOUT(PK) Short Circuit Current Limit Peak Output Current(Note Turn-On Time (Note Output Noise Voltage IOUT IOUT Output Grounded VOUT VOUT(nom) CBYPASS 0.01 kHz, COUT
PSRR
Power Supply Rejection Ratio
Quiescent Current
0.001
µVrms
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LP3986
Symbol n(1/f)
Parameter Output Noise Density COUT
Conditions
Limit
Units
Maximum Input Current Maximum Level Input Voltage Minimum High Level Input Voltage ILoad1 1KHz rate ILoad2 VOUT2/VOUT1 ILoad2 1KHz rate ILoad1 VOUT2/VOUT1 VOUT 2.5V,
Xtalk
Crosstalk Rejection
COUT
Input capacitance(Note Capacitance(Note
VOUT 1.8V, VIN_MIN>= 2.9V VOUT 2.5V, VOUT 1.8V, VIN_MIN>= 2.9V
(Note
Note Absolute Maximum Ratings limits beyond which damage device occur. Operating Ratings conditions under which operation device guaranteed. Operating Ratings imply guaranteed performance limits. guaranteed performance limits associated test conditions, Electrical Characteristics tables. Note voltages with respect potential pin. Note Additional information temperature found National Semiconductor Application Note (AN-1112). Note Absolute Maximum power dissipation depends ambient temperature calculated using formula:
TA)/JA,
Where junction temperature, ambient temperature, junction-to-ambient thermal resistance. 364mW rating appearing under Absolute Maximum Ratings results from substituting Absolute Maximum junction temperature, 150°C, 70°C 220°C/W More power dissipated safely ambient temperatures below 70°C Less power dissipated safely ambient temperatures above 70°C. Absolute Maximum power dissipation increased 4.5mW each degree below 70°C, must derated 4.5mW each degree above 70°C. Note human body model 100pF discharged through 1.5k resistor into each pin. machine model 200pF capacitor discharged directly into each pin. Note Like Absolute Maximum power dissipation, maximum power dissipation operation depends ambient temperature. 250mW rating appearing under Operating Ratings results from substituting maximum junction temperature operation, 125°C, 70°C 220°C/W into above. More power dissipated ambient temperatures below 70°C Less power dissipated ambient temperatures above 70°C. maximum power dissipation operation increased 4.5mW each degree below 70°C, must derated 4.5mW each degree above Note limits guaranteed. electrical characteristics having room temperature limits tested during production with 25°C correlated using Statistical Quality Control (SQC) methods. cold limits guaranteed correlating electrical characteristics process temperature variations applying statistical process control. Note target output voltage, which labeled VOUT(nom), desired voltage option. Note output voltage changes slightly with line voltage. increase line voltage results slight increase output voltage vice versa. Note output voltage changes slightly with load current. increase load current results slight decrease output voltage vice versa. Tested limit applies Vout 2.5V greater. Note Dropout voltage input-to-output voltage difference which output voltage 100mV below nominal value. Note Turn-on time that between enable input just exceeding output voltage just reaching nominal value. Note Range capacitor values which device will remain stable. This electrical specification guaranteed design. Note Range capacitor values which device will remain stable. This electrical specification guaranteed design. Note IPEAK guaranteed Vout 2.5V greater.
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LP3986
Test Signals
20003408
FIGURE Line Regulation Input Test Signal
20003409
FIGURE PSRR Input Test Signal
Typical Performance Characteristics
VOUT 0.5, 25°C, both enable pins tied Power Supply Rejection Ratio (CBP 0.001µF)
Unless otherwise specified, CIN= COUT Ceramic, 0.01µ
Power Supply Rejection Ratio (CBP 0.01µF)
20003410
20003447
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LP3986
Power Supply Rejection Ratio (CBP 0.1µF)
Output Noise Spectral Density
20003448
20003451
Line Transient Response (CBP 0.001µF)
Line Transient Response (CBP 0.01µF)
20003413
20003449
Load Transient Cross Talk (VIN VOUT 0.2V)
Load Transient Cross Talk (VIN VOUT 0.2V)
20003417
20003416
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LP3986
Start-Up Time (CBP 0.001, 0.01, 0.1µF)
Enable Response 4.2V
20003411
20003414
Enable Response (VIN VOUT+ 0.2V)
Enable Response
20003415
20003450
Output Short Circuit Current
Output Short Circuit Current 3.3V
20003465
20003466
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LP3986
Application Hints
EXTERNAL CAPACITORS Like low-dropout regulator, LP3986 requires external capacitors regulator stability. LP3986 specifically designed portable applications requiring minimum board space smallest components. These capacitors must correctly selected good performance. INPUT CAPACITOR input capacitance required between LP3986 input ground (the amount capacitance increased without limit). This capacitor must located distance more than from input returned clean analog ground. good quality ceramic, tantalum, film capacitor used input. Important: Tantalum capacitors suffer catastrophic failures surge current when connected lowimpedance source power (like battery very large capacitor). tantalum capacitor used input, must guaranteed manufacturer have surge current rating sufficient application. There requirements input capacitor, tolerance temperature coefficient must considered when selecting capacitor ensure capacitance will over entire operating temperature range. OUTPUT CAPACITOR LP3986 designed specifically work with very small ceramic output capacitors, ceramic capacitor (temperature characteristics X7R, X5R, Y5V) range with 500m range suitable LP3986 application circuit. also possible tantalum film capacitors output, these attractive reasons size cost (see next section Capacitor Characteristics). output capacitor must meet requirement minimum amount capacitance also have (Equivalent Series Resistance) value which within stable range. NO-LOAD STABILITY LP3986 will remain stable regulation with no-load (other than internal voltage divider). This specially important CMOS keep-alive applications. CAPACITOR CHARACTERISTICS LP3986 designed work with ceramic capacitors output take advantage benefits they offer: capacitance values range 4.7µF range, ceramic capacitors smallest, least expensive have lowest values (which makes them best eliminating high frequency noise). typical ceramic capacitor range which easily meets requirement stability LP3986. ceramic capacitor's capacitance vary with temperature. capacitor type X7R, which operates over temperature range -55°C +125°C, will only vary capacitance within ±15%. Most large value ceramic capacitors 2.2µF) manufactured with temperature characteristics. Their capacitance drop more than temperature goes from 25°C 85°C. Therefore, recommended over applications where ambient temperature will change significantly above below Tantalum capacitors less desirable than ceramic output capacitors because they more expensive when comparing equivalent capacitance voltage ratings 4.7µF range. Another important consideration that tantalum capacitors have higher values than equivalent size ceramics. This means that while possible find tantalum capacitor with value within stable range, would have larger capacitance (which means bigger more costly than ceramic capacitor with same value. should also noted that typical tantalum will increase about temperature goes from 25°C down -40°C, some guard band must allowed. NOISE BYPASS CAPACITOR Connecting 0.01µF capacitor between CBYPASS ground significantly reduces noise regulator output. This connected directly high impedance node band reference circuit. significant loading this node will cause change regulated output voltage. this reason, leakage current through this must kept possible best output voltage accuracy. this 0.01µF bypass capacitor strongly recommended prevent overshoot output during start types capacitors best suited noise bypass capacitor ceramic film. High-quality ceramic capacitors with either dielectric typically have very leakage. Polypropolene polycarbonate film capacitors available small surface-mount packages typically have extremely leakage current. Unlike many other LDO's, addition noise reduction capacitor does effect transient response device. ON/OFF INPUT OPERATION LP3986 turned pulling low, turned pulling high. this feature used, should tied keep regulator output times. assure proper operation, signal source used drive input must able swing above below specified turn-on/off voltage thresholds listed Electrical Characteristics section under VIH. FAST ON-TIME LP3986 outputs turned after Vref voltage reaches final value (1.23V nominal). speed this process, noise reduction capacitor bypass charged with internal 70µA current source. current source turned when bandgap voltage reaches approximately final value. turn time determined time constant bypass capccitor. smaller capacitor value, shorter turn time, less noise gets reduced. result, turn time noise reduction need taken into design consideration when choosing value bypass capacitor. MICRO MOUNTING micro package requires specific mounting techniques which detailed National Semiconductor Application Note (AN-1112). Referring section Surface Mount Technology (SMT) Assembly Considerations. best results during assembly, alignment ordinals board used facilitate placement micro device.
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LP3986
MICRO LIGHT SENSITIVITY Exposing micro device direct sunlight will cause misoperation device. Light sources such halogen lamps effect electrical performance brought near device. wavelengths which have most detrimental effect reds infra-reds, which means that fluorescent lighting used
inside most buildings very little effect performance. micro test board brought within fluorescent desk lamp effect regulated output voltage negligible, showing deviation less than 0.1% from nominal.
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LP3986
Physical Dimensions inches (millimeters) unless otherwise noted
micro SMD, Bump Package Number TL08CCA dimensions follows: 1.55mm 1.55mm 0.600mm
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LP3986 Dual Micropower Ultra Low-Dropout CMOS Voltage Regulators micro Package
Notes
CONTENTS THIS DOCUMENT PROVIDED CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION ("NATIONAL") PRODUCTS. NATIONAL MAKES REPRESENTATIONS WARRANTIES WITH RESPECT ACCURACY COMPLETENESS CONTENTS THIS PUBLICATION RESERVES RIGHT MAKE CHANGES SPECIFICATIONS PRODUCT DESCRIPTIONS TIME WITHOUT NOTICE. LICENSE, WHETHER EXPRESS, IMPLIED, ARISING ESTOPPEL OTHERWISE, INTELLECTUAL PROPERTY RIGHTS GRANTED THIS DOCUMENT. TESTING OTHER QUALITY CONTROLS USED EXTENT NATIONAL DEEMS NECESSARY SUPPORT NATIONAL'S PRODUCT WARRANTY. EXCEPT WHERE MANDATED GOVERNMENT REQUIREMENTS, TESTING PARAMETERS EACH PRODUCT NECESSARILY PERFORMED. NATIONAL ASSUMES LIABILITY APPLICATIONS ASSISTANCE BUYER PRODUCT DESIGN. BUYERS RESPONSIBLE THEIR PRODUCTS APPLICATIONS USING NATIONAL COMPONENTS. PRIOR USING DISTRIBUTING PRODUCTS THAT INCLUDE NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING OPERATING SAFEGUARDS. EXCEPT PROVIDED NATIONAL'S TERMS CONDITIONS SALE SUCH PRODUCTS, NATIONAL ASSUMES LIABILITY WHATSOEVER, NATIONAL DISCLAIMS EXPRESS IMPLIED WARRANTY RELATING SALE AND/OR NATIONAL PRODUCTS INCLUDING LIABILITY WARRANTIES RELATING FITNESS PARTICULAR PURPOSE, MERCHANTABILITY, INFRINGEMENT PATENT, COPYRIGHT OTHER INTELLECTUAL PROPERTY RIGHT. LIFE SUPPORT POLICY NATIONAL'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS PRIOR WRITTEN APPROVAL CHIEF EXECUTIVE OFFICER GENERAL COUNSEL NATIONAL SEMICONDUCTOR CORPORATION. used herein: Life support devices systems devices which intended surgical implant into body, support sustain life whose failure perform when properly used accordance with instructions provided labeling reasonably expected result significant injury user. critical component component life support device system whose failure perform reasonably expected cause failure life support device system affect safety effectiveness. National Semiconductor National Semiconductor logo registered trademarks National Semiconductor Corporation. other brand product names trademarks registered trademarks their respective holders.
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