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16-bit Hybrid Controller Pumps Industrial fans Exercise equipment


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56F801
16-bit Hybrid Controller
Pumps Industrial fans Exercise equipment Smart appliances Compressors Noise cancellation HVAC Remote monitoring Tachometers Cable test equipment General purpose devices Switched-mode power supplies
BENEFITS
On-board voltage regulator power management designed reduce overall system cost allowing single supply voltage Internal Relaxation Oscillator costsensitive applications eliminating need external crystal Flash memory engineered provide reliable, non-volatile memory storage, eliminating need external storage devices Easy program with flexible application development tools Program boot directly from Flash Supports multiple motors multi-phase control Patented distortion correction lower-risk, better performing control modules tightly coupled reduce processing overhead voltage interrupts protect system during brownout power failure Simple interface with other asynchronous serial communication devices off-chip memory
56F801 member 56800 core-based family Hybrid Controllers. combines, single chip, processing power functionality microcontroller with flexible peripherals create extremely cost-effective solution. Because cost, configuration flexibility, compact program code, 56F801 well-suited many applications. 56800 core based Harvard-style architecture consisting three execution units operating parallel, allowing many operations instruction cycle. microprocessor-style programming model optimized instruction allow straightforward generation efficient, compact code both applications. instruction also highly efficient compilers enable rapid development optimized control applications.
Simple updating Flash memory through SPI, OnCETM, using on-chip boot loader
56F801 16-BIT HYBRID CONTROLLER
MIPS operation 80Mhz core frequency functionality unified, C-efficient architecture MCU-friendly instruction supports both controller functions: MAC, manipulation unit, addressing modes On-chip Flash Program Flash Data Flash Boot Flash Program Data Hardware loops 6-channel Module 4-channel, 12-bit ADCs Serial Communications Interface (SCI) Serial Peripheral Interface (SPI) JTAG/OnCE port debugging On-chip Relaxation Oscillator 48-pin LQFP Package shared GPIO general purpose Quad Timers
COP/Watchdog
Program Memory
ENERGY INFORMATION
Flash
Boot Flash GPIO 16-Bit Quad Timer
Fabricated high-density CMOS with 5V-tolerant, TTL-compatible digital inputs Uses single 3.3V power supply
On-chip regulators digital analog circuitry lower cost reduce noise Wait Stop modes available
56800 Core
30/40 MIPS Dual Channel ADC, 12-Bit
Power Mgmt
Data Memory
6-Channel Flash
JTAG/OnCE
56800 CORE FEATURES
Efficient 16-bit 56800 family hybrid controller engine with dual Harvard architecture many Million Instructions Second (MIPS) 80MHz core frequency Single-cycle 16-bit parallel Multiplier-Accumulator (MAC) 36-bit accumulators including extension bits 16-bit bidirectional barrel shifter Parallel instruction with unique addressing modes Hardware loops Three internal address buses Four internal data buses Instruction supports both controller functions Controller-style addressing modes instructions compact code Efficient compiler local variable support Software subroutine interrupt stack with depth limited only memory JTAG/OnCE debug programming interface
56F801
PRODUCT DOCUMENTATION
DSP56800 Family Manual Detailed description 56800 family architecture, 16-bit core processor instruction set. Order Number: DSP56800FM/D DSP56F80x User's Manual Detailed description memory, peripherals, interfaces 56F801, 56F802, 56F803, 56F805, 56F807 Order Number: DSP56F801-7UM/D DSP56F801 Technical Data Sheet Electrical timing specifications, descriptions, package descriptions Order Number: DSP56F801/D DSP56F801 Product Brief interfaces Summary description block diagram core, memory, peripherals Order Number: DSP56F801PB/D
56F801 MEMORY FEATURES
Harvard architecture permits many three simultaneous accesses program data memory On-chip memory including low-cost, high-volume Flash solution On-chip Flash Program Flash Data Flash Boot Flash Program Programmable Boot Flash supports customized boot code field upgrades stored code through variety interfaces (JTAG, CAN, SPI)
AWARD-WINNING DEVELOPMENT ENVIRONMENT
Processor Expert(PE) technology provides rapid
Data
56F801 PERIPHERAL CIRCUIT FEATURES
Pulse Width Modulator (PWM) with outputs, Fault inputs, fault-tolerant design with dead-time insertion; supports both center- edge-aligned modes 12-bit Analog-to-Digital Converters (ADCs), which support simultaneous conversions; modules synchronized general purpose Quad Timers Serial Communication Interface (SCI) Serial Peripheral Interface (SPI) Eleven multiplexed General Purpose (GPIO) pins Computer Operating Properly (COP)/ Watchdog timer dedicated external interrupt pins External reset hardware reset JTAG/OnCEfor unobtrusive, processor speed-independent debugging Software-programmable, Phase Lock Loop-based frequency synthesizer Oscillator flexibility between either external crystal oscillator on-chip relaxation oscillator
application design (RAD) tool that combines easy-touse component-based software application creation with expert knowledge system. CodeWarriorIntegrated Development Environment (IDE) sophisticated tool code navigation, compiling debugging. comprehensive evaluation modules (EVMs) development system cards will support concurrent engineering. Together, CodeWarrior tool suite EVMs create comprehensive, scalable tools solution easy, fast efficient development.
ORDERING INFORMATION
PART
DSP56F801 DSP56F801 DSP56F801
SUPPLY VOLTAGE
3.0-3.6V 3.0-3.6V 3.0-3.6V
PACKAGE TYPE
Low-profile Quad Flat Pack (LQFP) Low-profile Quad Flat Pack (LQFP) Low-profile Quad Flat Pack (LQFP)
COUNT
FREQUENCY (MHz)
ORDER NUMBER
DSP56F801FA80 DSP56F801FA60 SPAK56F801FA80
Motorola stylized Logo registered U.S. Patent Trademark Office. This product incorporates SuperFlash® technology licensed from SST. other product service names property their respective owners. Motorola, Inc. 2003
DSP56F801PB/D

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