Operation Inputs Accept Voltages 3-State Noninverting Outputs Drive Li

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Operation Inputs Accept Voltages 3-State Noninverting Outputs Drive Li

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SN54AC373, SN74AC373 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
Operation Inputs Accept Voltages 3-State Noninverting Outputs Drive Lines Directly Full Parallel Access Loading
SN54AC373 PACKAGE SN74AC373 PACKAGE (TOP VIEW)
description/ordering information
These 8-bit latches feature 3-state outputs designed specifically driving highly capacitive relatively low-impedance loads. devices particularly suitable implementing buffer registers, ports, bidirectional drivers, working registers. eight latches D-type transparent latches. When latch-enable (LE) input high, outputs follow data inputs. When taken low, outputs latched logic levels inputs. buffered output-enable (OE) input used place eight outputs either normal logic state (high logic levels) high-impedance state. high-impedance state, outputs neither load drive lines significantly. high-impedance state increased drive provide capability drive lines bus-organized systems without need interface pullup components.
SN54AC373 PACKAGE (TOP VIEW)
does affect internal operations latches. data retained data entered while outputs high-impedance state. ORDERING INFORMATION
PDIP SOIC -40°C 85°C 40°C SSOP TSSOP CDIP -55°C 125°C LCCC PACKAGE Tube Tube Tape reel Tape reel Tape reel Tape reel Tube Tube Tube ORDERABLE PART NUMBER SN74AC373N SN74AC373DW SN74AC373DWR SN74AC373NSR SN74AC373DBR SN74AC373PWR SNJ54AC373J SNJ54AC373W SNJ54AC373FK TOP-SIDE MARKING SN74AC373N AC373 AC373 AC373 AC373 SNJ54AC373J SNJ54AC373W
SNJ54AC373FK Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package.
Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet.
Copyright 2002, Texas Instruments Incorporated
products compliant MIL-PRF-38535, parameters tested unless otherwise noted. other products, production processing does necessarily include testing parameters.
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters.
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SN54AC373, SN74AC373 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
description/ordering information (continued)
ensure high-impedance state during power power down, should tied through pullup resistor; minimum value resistor determined current-sinking capability driver.
FUNCTION TABLE (each latch) INPUTS OUTPUT
logic diagram (positive logic)
Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, -0.5 Input voltage range, (see Note -0.5 Output voltage range, (see Note -0.5 Input clamp current, VCC) Output clamp current, VCC) Continuous output current, VCC) Continuous current through ±200 Package thermal impedance, (see Note package 70°C/W package 58°C/W package 69°C/W package 60°C/W package 83°C/W Storage temperature range, Tstg -65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD 51-7.
POST OFFICE 655303
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SN54AC373, SN74AC373 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
recommended operating conditions (see Note
SN54AC373 Supply voltage High-level input voltage Low-level input voltage Input voltage Output voltage High-level output current Low-level output current Input transition rise fall rate 4.5V 3.15 3.85 1.35 1.65 SN74AC373 3.15 3.85 1.35 1.65 ns/V UNIT
Operating free-air temperature NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS GND, 2.56 3.86 4.86 0.36 0.36 0.36 ±0.1 ±0.25 25°C SN54AC373 SN74AC373 2.46 3.76 4.76 0.44 0.44 0.44 ±2.5 UNIT
POST OFFICE 655303
DALLAS, TEXAS 75265
SN54AC373, SN74AC373 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
timing requirements over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
25°C Pulse duration, high Setup time, data before Hold time, data after SN54AC373 SN74AC373 UNIT
timing requirements over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
25°C Pulse duration, high Setup time, data before Hold time, data after SN54AC373 SN74AC373 UNIT
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ (INPUT) (OUTPUT) 25°C 13.5 13.0 13.5 12.5 11.5 11.5 12.5 11.5 SN54AC373 16.5 16.5 13.5 SN74AC373 14.5 14.5 12.5 UNIT
switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure
PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ (INPUT) (OUTPUT) 25°C SN54AC373 11.5 11.5 10.5 13.5 10.5 SN74AC373 10.5 10.5 10.5 10.5 12.5 UNIT
operating characteristics, 25°C
PARAMETER Power dissipation capacitance TEST CONDITIONS UNIT
POST OFFICE 655303
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SN54AC373, SN74AC373 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
From Output Under Test (see Note Open TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Open
LOAD CIRCUIT Timing Input Input VOLTAGE WAVEFORMS Data Input VOLTAGE WAVEFORMS
Input tPLH In-Phase Output tPHL Out-of-Phase Output tPHL tPLH VOLTAGE WAVEFORMS
Output Control (low-level enabling) tPZL Output Waveform (see Note tPZH Output Waveform Open (see Note
tPLZ 50%VCC tPHZ
VOLTAGE WAVEFORMS
NOTES: includes probe capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. input pulses supplied generators having following characteristics: MHz, outputs measured time with input transition measurement.
Figure Load Circuit Voltage Waveforms
POST OFFICE 655303
DALLAS, TEXAS 75265
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Operation Inputs Accept Voltages 3-State Noninverting Outputs Drive Li

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