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Operation Inputs Accept Voltages SN54AC32 PACKAGE SN74AC32 PACKAG
Top Searches for this datasheetSN54AC32, SN74AC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES Operation Inputs Accept Voltages SN54AC32 PACKAGE SN74AC32 PACKAGE (TOP VIEW) SN54AC32 PACKAGE (TOP VIEW) internal connection description/ordering information 'AC32 devices quadruple 2-input positive-OR gates. devices perform Boolean function positive logic. ORDERING INFORMATION PDIP SOIC -40°C 85°C 40°C SSOP TSSOP CDIP -55°C 125°C LCCC PACKAGE Tube Tube Tape reel Tape reel Tape reel Tape reel Tube Tube Tube ORDERABLE PART NUMBER SN74AC32N SN74AC32D SN74AC32DR SN74AC32NSR SN74AC32DBR SN74AC32PWR SNJ54AC32J SNJ54AC32W SNJ54AC32FK TOP-SIDE MARKING SN74AC32N AC32 AC32 AC32 AC32 SNJ54AC32J SNJ54AC32W SNJ54AC32FK Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS OUTPUT Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. Copyright 2002, Texas Instruments Incorporated products compliant MIL-PRF-38535, parameters tested unless otherwise noted. other products, production processing does necessarily include testing parameters. PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters. POST OFFICE 655303 DALLAS, TEXAS 75265 SN54AC32, SN74AC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES logic diagram, each gate (positive logic) absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, Input voltage range, (see Note Output voltage range, (see Note Input clamp current, VCC) Output clamp current, VCC) Continuous output current, VCC) Continuous current through Package thermal impedance, (see Note package 86°C/W package 96°C/W package 80°C/W package 76°C/W package 113°C/W Storage temperature range, Tstg 65°C 150°C Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD 51-7. recommended operating conditions (see Note SN54AC32 Supply voltage High-level input voltage 3.15 3.85 1.35 1.65 SN74AC32 3.15 3.85 1.35 1.65 UNIT Low-level input voltage Input voltage Output voltage High-level output current Low-level output current Input transition rise fall rate Operating free-air temperature NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004. POST OFFICE 655303 DALLAS, TEXAS 75265 SN54AC32, SN74AC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS ports GND, 0.002 0.001 0.001 0.36 0.36 0.36 1.65 1.65 2.56 3.86 4.86 25°C SN54AC32 3.85 3.85 0.44 0.44 0.44 SN74AC32 2.46 3.76 4.76 UNIT more than output should tested time, duration test should exceed switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure PARAMETER tPLH tPHL FROM (INPUT) (OUTPUT) 25°C SN54AC32 11.5 SN74AC32 UNIT switching characteristics over recommended operating free-air temperature range, (unless otherwise noted) (see Figure PARAMETER tPLH tPHL FROM (INPUT) (OUTPUT) 25°C SN54AC32 SN74AC32 UNIT operating characteristics, 25°C PARAMETER Power dissipation capacitance TEST CONDITIONS 50pF, UNIT POST OFFICE 655303 DALLAS, TEXAS 75265 SN54AC32, SN74AC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES PARAMETER MEASUREMENT INFORMATION TEST tPLH/tPHL Open Input (see Note tPLH In-Phase Output tPHL Out-of-Phase Output LOAD CIRCUIT tPHL tPLH From Output Under Test (see Note Open VOLTAGE WAVEFORMS NOTES: includes probe capacitance. input pulses supplied generators having following characteristics: MHz, outputs measured time with input transition measurement. Figure Load Circuit Voltage Waveforms POST OFFICE 655303 DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. Customers should obtain latest relevant information before placing orders should verify that such information current complete. products sold subject TI's terms conditions sale supplied time order acknowledgment. warrants performance hardware products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques used extent deems necessary support this warranty. Except where mandated government requirements, testing parameters each product necessarily performed. assumes liability applications assistance customer product design. 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