µPD78F0034A 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION

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µPD78F0034A 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION

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INTEGRATED CIRCUIT
µPD78F0034A
8-BIT SINGLE-CHIP MICROCONTROLLER
DESCRIPTION
µPD78F0034A product µPD780034A Subseries 78K/0 Series, equivalent
µPD780034A with flash memory place internal ROM.
µPD78F0034A incorporates flash memory, which programmed erased while mounted board. Detailed function descriptions provided following user's manuals. sure read them before designing.
µPD780024A, 780034A, 780024AY, 780034AY Subseries User's Manual: Under preparation
78K/0 Series User's Manual Instruction: U12326E
FEATURES
Pin-compatible with mask versions (except pin) Flash memory: KbytesNote Internal high-speed RAM: 1024 bytesNote Supply voltage: Note flash memory internal high-speed capacities changed with memory size switching register (IMS). Remark differences between flash memory mask versions, refer DIFFERENCES BETWEEN µPD78F0034A MASK VERSIONS.
ORDERING INFORMATION
Part Number Package 64-pin plastic shrink (750 mils) 64-pin plastic 64-pin plastic LQFP Internal Flash memory Flash memory Flash memory
µPD78F0034ACW µPD78F0034AGC-AB8 µPD78F0034AGK-8A8
information this document subject change without notice. Before using this document, please confirm that this latest version. devices/types available every country. Please check with local representative availability additional information. Document U14040EJ1V0DS00 (1st edition) Date Published August 1999 CP(K) Printed Japan
1999
µPD78F0034A
78K/0 SERIES LINEUP
products 78K/0 Series listed below. names enclosed boxes subseries names.
Products mass-production Products under development subseries products compatible with bus. Control 100-pin 100-pin 100-pin 100-pin 80-pin 80-pin 80-pin 80-pin 64-pin 64-pin 64-pin 64-pin 64-pin 42/44-pin
PD780058 PD78058F PD78054 PD780065 PD780078 PD780034A PD780024A PD78014H µPD78018F µPD78083 PD78018FY PD78075B PD78078 PD78070A µPD78078Y PD78070AY PD780018AY µPD780058Y PD78058FY PD78054Y µPD780078Y PD780034AY PD780024AY µPD78078 with reduced noise µPD78054 with timer enhanced external interface function
ROM-less version PD78078
µPD78078Y with enhanced serial select functions µPD78054 with enhanced serial reduced noise µPD78054 with reduced noise µPD78018F with UART D/A, enhanced µPD780024A with expanded µPD780034A with timer enhanced serial µPD780024A with enhanced µPD78018F with enhanced serial µPD78018F with reduced noise
Basic subseries control On-chip UART capable low-voltage (1.8 operation
Inverter control 64-pin
µPD780988
On-chip inverter control circuit UART. noise reduced products
drive 100-pin 78K/0 Series 100-pin 80-pin 80-pin 80-pin
PD780208 PD780228 PD780232 PD78044H PD78044F µPD78044F with enhanced I/O, FIP, C/D. Total display outputs: µPD78044H with enhanced I/O, FIP, C/D. Total display outputs:
Panel control. On-chip C/D. Total display outputs:
µPD78044F with N-ch open drain I/O. Total display outputs:
Basic subseries drive. Total display outputs:
drive 100-pin 100-pin 100-pin
PD780308 PD78064B PD78064 PD78064Y PD780308Y µPD78064 with enhanced expanded µPD78064 with reduced noise
Basic subseries drive. On-chip UART
Call supported 80-pin
PD780841
On-chip Call function simple DTMF. noise reduced products
interface supported 100-pin 80-pin 80-pin 80-pin
PD780948 PD78098B µPD780701Y µPD780833Y
On-chip DCAN controller
µPD78054 with IEBuscontroller. noise reduced products
On-chip DCAN/IEBus controller On-chip J1850 (CLASS2) controller
Meter control 100-pin 80-pin 80-pin
PD780958 PD780973 PD780955
industrial meter control On-chip controller/driver automobile meter driving Ultra low-power consumption on-chip UART
Data Sheet U14040EJ1V0DS00
µPD78F0034A
major functional differences among subseries listed below.
Function Subseries Name Control Capacity (time-division UART: (UART: Timer 8-Bit 10-Bit 8-Bit (UART: Serial Interface MIN. External Value Expansion
8-Bit 16-Bit Watch
µPD78075B µPD78078 µPD78070A µPD780058 µPD78058F µPD78054 µPD780065 µPD780078
(UART: (UART: (UART:
µPD780034A µPD780024A µPD78014H µPD78018F µPD78083
Inverter control control
Note
(UART: (UART:
µPD780988 µPD780208 µPD780228 µPD780232 µPD78044H µPD78044F
drive
µPD780308 µPD78064B µPD78064
(time-division UART: (UART:
Call µPD780841 supported µPD70948 interface supported µPD78098B Meter control
(UART:
(UART:
µPD780958 µPD780973 µPD780955
(UART:
(UART:
Note
16-bit timer: channels 10-bit timer: channel
Data Sheet U14040EJ1V0DS00
µPD78F0034A
OVERVIEW FUNCTIONS
Item Internal memory Memory space General-purpose registers Minimum instruction execution time When main system clock selected When subsystem clock selected Instruction Flash memory High-speed KbytesNote Function
1024 bytesNote Kbytes bits registers bits registers banks) On-chip minimum instruction execution time cycle modification function 0.24 µs/0.48 µs/0.95 µs/1.91 µs/3.81 8.38-MHz operation) 32.768-kHz operation) 16-bit operation, multiply/divide bits bits,16 bits bits) manipulation (set, reset, test, Boolean operation) adjust, etc. Total:
ports
CMOS input: CMOS I/O: N-ch open drain (5-V resistance): converter 10-bit resolution channels Operable over wide power supply voltage range: AVDD Serial interface UART mode: channel 3-wire serial mode: channels 16-bit timer/event counter: 8-bit timer/event counter: Watch timer: Watchdog timer: channel channels channel channel
Timer
Timer outputs Clock output
(8-bit output capable: 65.5 kHz, kHz, kHz, kHz, 1.05 MHz, 2.10 MHz, 4.19 MHz, 8.38 8.38-MHz operation with main system clock) 32.768 32.768-kHz operation with subsystem clock) 1.02 kHz, 2.05 kHz, 4.10 kHz, 8.19 8.38-MHz operation with main system clock) Maskable Internal: External: Internal: Internal: External: +85°C 64-pin plastic shrink (750 mils) 64-pin plastic 64-pin plastic LQFP
Buzzer output Vectored interrupt sources
Non-maskable Software Test inputs
Supply voltage Operating ambient temperature Package
Note
capacities flash memory internal high-speed changed with memory size switching register (IMS).
Data Sheet U14040EJ1V0DS00
µPD78F0034A
CONFIGURATION (TOP VIEW)
64-pin plastic shrink (750 mils)
µPD78F0034ACW
P40/AD0 P41/AD1 P42/AD2 P43/AD3 P44/AD4 P45/AD5 P46/AD6 P47/AD7 P50/A8 P51/A9 P52/A10 P53/A11 P54/A12 P55/A13 P56/A14 P57/A15 VSS0 VDD0 P34/SI31 P35/SO31 P36/SCK31 P20/SI30 P21/SO30 P22/SCK30 P23/RxD0 P24/TxD0 P25/ASCK0 VDD1
P67/ASTB P66/WAIT P65/WR P64/RD P75/BUZ P74/PCL P73/TI51/TO51 P72/TI50/TO50 P71/TI01 P70/TI00/TO0 P03/INTP3/ADTRG P02/INTP2 P01/INTP1 P00/INTP0 VSS1 RESET AVDD AVREF P10/ANI0 P11/ANI1 P12/ANI2 P13/ANI3 P14/ANI4 P15/ANI5 P16/ANI6 P17/ANI7 AVSS
Cautions Connect directly VSS0 VSS1 normal operation mode. Connect AVSS VSS0. Remark When µPD78F0034A used application fields that require reduction noise generated from inside microcontroller, implementation noise reduction measures, such supplying voltage VDD0 VDD1 individually connecting VSS0 VSS1 different ground lines, recommended.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
64-pin plastic
µPD78F0034AGC-AB8
64-pin plastic LQFP
µPD78F0034AGK-8A8
P73/TI51/TO51 P72/TI50/TO50
P67/ASTB
P66/WAIT
P75/BUZ
P47/AD7
P46/AD6
P45/AD5
P44/AD4
P43/AD3
P42/AD2
P41/AD1
P40/AD0
P50/A8 P51/A9 P52/A10 P53/A11 P54/A12 P55/A13 P56/A14 P57/A15 VSS0 VDD0 P34/SI31 P35/SO31
P74/PCL
P65/WR
P64/RD
P71/TI01 P70/TI00/TO0 P03/INTP3/ADTRG P02/INTP2 P01/INTP1 P00/INTP0 VSS1 RESET AVDD AVREF P10/ANI0
P17/ANI7
P16/ANI6
P15/ANI5
P14/ANI4
P13/ANI3
P12/ANI2
P23/RxD0
P36/SCK31
P21/SO30
P22/SCK30
P24/TxD0
P25/ASCK0
Cautions Connect directly VSS0 VSS1 normal operation mode. Connect AVSS VSS0. Remark When µPD78F0034A used application fields that require reduction noise generated from inside microcontroller, implementation noise reduction measures, such supplying voltage VDD0 VDD1 individually connecting VSS0 VSS1 different ground lines, recommended.
Data Sheet U14040EJ1V0DS00
P11/ANI1
P20/SI30
VDD1
AVSS
µPD78F0034A
A15: AD7: ADTRG: ANI0 ANI7: ASCK0: ASTB: AVDD: AVREF: AVSS: BUZ: INTP0 INTP3: P03: P17: P25: P36: P47: P57: P67: Address Address/Data Trigger Input Analog Input Asynchronous Serial Clock Address Strobe Analog Power Supply Analog Reference Voltage Analog Ground Buzzer Clock External Interrupt Input Port Port Port Port Port Port Port P75: PCL: RESET: RxD0: SCK30, SCK31: SI30, SI31: SO30, SO31: TO0, TO50, TO51: TxD0: VDD0, VDD1: VPP: VSS0, VSS1: WAIT: XT1, XT2: Port Programmable Clock Read Strobe Reset Receive Data Serial Clock Serial Input Serial Output Timer Output Transmit Data Power Supply Programming Power Supply Ground Wait Write Strobe Crystal (Main System Clock) Crystal (Subsystem Clock)
TI00, TI01, TI50, TI51: Timer Input
Data Sheet U14040EJ1V0DS00
µPD78F0034A
BLOCK DIAGRAM
TI00/TO0/P70 TI01/P71 TI50/TO50/P72 TI51/TO51/P73
16-BIT TIMER/ EVENT COUNTER 8-BIT TIMER/ EVENT COUNTER50 8-BIT TIMER/ EVENT COUNTER51 WATCHDOG TIMER WATCH TIMER FLASH MEMORY Kbytes)
PORT0
PORT1
PORT2
PORT3
78K/0 CORE
PORT4
SI30/P20 SO30/P21 SCK30/P22 SI31/P34 SO31/P35 SCK31/P36 RxD0/P23 TxD0/P24 ASCK0/P25 ANI0/P10 ANI7/P17 AVDD AVSS AVREF INTP0/P00 INTP3/P03 BUZ/P75 PCL/P74
SERIAL INTERFACE30
PORT5
PORT6 SERIAL INTERFACE31 (1024 Bytes) UART0
PORT7
AD0/P40 AD7/P47 A8/P50 A15/P57 EXTERNAL ACCESS RD/P64 WR/P65 WAIT/P66 ASTB/P67
CONVERTER
INTERRUPT CONTROL BUZZER OUTPUT CLOCK OUTPUT CONTROL VDD0 VDD1 VSS0 VSS1 SYSTEM CONTROL RESET
Data Sheet U14040EJ1V0DS00
µPD78F0034A
CONTENTS
DIFFERENCES BETWEEN µPD78F0034A MASK VERSIONS FUNCTIONS
Port Pins Non-Port Pins Circuits Recommended Connection Unused Pins
MEMORY SIZE SWITCHING REGISTER (IMS) FLASH MEMORY PROGRAMMING
Selection Communication Mode Flash Memory Programming Functions Connection Flashpro Flashpro
ELECTRICAL SPECIFICATIONS PACKAGE DRAWINGS RECOMMENDED SOLDERING CONDITIONS APPENDIX DEVELOPMENT TOOLS APPENDIX RELATED DOCUMENTS
Data Sheet U14040EJ1V0DS00
µPD78F0034A
DIFFERENCES BETWEEN µPD78F0034A MASK VERSIONS
µPD78F0034A product provided with flash memory which enables writing, erasing, rewriting programs with device mounted target system. functions µPD78F0034A (except functions specified flash memory) made same those mask versions setting memory size switching register (IMS). Table shows differences between flash memory (µPD78F0034A) mask versions. Table 1-1. Differences Between µPD78F0034A Mask Versions
Item
µPD78F0034A
Mask Versions
µPD780034A Subseries
Internal structure Internal capacity Flash memory Kbytes Mask
µPD780024A SubseriesNote
µPD780031A: µPD780032A: µPD780033A: µPD780034A: µPD780031A: µPD780032A: µPD780033A: µPD780034A:
Kbytes Kbytes Kbytes Kbytes bytes bytes 1024 bytes 1024 bytes
µPD780021A: µPD780022A: µPD780023A: µPD780024A: µPD780021A: µPD780022A: µPD780023A: µPD780024A:
bits
Kbytes Kbytes Kbytes Kbytes bytes bytes 1024 bytes 1024 bytes
Internal high-speed capacity
1024 bytes
converter resolution Mask option specification on-chip pull-up resistor pins Electrical specifications, recommended soldering conditions
bits available Available
provided Provided
Provided provided
Refer data sheet individual products.
Note
µPD78F0034A used flash memory version µPD780024A Subseries.
Caution There differences noise immunity noise radiation between flash memory mask versions. When pre-producing application with flash memory version then mass producing with mask version, sure conduct sufficient evaluations commercial samples (CS) (not engineering samples (ES)) mask versions.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
FUNCTIONS
Port Pins (1/2)
Name Function After Reset Alternate Function INTP0 INTP1 INTP2 INTP3/ADTRG Input Port 8-bit input only port. Port 6-bit input/output port. Input/output specified 1-bit units. on-chip pull-up resistor specified means software. Input ANI0 ANI7
Port 4-bit input/output port. Input/output specified 1-bit units. on-chip pull-up resistor specified means software.
Input
Input
SI30 SO30 SCK30 RxD0 TxD0 ASCK0
Port 7-bit input/output port. Input/output specified 1-bit units.
N-ch open drain input/output port. LEDs driven directly.
Input
on-chip pull-up resistor specified means software.
SI31 SO31 SCK31
Port 8-bit input/output port. Input/output specified 1-bit units. on-chip pull-up resistor specified means software. Interrupt request flag KRIF falling edge detection. Port 8-bit input/output port. LEDs driven directly. Input/output specified 1-bit units. on-chip pull-up resistor specified means software. Port 4-bit input/output port. Input/output specified 1-bit units. on-chip pull-up resistor specified means software.
Input
Input
Input
WAIT ASTB
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Port Pins (2/2)
Name Function After Reset Alternate Function TI00/TO0 TI01 TI50/TO50 TI51/TO51
Port 6-bit input/output port. Input/output specified 1-bit units. on-chip pull-up resistor specified means software.
Input
Non-Port Pins (1/2)
Name Function After Reset Alternate Function P03/ADTRG Input Serial interface serial data input. Input Output Serial interface serial data output. Input Serial interface serial clock input/output. Input Input Output Input Input Serial data input asynchronous serial interface. Serial data output asynchronous serial interface. Serial clock input asynchronous serial interface. External count clock input 16-bit timer (TM0). Capture trigger signal input capture register (CR01). Capture trigger signal input capture register (CR00). External count clock input 8-bit timer (TM50). External count clock input 8-bit timer (TM51). Output 16-bit timer (TM0) output. 8-bit timer (TM50) output (shared with 8-bit output). 8-bit timer (TM51) output (shared with 8-bit output). Output Output Output Output Clock output (for trimming main system clock subsystem clock). Buzzer output. Lower address/data extending memory externally. Higher address extending memory externally. Strobe signal output read operation external memory. Strobe signal output write operation external memory. Input Output Inserting wait accessing external memory. Strobe output which externally latches address information output ports access external memory. Input Input Input Input Input Input Input Input Input Input Input Input Input P70/TO0
INTP0 INTP1 INTP2 INTP3 SI30 SI31 SO30 SO31 SCK30 SCK31 RxD0 TxD0 ASCK0 TI00
Input
External interrupt request input which valid edge (rising edge, falling edge, both rising falling edges) specified.
Input
TI01 TI50 TI51 TO50 TO51 WAIT ASTB
P72/TO50 P73/TO51 P70/TI00 P72/TI50 P73/TI51
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Non-Port Pins (2/2)
Name Function After Reset Alternate Function P03/INTP3
ANI0 ANI7 ADTRG AVREF AVDD
Input Input Input
converter analog input. converter trigger signal input. converter reference voltage input. converter analog power supply. voltage equal VDD0 VDD1. converter ground potential. voltage equal VSS0 VSS1. System reset input. Connecting crystal resonator main system clock oscillation.
Input Input
AVSS
RESET VDD0 VSS0 VDD1 VSS1
Input Input Input
Connecting crystal resonator subsystem clock oscillation.
Positive power supply voltage ports. Ground potential ports. Positive power supply (except ports). Ground potential (except ports). Applying high-voltage program write/verify. Connect directly VSS0 VSS1 normal operation mode.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Circuits Recommended Connection Unused Pins input/output circuit type each recommended connection unused pins shown Table 2-1. input/output configuration each type, refer Figure Table 2-1. Types Input/Output Circuits
Name P00/INTP0 P01/INTP1 P02/INTP2 P03/INTP3/ADTRG P10/ANI0 P17/ANI7 P20/SI30 P21/SO30 P22/SCK30 P23/RxD0 P24/TxD0 P25/ASCK0 P30, P32, P34/SI31 P35/SO31 P36/SCK31 P40/AD0 P47/AD7 P50/A8 P57/A15 P64/RD P65/WR P66/WAIT P67/ASTB P70/TI00/TO0 P71/TI01 P72/TI50/TO50 P73/TI51/TO51 P74/PCL P75/BUZ RESET AVDD AVREF AVSS Connect directly VSS0 VSS1. Input Connect VDD0. Leave open. Connect VDD0. Connect VSS0. 13-P 13-R Input/output Input/output Input/output Independently connect VDD0 resistor. Independently connect VDD0 VSS0 resistor. Independently connect VDD0 VSS0 resistor. Input/output Independently connect VDD0 resistor. Input Input/output Independently connect VDD0 VSS0 resistor. Input/Output Circuit Type Input Recommended Connection Unused Pins Independently connect VSS0 resistor.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Figure 2-1. Input/Output Circuits
TYPE
TYPE 13-R IN/OUT Data Output disable N-ch
VSS0 Schmitt-triggered input with hysteresis characteristics
TYPE
VDD0
TYPE Feedback cut-off
Pullup enable Data
P-ch VDD0 P-ch IN/OUT
P-ch
Output disable Input enable TYPE
N-ch VSS0
TYPE VDD0 P-ch P-ch VDD0 P-ch IN/OUT Comparator
Pullup enable Data
N-ch VSS0 VREF (threshold voltage)
Output disable
N-ch VSS0
Input enable
TYPE 13-P Data Output disable N-ch VSS0
IN/OUT
Input enable
Data Sheet U14040EJ1V0DS00
µPD78F0034A
MEMORY SIZE SWITCHING REGISTER (IMS)
register that software used specify part internal memory that used. setting IMS, internal memory µPD78F0034A mapped identically that mask version. with 8-bit memory manipulation instruction. RESET input sets CFH. Caution initial value setting disabled (CFH). sure value target mask version moment initial setting. Figure 3-1. Format Memory Size Switching Register
Address FFF0H After reset
RAM2 RAM1 RAM0
ROM3 ROM2 ROM1 ROM0
ROM3 ROM2 ROM1 ROM0 Selection Internal Capacity Kbytes Kbytes Kbytes Kbytes Setting prohibited
Other than above
RAM2 RAM1 RAM0 Selection Internal High-Speed Capacity bytes 1024 bytes Setting prohibited
Other than above
Table shows value make memory mapping same those mask versions. Table 3-1. Value Memory Size Switching Register
Target Mask Versions Value
µPD780031A µPD780032A µPD780033A µPD780034A
Data Sheet U14040EJ1V0DS00
µPD78F0034A
FLASH MEMORY PROGRAMMING
Writing flash memory performed without removing memory from target system board programming). Writing performed with dedicated flash programmer (Flashpro (model No.: FL-PR2) Flashpro (model No.: FL-PR3 PG-FP3)) connected host machine target system. Writing flash memory also performed using flash memory writing adapter connected Flashpro Flashpro III. Remark FL-PR2 FL-PR3 products Naito Densei Machida Mfg. Co., Ltd. Selection Communication Mode Writing flash memory performed using Flashpro Flashpro serial communication. Select communication modes Table 4-1. selection communication mode made using format shown Figure 4-1. Each communication mode selected number pulses shown Table 4-1. Table 4-1. List Communication Mode
Communication Mode 3-wire serial Channels Used SI30/P20 SO30/P21 SCK30/P22 SI31/P34 SO31/P35 SCK31/P36 UART RxD0/P23 TxD0/P24 P72/TI50/TO50 (serial clock input) P71/TI01 (serial data output) P70/TI00/TO0 (serial data input) Pulses
Pseudo 3-wire serial
Caution sure select communication mode using number pulses shown Table 4-1. Figure 4-1. Format Communication Mode Selection
pulses RESET Flash write mode
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Flash Memory Programming Functions Operations such writing flash memory performed various command/data transmission reception operations according selected communication mode. Table shows major functions flash memory programming. Table 4-2. Major Functions Flash Memory Programming
Function Reset Batch verify Batch erase Batch blank check High-speed write Description Used stop write operation detect transmission cycle. Compares entire memory contents with input data. Erases entire memory contents. Checks deletion status entire memory. Performs write flash memory based write start address number data written (number bytes). Performs continuous write based information input with high-speed write operation. Used confirm current operating mode operation end. Sets frequency resonator. Sets memory erase time. Outputs device name memory capacity, device block information.
Continuous write Status Oscillation frequency setting Erase time setting Silicon signature read
Connection Flashpro Flashpro connection Flashpro Flashpro µPD78F0034A differs according communication mode (3-wire serial I/O, UART, pseudo 3-wire serial I/O). connection each communication mode shown Figures 4-2, 4-3, 4-4, respectively. Figure 4-2. Connection Flashpro Flashpro 3-Wire Serial Mode
Flashpro Flashpro RESET RESET SCK3n SI3n SO3n
PD78F0034A
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Figure 4-3. Connection Flashpro Flashpro UART Mode
Flashpro Flashpro RESET
PD78F0034A
RESET RxD0 TxD0
Figure 4-4. Connection Flashpro Flashpro Pseudo 3-Wire Serial Mode
Flashpro Flashpro RESET
PD78F0034A
RESET
(serial clock input) (serial data input)
(serial data output)
Data Sheet U14040EJ1V0DS00
µPD78F0034A
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings 25°C)
Parameter Supply voltage Symbol AVDD AVREF AVSS Input voltage P03, P17,P20 P25, P36, P47, P57, P67, P75, XT1, XT2, RESET N-ch open drain Test Conditions Ratings -0.3 +6.5 -0.3 +10.5 -0.3 -0.3 0.3Note 0.3Note Unit
-0.3 +0.3 -0.3 0.3Note
Output voltage Analog input voltage
-0.3 +6.5 -0.3 0.3Note 0.3Note
Analog input
AVSS -0.3 AVREF -0.3 0.3Note
Output current, high
Total P03, P47, P57, P67, Total P25,
Output current,
P03, P25, P36, P47, P67, P33, Total P03, P47, P67, Total Total Total
Operating ambient tempature Storage temperature
Tstg
+125
Note
rating should less.
Caution Product quality suffer absolute maximum rating exceeded even momentarily parameter. That absolute maximum ratings rated values which product verge suffering physical damage, therefore product must used under conditions that ensure that absolute maximum ratings exceeded.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Capacitance 25°C,
Parameter Input capacitance capacitance Symbol Test Conditions Pins other than measured pins returned Pins other than measured pins returned P03, P25, P36, P47, P57, P67, P75, MIN. TYP. MAX. Unit
Remark Unless specified otherwise, characteristics alternate-function pins same those port pins. Main System Clock Oscillation Circuit Characteristics 85°C,
Resonator Ceramic resonator Recommended Circuit
Parameter Oscillation frequency (fX)Note Oscillation stabilization timeNote Oscillation frequency (fX)Note Oscillation stabilization timeNote input frequency (fX)Note input high-/low-level width (tXH, tXL)
Test Conditions
MIN.
TYP.
MAX. 8.38
Unit
After reaches oscillation voltage range MIN.
Crystal resonator
8.38
External clock
8.38
PD74HCU04
Notes Indicates only oscillation circuit characteristics. Refer Characteristics instruction execution time. Time required stabilize oscillation after reset STOP mode release. Cautions When using main system clock oscillator, wire follows area enclosed broken lines above figures avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near signal line through which high fluctuating current flows. Always keep ground point oscillator capacitor same potential VSS1. ground capacitor ground pattern through which high current flows. fetch signals from oscillator. When main system clock stopped system operated subsystem clock, subsystem clock should switched again main system clock after oscillation stabilization time secured program.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Subsystem Clock Oscillation Circuit Characteristics +85°C,
Resonator Crystal resonator Recommended Circuit
XT1VPP
Parameter Oscillation frequency (fXT)Note Oscillation stabilization timeNote
Test Conditions
MIN.
TYP. 32.768
MAX.
Unit
External clock
input frequency (fXT)Note input high-/low-level width (tXTH, tXTL)
38.5
µPD74HCU04
Notes Indicates only oscillation circuit characteristics. Refer Characteristics instruction execution time. Time required stabilize oscillation after reaches oscillator voltage MIN. Cautions When using subsystem clock oscillator, wire follows area enclosed broken line above figures avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near signal line through which high fluctuating current flows. Always keep ground point oscillator same potential VSS1. ground capacitor ground pattern which high current flows. fetch signals from oscillator. subsystem clock oscillator designed low-amplitude circuit reducing current consumption, more prone malfunction noise than main system clock oscillator. Particular care therefore required with wiring method when subsystem clock used.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Recommended Oscillator Constant Main System Clock: Ceramic Resonator +85°C)
Manufacturer Part Number Frequency (MHz) Murata Mfg. Co., Ltd. CSB1000J CSA2.00MG040 CST2.00MG040 CSA3.58MG CST3.58MGW CSA3.58MG093 CST3.58MGW093 CSA4.19MG CST4.19MGW CSA4.19MG093 CST4.19MGW093 CSA5.00MG CST5.00MGW CSA5.00MG093 CST5.00MGW093 CSA8.00MTZ CST8.00MTW CSA8.00MTZ093 CST8.00MTW093 CSA8.38MTZ CST8.38MTW CSA8.38MTZ093 CST8.38MTW093 CCR3.58MC3 CCR4.19MC3 CCR5.0MC3 CCR8.0MC5 CCR8.38MC5 1.00 2.00 2.00 3.58 3.58 3.58 3.58 4.19 4.19 4.19 4.19 5.00 5.00 5.00 5.00 8.00 8.00 8.00 8.00 8.38 8.38 8.38 8.38 3.58 4.19 5.00 8.00 8.38 Recommended Circuit Constant (pF) On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip (pF) On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip On-chip Oscillation Voltage Range MIN. MAX.
Caution oscillator constant oscillation voltage range indicate conditions stable oscillation. Oscillation frequency precision guaranteed. applications requiring oscillation frequency precision, oscillation frequency must adjusted implementation circuit. details please contact directly manufacturer resonator will use.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Characteristics +85°C,
Parameter Output current, high Output current, Symbol pins P03, P25, P36, P47, P67, P33, Total P03, P47, P67, Total Total Total Input voltage, high VIH1 P17, P21, P24, P35, P47, P57, P67, P74, P03, P20, P22, P23, P25, P34, P36, P73, RESET (N-ch open-drain) 0.85 VDD-0.5 VDD-0.2 VIH5 XT1, Input voltage, VIL1 P17, P21, P24, P35, P47, P57, P67, P74, P03, P20, P22, P23, P25, P34, P36, P73, RESET VIL4 VIL5 XT1, Output voltage, high Output voltage, VOH1 -100 VOL1 P03, P25, P36, P47, P67, VOL2 VDD-1.0 VDD-0.5 Conditions MIN. TYP. MAX. 0.15 Unit
VIH2
VIH3
VIH4
VIL2
VIL3
Remark Unless specified otherwise, characteristics alternate-function pins same those port pins.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Characteristics +85°C,
Parameter Input leakage current, high Symbol ILIH1 Conditions P03, P17, P25, P36, P47, P57, P67, P75, RESET XT1, P03, P17, P25, P36, P47, P57, P67, P75, RESET XT1, VOUT MIN. TYP. MAX. Unit
ILIH2 ILIH3 Input leakage current, ILIL1
ILIL2 ILIL3 Output leakage current, Output leakage current, Software pullup resistor ILOH
ILOL
VOUT
P03, P25, P36, P47, P57, P67,
Remark Unless specified otherwise, characteristics alternate-function pins same those port pins
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Characteristics +85°C,
Parameter Supply currentNote Symbol IDD1 8.38-MHz crystal oscillation operating mode 5.00-MHz crystal oscillation operation mode 10%Note %Note Conditions %Note converter stopped converter operating converter stopped converter operating converter stopped converter operating IDD2 8.38-MHz crystal oscillation HALT mode 5.00-MHz crystal oscillation HALT mode %Note %Note %Note Peripheral functions stopped Peripheral functions operating Peripheral functions stopped Peripheral functions operating Peripheral functions stopped Peripheral functions operating IDD3 32.768-kHz crystal oscillation operating modeNote IDD4 32.768-kHz crystal oscillation HALT modeNote IDD5 STOP mode When feed-back resistor used 10%Note 10%Note 10%Note 10%Note 10%Note 10%Note 10%Note 10%Note 10%Note 0.05 0.05 MIN. TYP. MAX. 10.5 11.5 Unit
Notes Refers total current flowing through internal power supply (VDD0 VDD1). Includes peripheral operating current (however, current flowing through pull-up resistors ports AVREF included). When processor clock control register (PCC) 00H. When 02H. When main system clock stopped.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Characteristics Basic operation +85°C,
Parameter Cycle time (Min. instruction execution time) Operating subsystem clock TI00, TI01 input high-/low-level width tTIH0, tTIL0 Symbol Operating main system clock Test Conditions MIN. 0.24 103.9Note 2/fsam 0.1Note2 2/fsam 0.2Note2 2/fsam 0.5Note2 TI50, TI51 input frequency TI50, TI51 input high-/low-level width Interrupt request input high-/low -level width RESET low-level width tTIH5, tTIL5 fTI5 tINTH, tINTL INTP0 INTP3, tRSL TYP. MAX. Unit
Notes Value when using external clock. When using crystal resonator, value becomes (MIN.). Selection fsam fX/4, fX/64 possible using bits (PRM00, PRM01) prescaler mode register (PRM0). However, TI00 valid edge selected count clock, value becomes fsam fX/8.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
(main system clock)
16.0 10.0
Cycle time
Operation Guaranteed Range
0.24
Supply voltage
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Read/write operation +85°C, (1/3)
Parameter ASTB high-level width Address setup time Address hold time Data input time from address Symbol tASTH tADS tADH tADD1 tADD2 Address output time from Data input time from tRDAD tRDD1 tRDD2 Read data hold time low-level width tRDH tRDL1 tRDL2 WAIT input time from tRDWT1 tRDWT2 WAIT input time from WAIT low-level width Write data setup time Write data hold time low-level width delay time from ASTB delay time from ASTB ASTB delay time from external fetch Address hold time from external fetch Write data output time from Write data output time from Address hold time from delay time from WAIT delay time from WAIT tRDWD tWRWD tWRADH tWTRD tWTWR 0.8tCY 0.8tCY 0.8tCY 1.2tCY 2.5tCY 2.5tCY tWRWT tWTL tWDS tWDH tWRL1 tASTRD tASTWR tRDAST (0.5 n)tCY (1.5 2n)tCY 2tCY 0.8tCY 1.2tCY (1.5 2n)tCY (2.5 2n)tCY 2n)tCY Test Conditions MIN. 0.3tCY 2n)tCY 2n)tCY 2n)tCY 2n)tCY MAX. Unit
tRDADH
0.8tCY
1.2tCY
Remarks TCY/4 indicates number waits. load capacitance AD7, A15, WAIT, ASTB pins.)
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Read/write operation +85°C, (2/3)
Parameter ASTB high-level width Address setup time Address hold time Data input time from address Symbol tASTH tADS tADH tADD1 tADD2 Address output time from Data input time from tRDAD tRDD1 tRDD2 Read data hold time low-level width tRDH tRDL1 tRDL2 WAIT input time from tRDWT1 tRDWT2 WAIT input time from WAIT low-level width Write data setup time Write data hold time low-level width delay time from ASTB delay time from ASTB ASTB delay time from external fetch Address hold time from external fetch Write data output time from Write data output time from Address hold time from delay time from WAIT delay time from WAIT tRDWD tWRWD tWRADH tWTRD tWTWR 0.8tCY 0.5tCY 0.5tCY 1.2tCY 2.5tCY 2.5tCY tWRWT tWTL tWDS tWDH tWRL1 tASTRD tASTWR tRDAST (0.5 2n)tCY (1.5 2n)tCY 2tCY 0.8tCY 1.2tCY (1.5 2n)tCY (2.5 2n)tCY 2n)tCY Test Conditions MIN. 0.3tCY 2n)tCY 2n)tCY 2n)tCY 2n)tCY MAX. Unit
tRDADH
0.8tCY
1.2tCY
Remarks TCY/4 indicates number waits. load capacitance AD7, A15, WAIT, ASTB pins.)
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Read/write operation +85°C, (3/3)
Parameter ASTB high-level width Address setup time Address hold time Data input time from address Symbol tASTH tADS tADH tADD1 tADD2 Address output time from Data input time from tRDAD tRDD1 tRDD2 Read data hold time low-level width tRDH tRDL1 tRDL2 WAIT input time from tRDWT1 tRDWT2 WAIT input time from WAIT low-level width Write data setup time Write data hold time low-level width delay time from ASTB delay time from ASTB ASTB delay time from external fetch Address hold time from external fetch Write data output time from Write data output time from Address hold time from delay time from WAIT delay time from WAIT tRDWD tWRWD tWRADH tWTRD tWTWR 0.8tCY 0.5tCY 0.5tCY 1.2tCY 2.5tCY 2.5tCY tWRWT tWTL tWDS tWDH tWRL1 tASTRD tASTWR tRDAST (0.5 2n)tCY (1.5 2n)tCY 2tCY 0.8tCY 1.2tCY (1.5 2n)tCY (2.5 2n)tCY 2n)tCY Test Conditions MIN. 0.3tCY 2n)tCY 2n)tCY 2n)tCY 2n)tCY MAX. Unit
tRDADH
0.8tCY
1.2tCY
Remarks TCY/4 indicates number waits. load capacitance AD7, A15, WAIT, ASTB pins.)
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Serial interface +85°C, 3-wire serial mode (SCK30 SCK31. internal clock output)
Parameter SCK30, SCK31 cycle time Symbol tKCY1 Conditions MIN. 1600 3200 SCK30, SCK31 high-/low-level width SI30, SI31 setup time SCK30, SCK31) tKH1 tKL1 tSIK1 tKCY1/2-50 tKCY1/2-100 SI30,SI31 hold time (from SCK30, SCK31) S030, SO31 output delay time from SCK30, SCK31 tKSI1 pFNote TYP. MAX. Unit
tKSO1
Note
load capacitance SCK30, SCK31, SO30, SO31 output lines.
3-wire serial mode (SCK30, SCK31. external clock input)
Parameter SCK30, SCK31 cycle time Symbol tKCY2 Conditions MIN. 1600 3200 SCK30, SCK31 high-/low-level width tKH2 tKL2 1600 SI30, SI31 setup time SCK30, SCK31) SI30, SI31 hold time (from SCK30, SCK31) SO30, SO31 output delay time from SCK30, SCK31 tSIK2 TYP. MAX. Unit
tKSI2 pFNote
tKSO2
Note
load capacitance SO30 SO31 output lines.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
UART mode (Dedicated baud rate generator output)
Parameter Transfer rate Symbol Conditions MIN. TYP. MAX. 131031 78125 39063 Unit
UART mode (External clock input)
Parameter ASCK0 cycle time Symbol tKCY3 Conditions MIN. 1600 3200 ASCK0 high-/low-level width tKH3, tKL3 1600 Transfer rate 39063 19531 9766 TYP. MAX. Unit
UART mode (Infrared data transfer mode)
Parameter Transfer rate rate allowable error Output pulse width Input pulse width Symbol 4/fX Conditions MIN. MAX. 131031 ±0.87 0.24/fbrNote Unit
Note
fbr: baud rate
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Timing Test Point (Excluding Input)
Test points
Clock Timing
1/fX
VIH4 (MIN.) VIL4 (MAX.)
input
1/fXT
tXTL input
tXTH VIH5 (MIN.) VIL5 (MAX.)
Timing
tTIL0
tTIH0
TI00, TI01
1/fTI5 tTIL5 tTIH5
TI50, TI51
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Read/Write Operation External Fetch Wait):
Higher 8-bit address tADD1
Lower 8-bit address tADS tASTH tADH
Hi-Z tRDAD tRDD1
Instruction code tRDADH tRDAST
ASTB
tASTRD tRDL1 tRDH
External Fetch (Wait Insertion):
Higher 8-bit address tADD1
Lower 8-bit address tADS tASTH tADH tRDAD
Hi-Z tRDD1
Instruction code tRDADH tRDAST
ASTB
tASTRD WAIT tRDWT1 tWTL tWTRD tRDL1 tRDH
Data Sheet U14040EJ1V0DS00
µPD78F0034A
External Data Access Wait):
tADD2 Lower 8-bit address tADS tASTH ASTB tADH Hi-Z tRDAD tRDD2
Higher 8-bit address
Read data
Write data
Hi-Z
tRDH
tASTRD tASTWR tWRL1 tRDL2 tRDWD tWRWD tWDS tWDH tWRADH
External Data Access (Wait Insertion):
tADD2
Lower 8-bit address
Higher 8-bit address Hi-Z tRDAD tRDH tRDD2 tASTRD Hi-Z
Read data
Write data
tADS tADH tASTH ASTB
tRDL2 tASTWR WAIT tRDWT2 tWTL tWTRD
tRDWD tWRWD
tWDS
tWDH
tWRL1
tWRADH
tWTL tWRWT tWTWR
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Serial Transfer Timing 3-Wire Serial Mode:
tKCYm tKLm tKHm
SCK30, SCK31 tSIKm tKSIm
SI30, SI31 tKSOm
Input data
SO30, SO31
Output data
UART Mode (External Clock Input):
KCY3
ASCK0
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Converter Characteristics +85°C, AVDD AVREF AVSS
Parameter Resolution Overall errorNote AVREF AVREF AVREF Conversion time tCONV AVREF AVREF AVREF Zero-scale offsetNote AVREF AVREF AVREF Full-scale offsetNote AVREF AVREF AVREF Non-linearity errorNote AVREF AVREF AVREF Differential non-linearity error AVREF AVREF AVREF Analog input voltage Reference voltage Resistance between AVREF AVSS VIAN AVREF RREF conversion performed Symbol Conditions MIN. TYP. ±0.2 ±0.3 ±0.6 MAX. ±0.4 ±0.6 ±1.2 ±0.4 ±0.6 ±1.2 ±0.4 ±0.6 ±1.2 ±2.5 ±4.5 ±8.5 ±1.5 ±2.0 ±3.5 AVREF AVDD Unit %FSR %FSR %FSR
%FSR %FSR %FSR %FSR %FSR %FSR
Note
Excluding quantization error (±1/2 LSB). Shown percentage full scale value.
Remark When µPD78F0034A used 8-bit resolution converter, specifications same µPD780024A Subseries converter. Data Memory STOP Mode Supply Voltage Data Retention Characteristics +85°C)
Parameter Data retention supply voltage Data retention supply current Symbol VDDDR IDDDR VDDDR Subsystem clock unassigned feed-back resistor disconnected Release RESET Release interrupt request 217/fx Note Test Conditions MIN. TYP. MAX. Unit
Release signal time Oscillation stabilization wait time
tSREL tWAIT
Note
Selection 212/fX 214/fX 217/fX possible using bits (OSTS0 OSTS2) oscillation stabilization time select register (OSTS).
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Data Retention Timing (STOP Mode Release RESET)
Internal reset operation HALT mode STOP mode Operating mode
Data retention mode
STOP instruction execution RESET
VDDDR tSREL
tWAIT
Data Retention Timing (Standby Release Signal: STOP Mode Release Interrupt Request Signal)
HALT mode STOP mode Operating mode
Data retention mode
STOP instruction execution Standby release signal (Interrupt request)
VDDDR tSREL
tWAIT
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Interrupt Request Input Timing
tINTL
tINTH
INTP0 INTP2
tINTL
INTP3
RESET Input Timing
tRSL
RESET
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Flash Memory Programming Characteristics (VDD 10.3 Basic characteristics
Parameter Operating frequency Symbol Conditions Supply voltage VPPL VPPH supply current supply current Write time (per byte) Number rewrites Erase time Programming temperature TWRT CWRT TERASE TPRG =10.0 Operation voltage when writing Upon low-level detection Upon high-level detection Upon high-voltage detection MIN. 9.7Note 10.0Note TYP. MAX. 8.38 10.3Note 20Note Unit
Times
Notes product grades 10.2 (MIN.), 10.3 (TYP.), 10.4 (MAX.), applied. product specification number (MAX.). Serial write operation characteristics
Parameter time time from RESET time from count start time from RESET Count execution time counter high-level width counter low-level width counter noise elimination width Symbol tPSRON tDRPSR tPSRRF tRFCF tCOUNT tNFW Conditions high voltage high voltage high voltage MIN. TYP. MAX. Unit
Flash Memory Write Mode Timing
VPPH VPPL tPSRON tPSRRF tCOUNT RESET (input) tDRPSR tRFCF
Data Sheet U14040EJ1V0DS00
µPD78F0034A
PACKAGE DRAWINGS
PLASTIC SHRINK (750 mil)
NOTES
ITEM
MILLIMETERS 58.0 +0.68 -0.20 1.78 MAX. 1.778 (T.P.) 0.50±0.10 MIN. 3.2±0.3 0.51 MIN. 4.05 +0.26 -0.20 5.08 MAX. 19.05 (T.P.) 17.0±0.2 0.25 +0.10 -0.05 0.17
INCHES 2.283 +0.028 -0.008 0.070 MAX. 0.070 (T.P.) 0.020 +0.004 -0.005 0.035 MIN. 0.126±0.012 0.020 MIN. 0.159 +0.011 -0.008 0.200 MAX. 0.750 (T.P.) 0.669 +0.009 -0.008 0.010 +0.004 -0.003 0.007 P64C-70-750A,C-3
Controlling dimension
millimeter.
Each lead centerline located within 0.17 (0.007 inch) true position (T.P.) maximum material condition. Item center leads when formed parallel.
Remark package material products same mass produced products.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
PLASTIC
detail lead
NOTE Controlling dimension
ITEM MILLIMETERS 17.6±0.4 14.0±0.2 14.0±0.2 17.6±0.4 0.37 +0.08 -0.07 0.15 (T.P.) 1.8±0.2 0.8±0.2 0.17 +0.08 -0.07 0.10 2.55±0.1 0.1±0.1 5°±5° 2.85 MAX. INCHES 0.693±0.016 0.551 +0.009 -0.008 0.551 +0.009 -0.008 0.693±0.016 0.039 0.039 0.015 +0.003 -0.004 0.006 0.031 (T.P.) 0.071±0.008 0.031 +0.009 -0.008 0.007 +0.003 -0.004 0.004 0.100±0.004 0.004±0.004 5°±5° 0.113 MAX. P64GC-80-AB8-4
millimeter.
Each lead centerline located within 0.15 (0.006 inch) true position (T.P.) maximum material condition.
Remark package material products same mass produced products.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
PLASTIC LQFP (12x12)
detail lead
ITEM
MILLIMETERS 14.8±0.4 12.0±0.2 12.0±0.2 14.8±0.4 1.125 1.125 0.32±0.08 0.13 0.65 (T.P.) 1.4±0.2 0.6±0.2 0.17 +0.08 -0.07 0.10 1.4±0.1 0.125±0.075 5°±5° MAX.
INCHES 0.583±0.016 0.472+0.009 -0.008 0.472+0.009 -0.008 0.583±0.016 0.044 0.044 0.013+0.003 -0.004 0.005 0.026 0.055±0.008 0.024+0.008 -0.009 0.007+0.003 -0.004 0.004 0.055+0.004 -0.005 0.005±0.003 5°±5° 0.067 MAX. P64GK-65-8A8-2
NOTES Controlling dimension millimeter.
Each lead centerline located within 0.13 true position (T.P.) maximum material condition.
Remark package material products same mass produced products.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
RECOMMENDED SOLDERING CONDITIONS
µPD78F0034A should soldered mounted under following recommended conditions. details recommended soldering conditions, refer document Semiconductor Device Mounting Technology Manual (C10535E). soldering methods conditions other than those recommended below, contact your sales representative. Table 7-1. Surface Mounting Type Soldering Conditions µPD78F0034AGC-AB8: 64-pin plastic
Soldering Method Soldering Conditions Recommended Condition Symbol IR35-00-2
Infrared reflow
Package peak temperature: 235°C, Time: seconds Max. 210°C higher), Count: times less Package peak temperature: 215°C, Time: seconds Max. 200°C higher), Count: times less Solder bath temperature: 260°C Max., Time: seconds Max., Count: Once, Preheating temperature: 120°C Max. (package surface temperature) temperature: 300°C Max., Time: seconds Max. (per row)
VP15-00-2
Wave soldering
WS60-00-1
Partial heating
Caution different soldering methods together (except partial heating). µPD78F0034AGK-8A8: 64-pin plastic LQFP
Soldering Method Soldering Conditions Recommended Condition Symbol IR35-107-2
Infrared reflow
Package peak temperature: 235°C, Time: seconds Max. 210°C higher), Count: times less, Exposure limit: daysNote (after days, prebake 125°C hours)
Package peak temperature: 215°C, Time: seconds Max. 200°C higher), Count: times less, Exposure limit: daysNote (after days, prebake 125°C hours) Solder bath temperature: 260°C Max., Time: seconds Max., Count: Once, Preheating temperature: 120°C Max. (package surface temperature) Exposure limit: daysNote (after days, prebake 125°C hours)
VP15-107-2
Wave soldering
WS60-107-1
Partial heating
temperature: 300°C Max., Time: seconds Max. (per row)
Note
After opening pack, store 25°C less less allowable storage period.
Caution different soldering methods together (except partial heating).
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Table 7-2. Through-Hole Type Soldering Conditions
µPD78F0034ACW: 64-pin plastic shrink (750 mils)
Soldering Method Wave soldering (pin only) Partial heating Soldering Conditions Solder bath temperature: 260°C Max., Time: seconds Max. temperature: 300°C Max., Time: seconds Max. (per row)
Caution Apply wave soldering only pins careful bring solder into direct contact with package.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
APPENDIX DEVELOPMENT TOOLS
following development tools available system development using µPD78F0034A Subseries. Also refer Cautions Using Development Tools. Language Processing Software
RA78K/0 CC78K/0 DF780034 CC78K/0-L Assembler package common 78K/0 Series compiler package common 78K/0 Series Device file µPD780034A Subseries compiler library source file common 78K/0 Series
Flash Memory Writing Tools
Flashpro (type FL-PR2), Flashpro (type FL-PR3, PG-FP3) FA-64CW, FA-64GC, FA-64GKNote Flash programmer dedicated microcontrollers with on-chip flash memory
Adapter flash memory writing
Note
Under development
Debugging Tools When IE-78K0-NS in-circuit emulator used
IE-78K0-NS IE-70000-MC-PS-B IE-78K0-NS-PANote IE-70000-98-IF-C In-circuit emulator common 78K/0 Series Power supply unit IE-78K0-NS Performance board that enhances expands IE-78K0-NS functions Interface adapter used when PD-9800 Series (except notebook type) used host machine supported) card interface cable when PC-9800 Series notebook used host machine (PCMCIA socket supported) Interface adapter when using PC/ATor compatible host machine (ISA supported) Adapter necessary when using PCI-bus incorporated personal computer host machine Emulation board emulate µPD780034A Subseries Emulation probe 64-pin plastic shrink type) Emulation probe 64-pin plastic (CG-AB8 type) Emulation probe 64-pin plastic LQFP (CG-8A8 type) Conversion adapter connect NP-64GK target system board which 64-pin plastic LQFP (GC-8A8 type) mounted Socket mounted target system board 64-pin plastic (GC-AB8 type) Integrated debugger IE-78K0-NS System simulator common 78K/0 Series Device file µPD780034A Subseries
IE-70000-CD-IF-A
IE-70000-PC-IF-C IE-70000-PCI-IF IE-780034-NS-EM1 NP-64CW NP-64GC NP-64GKNote TGK-064SBW
EV-9200GC-64 ID78K0-NS SM78K0 DF780034
Note
Under development
Data Sheet U14040EJ1V0DS00
µPD78F0034A
When using in-circuit emulator IE-78001-R-A
IE-78001-R-A IE-70000-98-IF-C In-circuit emulator common 78K/0 Series Interface adapter when using PC-9800 series host machine (excluding notebook PCs) supported) Interface adapter when using PC/AT compatible host machine (ISA supported) Adapter necessary when using PCI-bus incorporated personal comuputers host machine. Interface adapter cable when using host machine Emulation board emulate µPD780034A Subseries Emulation probe conversion board IE-780034-NS-EM1 IE-78001-R-A Emulation probe 64-pin plastic shrink type) Emulation probe 64-pin plastic (GC-AB8 type) Emulation probe 64-pin plastic LQFP (GK-8A8 type) Conversion adapter connecting target system board designed allow mounting 64-pin plastic LQFP (GK-8A8) NP-64GK. Socket mounted target system board manufactured 64-pin plastic (GC-AB8 type) Integrated debugger IE-78001-R-A System simulator common 78K/0 Series Device file µPD780034A Subseries
IE-70000-PC-IF-C IE-70000-PCI-IF IE-78000-R-SV3 IE-780034-NS-EM1 IE-78K0-R-EX1 EP-78240CW-R EP-78240GC-R EP-78012GK-R TGK-064SBW
EV-9200GC-64 ID78K0 SM78K0 DF780034
Real-time
RX78K/0 MX78K0 Real-time 78K/0 Series 78K/0 Series
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Cautions using development tools ID-78K0-NS, ID78K0, SM78K0 used combination with DF780034. CC78K/0 RX78K/0 used combination with RA78K/0 DF780034. FL-PR2, FL-PR3, FA-64CW, FA-64GC, FA64GK, NP-64CW, NP64GC, NP-64GK products made Naito Densei Machida Mfg. Co., Ltd. (+81-44-822-3813). Contact distributor regarding purchase these products. TGK-064SBW product made TOKYO ELETECH CORPORATION. further information contact Daimaru Kogyo, Ltd. Tokyo Electronic Division (+81-3-3820-7112) Osaka Electronic Division (+81-6-6244-6672) third party development tools, 78K/0 Series Selection Guide (U11126E). host machines supporting each software follows.
Host Machine [OS] Software RA78K/0 CC78K/0 ID78K0-NS ID78K0 SM78K0 RX78K/0 MX78K0 PC-9800 series [WindowsTM] PC/AT compatibles [Japanese/English Windows] Note Note Note Note HP9000 series 700[HP-UXTM] SPARCstation[SunOSTM, SolarisTM] NEWS(RISC) [NEWS-OSTM]
Note
DOS-based software
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Conversion Socket Drawing (EV-9200GC-64) Footprints Figure A-1. EV-9200GC-64 Drawing (For Reference Only)
EV-9200GC-64-G0 INCHES 0.74 0.555 0.555 0.74 0.118 0.031 0.236 0.622 0.728 0.236 0.622 0.728 0.315 0.307 0.098 0.079 0.053 0.014 +0.004 -0.005
EV-9200GC-64
No.1 index
ITEM MILLIMETERS 18.8 14.1 14.1 18.8 15.8 18.5 15.8 18.5 1.35 0.35
0.091 0.059
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Figure A-2. EV-9200GC-64 Footprints (For Reference Only)
EV-9200GC-64-P1E ITEM Caution MILLIMETERS 19.5 14.8 INCHES 0.768 0.583
0.8±0.02 15=12.0±0.05 0.031+0.002 0.591=0.472 +0.003 -0.001 -0.002 0.8±0.02 15=12.0±0.05 0.031+0.002 0.591=0.472 +0.003 -0.001 -0.002 14.8 19.5 6.00 0.08 6.00 0.08 0.02 0.583 0.768 0.236 +0.004 -0.003 0.236 +0.004 -0.003 0.197 +0.001 -0.002
2.36 0.03 1.57 0.03
0.093 +0.001 -0.002 0.087 +0.004 -0.005 0.062 +0.001 -0.002
(QFP) different some parts. recommended mount dimensions QFP, refer "SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL" (C10535E).
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Conversion Adapter Drawing (TGK-064SBW) Figure A-3. TGK-064SBW Drawing (For Reference Only)
Protrusion height
ITEM MILLIMETERS 18.4 0.65x15=9.75 0.65 7.75 10.15 12.55 14.95 0.65x15=9.75 11.85 18.4 12.45 10.25 10.02 14.92 11.1 1.45 1.45 INCHES 0.724 0.026x0.591=0.384 0.026 0.305 0.400 0.494 0.589 0.026x0.591=0.384 0.467 0.724 0.079 0.490 0.404 0.303 0.394 0.587 0.437 0.057 0.057 0.051 0.071 0.197 ITEM MILLIMETERS INCHES
1.85 1.325 1.325
0.012
0.073 0.138 0.079 0.154 0.052 0.052 0.232 0.031 0.094 0.106 TGK-064SBW-G0E
0.209
0.039
3.55
0.140 0.035
Note: Product made TOKYO ELETECH CORPORATION.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
APPENDIX RELATED DOCUMENTS
Device Related Documents
Document Name Document (English) Under preparation U14044E This manual U12326E Document (Japanese) U14046J U14044J U14040J U12326J U10903J U10904J
µPD780024A, 780034A, 780024AY, 780034AY Subseries User's Manual µPD780031A, 780032A, 780033A, 780034A Data Sheet µPD78F0034A Data Sheet
78K/0 Series User's Manual Instruction 78K/0 Series Instruction Table 78K/0 Series Instruction
Development Tool Documents (User's Manuals)
Document Name Document (English) Operation Assembly Language U11802E U11801E Document (Japanese) U11802J U11801J U11789J U12323J U11517J U11518J U13034J prepared prepared prepared EEU-986 EEU-5012 U10181J U10092J
RA78K0 Assembler Package
Structured Assembly Language U11789E RA78K Series Structured Assembler Preprocessor CC78K/0 Compiler Operation Language CC78K/0 Compiler Application Note IE-78K0-NS IE-78001-R-A IE-780034-NS-EM1 EP-78240 EP-78012GK-R SM78K0 System Simulator-Windows based SM78K Series System Simulator Reference External Part User Open Interface Specifications Reference Reference Reference Guide Programming Know-how EEU-1402 U11517E U11518E U13034E prepared prepared prepared U10332E EEU-1538 U10181E U10092E
ID78K0-NS Integrated Debugger Windows based ID78K0 Integrated Debugger based ID78K0 Integrated Debugger based ID78K0 Integrated Debugger Windows based
U12900E U11539E U11649E
U12900J U11151J U11539J U11649J
Caution above related documents subject change without notice. sure read latest documents before designing.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Embedded Software Documents (User's Manuals)
Document Name Document (English) Basics Installation 78K/0 Series MX78K0 Basics U11537E U11536E U12257E Document (Japanese) U11537J U11536J U12257J
78K/0 Series Real-time
Other Documents
Document Name Document (English) X13769X C10535E C11531E C10983E C11892E C10535J C11531J C10983J C11892J U11416J Document (Japanese)
SEMICONDUCTORS SELECTION GUIDE Products Packages (CD-ROM) Semiconductor Device Mounting Technology Manual Quality Grades Semiconductor Devices Semiconductor Device Reliability/Quality Control System Guide Prevent Damage Semiconductor Devices Electrostatic Discharge (ESD) Microcomputer Related Products Third Party
Caution above related documents subject change without notice. sure read latest documents before designing.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
[MEMO]
Data Sheet U14040EJ1V0DS00
µPD78F0034A
[MEMO]
Data Sheet U14040EJ1V0DS00
µPD78F0034A
[MEMO]
Data Sheet U14040EJ1V0DS00
µPD78F0034A
NOTES CMOS DEVICES
PRECAUTION AGAINST SEMICONDUCTORS Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices HANDLING UNUSED INPUT PINS CMOS Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar NMOS devices. Input levels CMOS devices must fixed high using pull-up pull-down circuitry. Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices. STATUS BEFORE INITIALIZATION DEVICES Note: Power-on does necessarily define initial status device. Production process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. Hence, power-on does guarantee out-pin levels, settings contents registers. Device initialized until reset signal received. Reset operation must executed immediately after power-on devices having reset function.
Data Sheet U14040EJ1V0DS00
µPD78F0034A
Regional Information
Some information contained this document vary from country country. Before using product your application, please contact office your country obtain list authorized representatives distributors. They will verify: Device availability Ordering information Product release schedule Availability related technical literature Development environment specifications (for example, specifications third-party tools components, host computers, power plugs, supply voltages, forth) Network requirements addition, trademarks, registered trademarks, export restrictions, other legal issues also vary from country country.
Electronics Inc. (U.S.)
Santa Clara, California Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288
Electronics (Germany) GmbH
Benelux Office Eindhoven, Netherlands Tel: 040-2445845 Fax: 040-2444580
Electronics Hong Kong Ltd.
Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044
Electronics Hong Kong Ltd. Electronics (France) S.A.
Velizy-Villacoublay, France Tel: 01-30-67 Fax: 01-30-67 Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411
Electronics (Germany) GmbH
Duesseldorf, Germany Tel: 0211-65 Fax: 0211-65
Electronics (France) S.A. Electronics (UK) Ltd.
Milton Keynes, Tel: 01908-691-133 Fax: 01908-670-290 Spain Office Madrid, Spain Tel: 91-504-2787 Fax: 91-504-2860
Electronics Singapore Pte. Ltd.
United Square, Singapore 1130 Tel: 65-253-8311 Fax: 65-250-3583
Electronics Taiwan Ltd. Electronics Italiana s.r.l.
Milano, Italy Tel: 02-66 Fax: 02-66
Electronics (Germany) GmbH
Scandinavia Office Taeby, Sweden Tel: 08-63 Fax: 08-63
Taipei, Taiwan Tel: 02-2719-2377 Fax: 02-2719-5951
Brasil S.A.
Electron Devices Division Rodovia Presidente Dutra, 07210-902-Guarulhos-SP Brasil Tel: 55-11-6465-6810 Fax: 55-11-6465-6829
J99.1
Data Sheet U14040EJ1V0DS00
µPD78F0034A
IEBus trademarks Corporation. Windows either registered trademark trademark Microsoft Corporation United States and/or other countries. PC/AT trademark International Business Machines Corporation. HP9000 Series HP-UX trademarks Hewlett-Packard Company. SPARCstation trademark SPARC International, Inc. Solaris SunOS trademarks Microsystems, Inc. NEWS NEWS-OS trademarks Sony Corporation. related documents indicated this publication include preliminary versions. However, preliminary versions marked such. information this document subject change without notice. Before using this document, please confirm that this latest version. part this document copied reproduced form means without prior written consent Corporation. Corporation assumes responsibility errors which appear this document. Corporation does assume liability infringement patents, copyrights other intellectual property rights third parties arising from device described herein other liability arising from such device. license, either express, implied otherwise, granted under patents, copyrights other intellectual property rights Corporation others. Descriptions circuits, software, other related information this document provided illustrative purposes semiconductor product operation application examples. incorporation these circuits, software, information design customer's equipment shall done under full responsibility customer. Corporation assumes responsibility losses incurred customer third parties arising from these circuits, software, information. While Corporation been making continuous effort enhance reliability semiconductor devices, possibility defects cannot eliminated entirely. minimize risks damage injury persons property arising from defect semiconductor device, customers must incorporate sufficient safety measures design, such redundancy, fire-containment, anti-failure features. devices classified into following three quality grades: "Standard", "Special", "Specific". Specific quality grade applies only devices developed based customer designated "quality assurance program" specific application. recommended applications device depend quality grade, indicated below. Customers must check quality grade each device before using particular application. Standard: Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade devices "Standard" unless otherwise specified NEC's Data Sheets Data Books. customers intend devices applications other than those specified Standard quality grade, they should contact sales representative advance.
98.8

µPD78F0034A 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION

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