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SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
Members Texas Instruments WidebusFamily State-of-the-Art EPIC-B BiCMOS Design Significantly Reduces Power Dissipation Typical VOLP (Output Ground Bounce) 25°C Distributed Configuration Minimizes High-Speed Switching Noise Flow-Through Architecture Optimizes Layout High-Drive Outputs (-32-mA IOH, 64-mA IOL) Latch-Up Performance Exceeds JESD Protection Exceeds 2000 MIL-STD-883, Method 3015; Exceeds Using Machine Model Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV) Packages 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings
SN54ABT16240A PACKAGE SN74ABT16240A DGG, DGV, PACKAGE (TOP VIEW)
description
'ABT16240A devices 16-bit buffers line drivers designed specifically improve both performance density 3-state memory address drivers, clock drivers, bus-oriented receivers transmitters.
These devices used four 4-bit buffers, 8-bit buffers, 16-bit buffer. These devices provide inverting outputs symmetrical active-low output-enable (OE) inputs. ensure high-impedance state during power power down, should tied through pullup resistor; minimum value resistor determined current-sinking capability driver. SN54ABT16240A characterized operation over full military temperature range -55°C 125°C. SN74ABT16240A characterized operation from -40°C 85°C.
Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. Widebus EPIC-B trademarks Texas Instruments Incorporated.
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters.
Copyright 1998, Texas Instruments Incorporated
products compliant MIL-PRF-38535, parameters tested unless otherwise noted. other products, production processing does necessarily include testing parameters.
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SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
FUNCTION TABLE (each 4-bit buffer) INPUTS OUTPUT
logic symbol
This symbol accordance with ANSI/IEEE 91-1984 Publication 617-12.
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SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
logic diagram (positive logic)
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, -0.5 Input voltage range, (see Note -0.5 Voltage range applied output high power-off state, -0.5 Current into output state, SN54ABT16240A SN74ABT16240A Input clamp current, Output clamp current, Package thermal impedance, (see Note package 89°C/W package 93°C/W package 94°C/W Storage temperature range, Tstg -65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output negative-voltage ratings exceeded input output clamp-current ratings observed. package thermal impedance calculated accordance with JESD
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SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
recommended operating conditions (see Note
SN54ABT16240A Supply voltage High-level input voltage Low-level input voltage Input voltage High-level output current Low-level output current Input transition rise fall rate Outputs enabled SN74ABT16240A UNIT ns/V
Operating free-air temperature NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS Vhys IOZH IOZL Ioff ICEX Data inputs Control inputs input Other inputs Outputs high Outputs high Outputs Outputs disabled Outputs enabled Outputs disabled -100 ±100 -180 0.05 -180 ±100 -180 0.05 25°C -1.2 0.55 0.55* 0.55 0.55 SN54ABT16240A -1.2 SN74ABT16240A -1.2 UNIT
input Other inputs
products compliant MIL-PRF-38535, this parameter does apply. typical values more than output should tested time, duration test should exceed second. This increase supply current each input that specified voltage level rather than GND.
POST OFFICE 655303
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SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
switching characteristics over recommended ranges supply voltage operating free-air temperature, (unless otherwise noted) (see Figure
SN54ABT16240A PARAMETER FROM (INPUT) (OUTPUT) 25°C tPLH tPHL tPZH tPZL tPHZ tPLZ UNIT
switching characteristics over recommended ranges supply voltage operating free-air temperature, (unless otherwise noted) (see Figure
SN74ABT16240A PARAMETER FROM (INPUT) (OUTPUT) 25°C tPLH tPHL tPZH tPZL tPHZ tPLZ UNIT
POST OFFICE 655303
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SN54ABT16240A, SN74ABT16240A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
Open TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Open
From Output Under Test (see Note
LOAD CIRCUIT Input VOLTAGE WAVEFORMS PULSE DURATION
Timing Input Data Input VOLTAGE WAVEFORMS SETUP HOLD TIMES Output Control tPZL Output Waveform (see Note Output Waveform Open (see Note tPZH VOLTAGE WAVEFORMS ENABLE DISABLE TIMES LOW- HIGH-LEVEL ENABLING tPLZ tPHZ
Input tPLH Output tPHL tPHL tPLH Output VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING NONINVERTING OUTPUTS
NOTES: includes probe capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. input pulses supplied generators having following characteristics: MHz, outputs measured time with transition measurement.
Figure Load Circuit Voltage Waveforms
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Copyright 1998, Texas Instruments Incorporated

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