Typical VOLP (Output Ground Bounce) 25°C High-Drive Outputs (-32-mA IO
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SN54ABT125, SN74ABT125 QUADRUPLE BUFFER GATES WITH 3-STATE OUTPUTS
Typical VOLP (Output Ground Bounce) 25°C High-Drive Outputs (-32-mA IOH, 64-mA IOL) Ioff Power-Up 3-State Support Insertion
Latch-Up Performance Exceeds JEDEC Standard JESD-17 Protection Exceeds JESD 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A)
SN54ABT125 PACKAGE (TOP VIEW)
SN54ABT125 PACKAGE SN74ABT125 PACKAGE (TOP VIEW)
SN74ABT125 PACKAGE (TOP VIEW)
internal connection
description/ordering information
'ABT125 quadruple buffer gates feature independent line drivers with 3-state outputs. Each output disabled when associated output-enable (OE) input high. These devices fully specified hot-insertion applications using Ioff power-up 3-state. Ioff circuitry disables outputs, preventing damaging current backflow through devices when they powered down. power-up 3-state circuitry places outputs high-impedance state during power power down, which prevents driver conflict. ensure high-impedance state during power power down, should tied through pullup resistor; minimum value resistor determined current-sinking capability driver. ORDERING INFORMATION
PDIP -40°C 85°C SOIC SSOP TSSOP CDIP -55°C 125°C LCCC PACKAGE Tube Tape reel Tube Tape reel Tape reel Tape reel Tape reel Tube Tube Tube ORDERABLE PART NUMBER SN74ABT125N SN74ABT125RGYR SN74ABT125D SN74ABT125DR SN74ABT125NSR SN74ABT125DBR SN74ABT125PWR SNJ54ABT125J SNJ54ABT125W SNJ54ABT125FK TOP-SIDE MARKING SN74ABT125N AB125 ABT125 ABT125 AB125 AB125 SNJ54ABT125J SNJ54ABT125W
SNJ54ABT125FK Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package. Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet.
Copyright 2002, Texas Instruments Incorporated
products compliant MIL-PRF-38535, parameters tested unless otherwise noted. other products, production processing does necessarily include testing parameters.
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters.
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SN54ABT125, SN74ABT125 QUADRUPLE BUFFER GATES WITH 3-STATE OUTPUTS
FUNCTION TABLE (each buffer) INPUTS OUTPUT
logic diagram (positive logic)
numbers shown RGY, packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, -0.5 Input voltage range, (see Note -0.5 Voltage range applied output high power-off state, -0.5 Current into output state, SN54ABT125 SN74ABT125 Input clamp current, Output clamp current, Package thermal impedance, (see Note package 86°C/W (see Note package 96°C/W (see Note package 80°C/W (see Note package 76°C/W (see Note package 113°C/W (see Note package 47°C/W Storage temperature range, Tstg -65°C 150°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: input output negative-voltage ratings exceeded input output clamp-current ratings observed. package thermal impedance calculated accordance with JESD 51-7. package thermal impedance calculated accordance with JESD 51-5.
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SN54ABT125, SN74ABT125 QUADRUPLE BUFFER GATES WITH 3-STATE OUTPUTS
recommended operating conditions (see Note
SN54ABT125 t/VCC Supply voltage High-level input voltage Low-level input voltage Input voltage High-level output current Low-level output current Input transition rise fall rate Power-up ramp rate Operating free-air temperature SN74ABT125 UNIT ns/V µs/V
NOTE unused inputs device must held ensure proper device operation. Refer application report, Implications Slow Floating CMOS Inputs, literature number SCBA004.
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SN54ABT125, SN74ABT125 QUADRUPLE BUFFER GATES WITH 3-STATE OUTPUTS
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER Vhys IOZPU IOZPD IOZH IOZL Ioff ICEX TEST CONDITIONS Data inputs Control inputs input Other inputs Outputs high Outputs high Outputs Outputs disabled Outputs enabled Outputs disabled -100 ±100 0.05 0.05 ±100 0.05 0.55 0.55* 0.55 0.55 25°C -1.2 SN54ABT125 -1.2 SN74ABT125 -1.2 UNIT
input Other inputs
products compliant MIL-PRF-38535, this parameter does apply. typical values more than output should tested time, duration test should exceed second. This limit vary among suppliers. This increase supply current each input that specified voltage level, rather than GND.
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SN54ABT125, SN74ABT125 QUADRUPLE BUFFER GATES WITH 3-STATE OUTPUTS
switching characteristics over recommended ranges supply voltage operating free-air temperature (unless otherwise noted) (see Figure
PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) (OUTPUT) 25°C SN54ABT125 SN74ABT125 UNIT
This limit vary among suppliers.
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SN54ABT125, SN74ABT125 QUADRUPLE BUFFER GATES WITH 3-STATE OUTPUTS
PARAMETER MEASUREMENT INFORMATION
Open TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Open
From Output Under Test (see Note
LOAD CIRCUIT Input VOLTAGE WAVEFORMS PULSE DURATION
Timing Input Data Input VOLTAGE WAVEFORMS SETUP HOLD TIMES Output Control tPZL Output Waveform (see Note Output Waveform Open (see Note tPZH tPLZ tPHZ
Input tPLH Output tPHL tPHL tPLH Output
VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ENABLE DISABLE TIMES INVERTING NONINVERTING OUTPUTS LOW- HIGH-LEVEL ENABLING NOTES: includes probe capacitance. Waveform output with internal conditions such that output except when disabled output control. Waveform output with internal conditions such that output high except when disabled output control. input pulses supplied generators having following characteristics: MHz, outputs measured time with transition measurement. parameters waveforms applicable devices.
Figure Load Circuit Voltage Waveforms
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MECHANICAL DATA
MCFP002A JANUARY 1995 REVISED FEBRUARY 2002
(R-GDFP-F14)
CERAMIC DUAL FLATPACK
Base Seating Plane
0.045 (1,14) 0.026 (0,66)
0.260 (6,60) 0.235 (5,97)
0.080 (2,03) 0.045 (1,14)
0.008 (0,20) 0.004 (0,10)
0.280 (7,11) 0.019 (0,48) 0.015 (0,38)
0.050 (1,27)
0.390 (9,91) 0.335 (8,51) 0.005 (0,13) Places
0.360 (9,14) 0.250 (6,35)
0.360 (9,14) 0.250 (6,35)
4040180-2 02/02 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. This package hermetically sealed with ceramic using glass frit. Index point provided terminal identification only. Falls within 1835 GDFP1-F14 JEDEC MO-092AB
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MECHANICAL DATA
MLCC006B OCTOBER 1996
(S-CQCC-N**)
TERMINAL SHOWN
LEADLESS CERAMIC CHIP CARRIER
TERMINALS
0.342 (8,69) 0.442 (11,23) 0.640 (16,26) 0.739 (18,78) 0.938 (23,83) 1.141 (28,99) 0.358 (9,09) 0.458 (11,63) 0.660 (16,76) 0.761 (19,32) 0.962 (24,43) 1.165 (29,59) 0.307 (7,80) 0.406 (10,31) 0.495 (12,58) 0.495 (12,58) 0.850 (21,6) 1.047 (26,6)
0.358 (9,09) 0.458 (11,63) 0.560 (14,22) 0.560 (14,22) 0.858 (21,8) 1.063 (27,0)
0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25)
0.020 (0,51) 0.010 (0,25)
0.055 (1,40) 0.045 (1,14)
0.045 (1,14) 0.035 (0,89)
0.028 (0,71) 0.022 (0,54) 0.050 (1,27)
0.045 (1,14) 0.035 (0,89)
4040140 10/96 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. This package hermetically sealed with metal lid. terminals gold plated. Falls within JEDEC MS-004
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MECHANICAL
MPDI002C JANUARY 1995 REVISED DECEMBER 20002
(R-PDIP-T**)
PINS SHOWN
PLASTIC DUAL-IN-LINE PACKAGE
PINS
0.775 (19,69) 0.745 (18,92)
0.775 (19,69) 0.745 (18,92)
0.920 (23,37) 0.850 (21,59)
1.060 (26,92) 0.940 (23,88)
0.260 (6,60) 0.240 (6,10)
MS-100 VARIATION
0.070 (1,78) 0.045 (1,14)
0.045 (1,14) 0.030 (0,76)
0.020 (0,51)
0.325 (8,26) 0.300 (7,62) 0.015 (0,38) 0.200 (5,08) Seating Plane 0.125 (3,18) 0.010 (0,25) Gauge Plane
0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.010 (0,25)
0.430 (10,92)
14/18 ONLY vendor option
4040049/E 12/2002
NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. Falls within JEDEC MS-001, except minimum body lrngth (Dim lead shoulder width vendor option, either half full width.
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MECHANICAL DATA
MSOI002B JANUARY 1995 REVISED SEPTEMBER 2001
(R-PDSO-G**)
PINS SHOWN 0.050 (1,27) 0.020 (0,51) 0.014 (0,35) 0.010 (0,25)
PLASTIC SMALL-OUTLINE PACKAGE
0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81)
0.008 (0,20)
Gage Plane 0.044 (1,12) 0.016 (0,40)
0.010 (0,25)
Seating Plane 0.069 (1,75) 0.010 (0,25) 0.004 (0,10) 0.004 (0,10)
PINS
0.197 (5,00) 0.189 (4,80)
0.344 (8,75) 0.337 (8,55)
0.394 (10,00) 0.386 (9,80)
4040047/E 09/01 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. Body dimensions include mold flash protrusion, exceed 0.006 (0,15). Falls within JEDEC MS-012
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MECHANICAL DATA
MSSO002E JANUARY 1995 REVISED DECEMBER 2001
(R-PDSO-G**)
PINS SHOWN 0,65 0,38 0,22 0,15
PLASTIC SMALL-OUTLINE
0,25 0,09 5,60 5,00 8,20 7,40
Gage Plane 0,25 0,95 0,55
Seating Plane 2,00 0,05 0,10
PINS
6,50
6,50
7,50
8,50
10,50
10,50
12,90
5,90
5,90
6,90
7,90
9,90
9,90
12,30 4040065 12/01
NOTES:
linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-150
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MECHANICAL DATA
MTSS001C JANUARY 1995 REVISED FEBRUARY 1999
(R-PDSO-G**)
PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0,65
0,30 0,19
0,10
0,15 4,50 4,30 6,60 6,20 Gage Plane 0,25 0,75 0,50
Seating Plane 1,20 0,15 0,05 0,10
PINS
3,10
5,10
5,10
6,60
7,90
9,80
2,90
4,90
4,90
6,40
7,70
9,60
4040064/F 01/97 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-153
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