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Description TC280 Toshiba's 0.11µm System Level Integration (SLI) ASIC
Top Searches for this datasheetTC280 ASIC Family with Embedded DRAM 0.11µm/1.5V Description TC280 Toshiba's 0.11µm System Level Integration (SLI) ASIC family. TC280 designed specifically high-performance applications requiring power dissipation highly integrated dense circuits. Coupled with copper process, advanced packaging structures rich library offerings, TC280 supports levels metal high density memory structures. Toshiba offers TC280 standard cell family designs requiring tight clock skew reduced interconnect delays, facilitated copper process. Product Features 0.11µm (drawn) gate length layer copper process High gate density 206Kg/mm2 sets offerings Standard height limited designs Short core limited designs High density SRAM cells 18ps with 10ps input slew 2-Input NAND gate delay fanout=1 1.5V 1.5V, 1.8V, 2.5V, 3.3V Typical power dissipation 10nW/MHz. technology module options: Precision 2.5V analog module mixed signal applications Performance module optimizing timing paths Comprehensive core cell implementation MegaGate Timing Driven Flow (TDFTM) Advanced packaging structures with superior thermal electrical properties DRAM Core Features There types DRAM cores: High-bandwidth, 250MHz SDRAM with 2-32Mb, banks 64-256 bits wide macrocell Fast access DRAM with 10ns trc, 2/4/8 bits wide macrocell Synchronous interface. signals referenced positive edge clock Automatic refresh Byte write data control Typical 40mm2 32Mb DRAM with gates Typical 100mm2 128Mb DRAM with 3.5M gates. 1-transistor cell structure utilizing trench capacitor technology. Benefits Embedded DRAM Flexibility configuring DRAM macrocell based application requirements High bandwidth wide fast memory busses. Faster access time than discrete DRAMs. Fewer external devices reduction total ASIC count. Lower power dissipation- systems with fast wide memory busses will dissipate significantly less power capacitance on-chip connections. Lower switching noise data between memory Logic. Trench capacitor benefits When compared stacked capacitor technology, trench capacitor technology following benefits: Higher density DRAM core gate count given size. Logic transistor performance degraded manufacturing memory capacitor. trench capacitor, which formed beneath surface silicon, allows planar silicon surface topology which improves reliability. Better soft error immunity, since these larger capacitors require higher charges change states. System Level Packaging TC280 utilizes different slot widths heights accommodate different flavors design goals. 40µm slot width standard height more suitable high count designs, while 80µm slot width with height more suited core limited designs. Toshiba's comprehensive package options include low-cost PQFP's, TBGA's EBGA's. High performance, high count Flip chip BGA's offered designs requiring counts excess 1000 pins backed superior thermal electrical properties. Toshiba also offers fine-pitch BGA's. TC280 available many other standard package options counts. TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. TC280 ASIC Family with Embedded DRAM Application Specific Toshiba supports ever growing selection cores many technologies. These range from basic cells, such RAM, ROM, register files, A/D, through application specific such USB, IEEE 1394, ethernet MAC, gigabit SerDes, DRAC, RISC, MPEG, QPSK. developed Toshiba, obtained from third-party partners provid customers. Contact Toshiba detailed TC280 availability. MegaGate Toshiba employs advanced methodology, MegaGate obtaining performance validation timing closure which based upon Toshiba's proven Timing-Driven Flow (TDF) methodology. Also incorporating signal integrity analysis, this only appropriate ASIC design methodology 0.11µm technology. MegaGate based upon tightly integrated commercial tool optimal block hierarchy uses accurate timing models extraction. Using methodology results reduced design cycle time fewer iterations. Technology Resource Centers Toshiba ASIC Technology Resource Centers located throughout U.S. provide technical support before, during after design Toshiba ASIC. This includes support with methodologies design kits, Toshiba design methodologies, ASIC technologies design implementation. addition, Toshiba's North American Semiconductor Engineering Development Center based Jose, staffed with system, technology design experts work with customers advanced system applications, also provide complete design services. High Quality Volume Manufacturing Toshiba's ASIC manufacturing plants among largest most advanced world. They certified ISO9000. Rigorous quality control coupled with sophisticated batch tracking system allows Toshiba meet needs fast-ramping, highvolume markets. more details this subject, please visit: http://www.asic.toshiba.com. dRAMASIC MegaGate Timing-Driven Flow trademarks Toshiba Corporation. SOUTHEAST Atlanta, TEL: (770) 931-3363 FAX: (770) 931-7602 TAEC Regional Sales Offices NORTHWEST Jose, TEL: (408) 526-2400 FAX: (408) 526-2410 Portland, TEL: (503) 629-0818 FAX: (503) 629-0827 SOUTHWEST Irvine, TEL: (949) 461-3800 FAX: (949) 768-2918 Dallas, TEL: (972) 480-0470 FAX: (972) 235-4114 CENTRAL Chicago, TEL: (847) 945-1500 FAX: (847) 945-1044 NORTHEAST Boston, TEL: (781) 224-0074 FAX: (781) 224-1096 Edison, TEL: (732) 248-8070 FAX: (732) 248-8030 technical data controlled under U.S. Export Administration Regulations subject approval U.S. Department Commerce prior export. export reexport directly indirectly, contravention U.S. Export Administration regulations, strictly prohibited. TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 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