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TLC555 LinCMOS TIMER
D Very Low Power Consumption D D D D D D D D D
TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
D Very Low Power Consumption D D D D D D D D D
D, DB, JG, OR P PACKAGE (TOP VIEW)
GND TRIG OUT RESET
VDD DISCH THRES CONT
FK PACKAGE (TOP VIEW)
NC TRIG NC OUT NC
NC GND NC VDD NC NC DISCH NC THRES NC NC RESET NC
PW PACKAGE (TOP VIEW)
description
The TLC555 is a monolithic timing circuit fabricated using the TI LinCMOS process. The timer is fully compatible with CMOS, TTL, and MOS logic and operates at frequencies up to 2 MHz. Because of its high input impedance, this device uses smaller timing capacitors than those used by the NE555. As a result, more accurate time delays and oscillations are possible. Power consumption is low across the full range of power supply voltage.
GND NC TRIG NC OUT NC RESET
CONT NC
VDD NC DISCH NC THRES NC CONT
NC - No internal connection
Like the NE555, the TLC555 has a trigger level equal to approximately one-third of the supply voltage and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of the control voltage terminal (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is set and the output goes high. If TRIG is above the trigger level and the threshold input (THRES) is above the threshold level, the flip-flop is reset and the output is low. The reset input (RESET) can override all other inputs and can be used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output is low. Whenever the output is low, a low-impedance path is provided between the discharge terminal (DISCH) and GND. All unused inputs should be tied to an appropriate logic level to prevent false triggering. While the CMOS output is capable of sinking over 100 mA and sourcing over 10 mA, the TLC555 exhibits greatly reduced supply-current spikes during output transitions. This minimizes the need for the large decoupling capacitors required by the NE555.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LinCMOS is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2001, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
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TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
description (continued)
The TLC555C is characterized for operation from 0°C to 70°C. The TLC555I is characterized for operation from -40°C to 85°C. The TLC555Q is characterized for operation over the automotive temperature range of -40°C to 125°C. The TLC555M is characterized for operation over the full military temperature range of -55°C to 125°C.
AVAILABLE OPTIONS PACKAGED DEVICES TA 0°C to 70°C -40°C to 85°C -40°C to 125°C VDD RANGE 2 V to 15 V 3 V to 15 V 5 V to 15 V SMALL OUTLINE (D) TLC555CD TLC555ID TLC555QD SSOP (DB) TLC555CDB - - CHIP CARRIER (FK) - - - CERAMIC DIP (JG) - - - PLASTIC DIP (P) TLC555CP TLC555IP - TLC555MP TSSOP (PW) TLC555CPW - - -
DISCHARGE SWITCH On Off On
functional block diagram
Pin numbers are for all packages except the FK package. RESET can override TRIG, which can override THRES.
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TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
DISCH
COMPONENT COUNT
Transistors Resistors
GND TRIG RESET
equivalent schematic (each channel)
THRES
POST OFFICE BOX 655303 · DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
recommended operating conditions
MIN Supply voltage, VDD TLC555C Operating free air temperature range TA free-air range, TLC555I TLC555Q TLC555M 2 0 -40 -40 -55 MAX 15 70 85 125 125 °C UNIT V
POST OFFICE BOX 655303
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TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
Full range is 0°C to 70°C for the TLC555C and -40°C to 85°C for the TLC555I. For conditions shown as MAX, use the appropriate value specified in the recommended operating conditions table. NOTE 2: These values apply for the expected operating configurations in which THRES is connected directly to DISCH or to TRIG.
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TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
IIT VI(TRIG) ( G)
Threshold voltage
Threshold current
Trigger voltage
II(TRIG) ( G)
Trigger current
VI(RESET) ( S )
Reset voltage
II(RESET) ( S )
0.5 0.6 V
0.1 120 4.8 V 0.21 0.4 0.6 0.3 0.45 0.3 0.4 350 700 V nA
High-level output out ut voltage
Supply current
See Note 2
Full range is 0°C to 70°C the for TLC555C, -40°C to 85°C for the TLC555I, -40°C to 125°C for the TLC555Q, and -55°C to 125°C for the TLC555M. For conditions shown as MAX, use the appropriate value specified in the recommended operating conditions table. NOTE 2: These values apply for the expected operating configurations in which THRES is connected directly to DISCH or TRIG.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
VIT IIT VI(TRIG) ( G) II(TRIG) ( G) VI(RESET) ( S ) II(RESET) ( S )
Threshold voltage
Threshold current
Trigger voltage
Trigger current
Reset voltage
Full range is 0°C to 70°C for TLC555C, -40°C to 85°C for TLC555I, -40°C to 125°C for the TLC555Q, and -55°C to 125°C for TLC555M. For conditions shown as MAX, use the appropriate value specified in the recommended operating conditions table. NOTE 2: These values apply for the expected operating configurations in which THRES is connected directly to DISCH or TRIG.
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TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
Timing interval error is defined as the difference between the measured value and the average value of a random sample from each process run. NOTE 3: RA, RB, and CT are as defined in Figure 1.
Low-level out ut voltage Low level output
IDD Supply current See Note 2 170 350 NOTE 2: These values apply for the expected operating configurations in which THRES is connected directly to DISCH or TRIG.
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TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
TYPICAL CHARACTERISTICS
PROPAGATION DELAY TIMES TO DISCHARGE OUTPUT FROM TRIGGER AND THRESHOLD SHORTED TOGETHER vs SUPPLY VOLTAGE
DISCHARGE SWITCH ON-STATE RESISTANCE vs FREE-AIR TEMPERATURE
tPHL tPLH
0 - 25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16 18 20 TA - Free-Air Temperature - °C VDD - Supply Voltage - V The effects of the load resistance on these values must be taken into account separately.
Figure 1
Figure 2
APPLICATION INFORMATION
0.1 µF RA 0.1 µF 4 7 RB 6 THRES 2 CT TRIG GND 1 GND tPLH TRIGGER AND THRESHOLD VOLTAGE WAVEFORM VDD tPHL RL 3 Output CL 1 / 3 VDD 2 / 3 VDD tc(L)
tc(H)
5 8 CONT VDD RESET TLC555 DISCH OUT
Pin numbers shown are for all packages except the FK package. CIRCUIT
Figure 3. Astable Operation
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TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
APPLICATION INFORMATION
Connecting TRIG to THRES, as shown in Figure 3, causes the timer to run as a multivibrator. The capacitor CT charges through RA and RB to the threshold voltage level (approximately 0.67 VDD) and then discharges through RB only to the value of the trigger voltage level (approximately 0.33 VDD). The output is high during the charging cycle (tc(H)) and low during the discharge cycle (tc(L)). The duty cycle is controlled by the values of RA, RB, and CT as shown in the equations below. t C (R ) R ) In 2 (In 2 + 0.693) c(H) T A B t C R In 2 c(L) T B Period + t ) t C (R ) 2R ) In 2 c(H) c(L) T A B t c(L) Output driver duty cycle + 1- t ) t R c(H) c(L) A t c(H) Output waveform duty cycle + t ) t R c(H) c(L) A
3 -exp
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TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
MECHANICAL DATA
D (R-PDSO-G)
14 PIN SHOWN PINS DIM 0.020 (0, 51) 0.014 (0, 35) 14 8 A MIN 0.244 (6, 20) 0.228 (5, 80) 0.157 (4, 00) 0.150 (3, 81) 0.008 (0, 20) NOM 0.189 (4, 80) 0.337 (8, 55) 0.386 (9, 80) 0.010 (0, 25) M A MAX
PLASTIC SMALL-OUTLINE PACKAGE
Gage Plane
Seating Plane 0.069 (1, 75) MAX 0.010 (0, 25) 0.004 (0, 10) 0.004 (0, 10) 4040047 / D 10 / 96 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0, 15). Falls within JEDEC MS-012
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TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
MECHANICAL INFORMATION
DB (R-PDSO-G)
28 PIN SHOWN 0, 65 28 0, 38 0, 22 15 0, 15 M
PLASTIC SMALL-OUTLINE PACKAGE
0, 15 NOM 5, 60 5, 00 8, 20 7, 40
Gage Plane 1 A 14 0°- 8° 0, 25 1, 03 0, 63
Seating Plane 2, 00 MAX 0, 05 MIN 0, 10
PINS DIM A MAX
12, 30 4040065 / C 10 / 95
NOTES: A. B. C. D.
All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0, 15. Falls within JEDEC MO-150
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TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
MECHANICAL INFORMATION
FK (S-CQCC-N)
28 TERMINAL SHOWN
LEADLESS CERAMIC CHIP CARRIER
NO. OF TERMINALS 11 10 28 9 8 7 6 68 5 84 44 52 20
A MIN 0.342 (8, 69) 0.442 (11, 23) 0.640 (16, 26) 0.739 (18, 78) 0.938 (23, 83) 1.141 (28, 99) MAX 0.358 (9, 09) 0.458 (11, 63) 0.660 (16, 76) 0.761 (19, 32) 0.962 (24, 43) 1.165 (29, 59) MIN 0.307 (7, 80) 0.406 (10, 31) 0.495 (12, 58) 0.495 (12, 58) 0.850 (21, 6) 1.047 (26, 6)
B MAX 0.358 (9, 09) 0.458 (11, 63) 0.560 (14, 22) 0.560 (14, 22) 0.858 (21, 8) 1.063 (27, 0)
4040140 / D 10 / 96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004
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TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
MECHANICAL INFORMATION
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE PACKAGE
0.020 (0, 51) MIN
0.200 (5, 08) MAX Seating Plane 0.130 (3, 30) MIN
4040107 / C 08 / 96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only. Falls within MIL-STD-1835 GDIP1-T8
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TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
MECHANICAL DATA
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE PACKAGE
4 0.070 (1, 78) MAX 0.020 (0, 51) MIN 0.310 (7, 87) 0.290 (7, 37)
0.200 (5, 08) MAX Seating Plane 0.125 (3, 18) MIN
0.100 (2, 54) 0.021 (0, 53) 0.015 (0, 38) 0.010 (0, 25) M 0.010 (0, 25) NOM
4040082 / B 03 / 95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001
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TLC555 LinCMOS TIMER
SLFS043E - SEPTEMBER 1983 - REVISED MARCH 2001
MECHANICAL INFORMATION
PW (R-PDSO-G)
14 PIN SHOWN 0, 30 0, 19 14 8
PLASTIC SMALL-OUTLINE PACKAGE
0, 15 NOM 4, 50 4, 30 6, 60 6, 20 Gage Plane 0, 25 1 A 7 0°- 8° 0, 75 0, 50
Seating Plane 1, 20 MAX 0, 05 MIN 0, 10
PINS DIM A MAX 8 14 16 20 24 28
9, 60 4040064 / E 08 / 96
NOTES: A. B. C. D.
All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0, 15. Falls within JEDEC MO-153
POST OFFICE BOX 655303
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Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265
Copyright 2001, Texas Instruments Incorporated
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