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Very Power Consumption Capable Operation Astable Mode CMOS Output


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TLC555 LinCMOS TIMER
Very Power Consumption
Capable Operation Astable Mode CMOS Output Capable Swinging Rail Rail High Output-Current Capability Sink Source Output Fully Compatible With CMOS, TTL, Supply Current Reduces Spikes During Output Transitions Single-Supply Operation From Functionally Interchangeable With NE555; Same Pinout Protection Exceeds 2000 MIL-STD-883C, Method 3015.2 Available Q-Temp Automotive High Reliability Automotive Applications Configuration Control/Print Support Qualification Automotive Standards
PACKAGE (TOP VIEW)
TRIG RESET
DISCH THRES CONT
PACKAGE (TOP VIEW)
TRIG
DISCH THRES RESET
PACKAGE (TOP VIEW)
description
TLC555 monolithic timing circuit fabricated using LinCMOS process. timer fully compatible with CMOS, TTL, logic operates frequencies MHz. Because high input impedance, this device uses smaller timing capacitors than those used NE555. result, more accurate time delays oscillations possible. Power consumption across full range power supply voltage.
TRIG RESET
CONT
DISCH THRES CONT
internal connection
Like NE555, TLC555 trigger level equal approximately one-third supply voltage threshold level equal approximately two-thirds supply voltage. These levels altered control voltage terminal (CONT). When trigger input (TRIG) falls below trigger level, flip-flop output goes high. TRIG above trigger level threshold input (THRES) above threshold level, flip-flop reset output low. reset input (RESET) override other inputs used initiate timing cycle. RESET low, flip-flop reset output low. Whenever output low, low-impedance path provided between discharge terminal (DISCH) GND. unused inputs should tied appropriate logic level prevent false triggering. While CMOS output capable sinking over sourcing over TLC555 exhibits greatly reduced supply-current spikes during output transitions. This minimizes need large decoupling capacitors required NE555.
Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. LinCMOS trademark Texas Instruments.
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters.
Copyright 2001, Texas Instruments Incorporated
products compliant MIL-PRF-38535, parameters tested unless otherwise noted. other products, production processing does necessarily include testing parameters.
POST OFFICE 655303
DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
description (continued)
TLC555C characterized operation from 70°C. TLC555I characterized operation from -40°C 85°C. TLC555Q characterized operation over automotive temperature range -40°C 125°C. TLC555M characterized operation over full military temperature range -55°C 125°C.
AVAILABLE OPTIONS PACKAGED DEVICES 70°C -40°C 85°C -40°C 125°C RANGE SMALL OUTLINE TLC555CD TLC555ID TLC555QD SSOP (DB) TLC555CDB CHIP CARRIER (FK) CERAMIC (JG) PLASTIC TLC555CP TLC555IP TLC555MP TSSOP (PW) TLC555CPW
-55°C 125°C TLC555MD TLC555MFK TLC555MJG This package available taped reeled. suffix device type (e.g., TLC555CDR). FUNCTION TABLE RESET VOLTAGE <MIN >MAX >MAX TRIGGER VOLTAGE Irrelevant <MIN >MAX THRESHOLD VOLTAGE Irrelevant Irrelevant >MAX OUTPUT
DISCHARGE SWITCH
>MAX >MAX <MIN previously established conditions shown MAX, appropriate value specified under electrical characteristics.
functional block diagram
CONT THRES RESET
TRIG
DISCH
numbers packages except package. RESET override TRIG, which override THRES.
POST OFFICE 655303
DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
DISCH
COMPONENT COUNT
Transistors Resistors
TRIG RESET
equivalent schematic (each channel)
THRES
CONT
POST OFFICE 655303 DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, (see Note Input voltage range, (any input) Sink current, discharge output Source current, output, Continuous total power dissipation Dissipation Rating Table Operating free-air temperature range, C-suffix 70°C I-suffix 40°C 85°C Q-suffix 40°C 125°C M-suffix 55°C 125°C Storage temperature range 65°C 150°C Case temperature seconds: package 260°C Lead temperature (1/16 inch) from case seconds: package 300°C Lead temperature (1/16 inch) from case seconds: package 260°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTE voltage values with respect network GND. DISSIPATION RATING TABLE PACKAGE 25°C POWER RATING 1375 1050 1000 DERATING FACTOR ABOVE 25°C mW/°C mW/°C 11.0 mW/°C mW/°C mW/°C mW/°C 70°C POWER RATING 85°C POWER RATING 125°C POWER RATING
recommended operating conditions
Supply voltage, TLC555C Operating free temperature range free-air range, TLC555I TLC555Q TLC555M UNIT
POST OFFICE 655303
DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
electrical characteristics specified free-air temperature, TLC555C, TLC555I
PARAMETER VI(TRIG) II(TRIG) VI(RESET) II(RESET) Threshold voltage Threshold current Trigger voltage Trigger current Reset voltage Reset current Control voltage (open circuit) percentage supply voltage Discharge switch stage on-stage voltage Discharge switch off-stage stage current High-level High level output voltage Low-level level output voltage Supply current Note TEST CONDITIONS 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C Full range 25°C Full range 0.07 0.35 0.07 66.7% 0.03 0.25 66.7% 0.03 0.375 TLC555C 0.95 0.85 0.67 0.95 1.05 0.71 0.61 1.33 1.65 1.75 1.29 1.39 TLC555I UNIT
Full range 70°C TLC555C -40°C 85°C TLC555I. conditions shown MAX, appropriate value specified recommended operating conditions table. NOTE These values apply expected operating configurations which THRES connected directly DISCH TRIG.
POST OFFICE 655303
DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
electrical characteristics specified free-air temperature,
PARAMETER TEST CONDITIONS 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C Full range 25°C Full range 25°C Full range 25°C Full range 0.08 0.13 0.21 0.35 0.08 0.13 0.21 0.35 0.08 0.13 66.7% 1.36 1.26 66.7% TLC555C 1.66 1.96 2.06 1.36 1.26 5000 66.7% 1.66 1.96 2.06 1.36 1.26 5000 TLC555I TLC555Q, TLC555M 5000 1.66 1.96 2.06 UNIT
VI(TRIG)
Threshold voltage
Threshold current
Trigger voltage
II(TRIG)
Trigger current
VI(RESET)
Reset voltage
II(RESET)
Reset current Control voltage (open circuit) percentage supply voltage Discharge switch on-state voltage Discharge switch off-state current
0.14
0.14
0.14
0.21 0.45
High-level output voltage
Low-level output voltage
Supply current
Note
Full range 70°C TLC555C, -40°C 85°C TLC555I, -40°C 125°C TLC555Q, -55°C 125°C TLC555M. conditions shown MAX, appropriate value specified recommended operating conditions table. NOTE These values apply expected operating configurations which THRES connected directly DISCH TRIG.
POST OFFICE 655303
DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
electrical characteristics specified free-air temperature,
PARAMETER TEST CONDITIONS 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C High-level output voltage Low-level output voltage Supply current Note 25°C Full range 25°C Full range 25°C Full range 25°C Full range 25°C Full range 25°C Full range 25°C Full range 0.12 0.63 12.5 12.5 13.5 13.5 14.2 14.2 1.28 0.12 0.63 14.9 14.6 14.2 12.5 12.5 13.5 13.5 14.2 14.2 1.28 0.12 0.63 14.9 14.6 66.7% 0.77 14.2 12.5 12.5 13.5 13.5 14.2 14.2 1.28 0.45 1000 14.9 14.6 4.65 4.55 66.7% 0.77 14.2 TLC555C 9.45 9.35 5.35 5.45 4.65 4.55 5000 66.7% 0.77 10.55 10.65 9.45 9.35 5.35 5.45 4.65 4.55 5000 TLC555I 10.55 10.65 TLC555Q, TLC555M 9.45 9.35 5000 5.35 5.45 10.55 10.65 UNIT
VI(TRIG) II(TRIG) VI(RESET) II(RESET)
Threshold voltage
Threshold current
Trigger voltage
Trigger current
Reset voltage
Reset current Control voltage (open circuit) percentage supply voltage Discharge switch on-state voltage Discharge switch off-state current
Full range 70°C TLC555C, -40°C 85°C TLC555I, -40°C 125°C TLC555Q, -55°C 125°C TLC555M. conditions shown MAX, appropriate value specified recommended operating conditions table. NOTE These values apply expected operating configurations which THRES connected directly DISCH TRIG.
POST OFFICE 655303
DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
operating characteristics, 25°C (unless otherwise noted)
PARAMETER Initial error timing interval Supply voltage sensitivity timing interval fmax Output pulse rise time Output pulse fall time Maximum frequency astable mode Note TEST CONDITIONS Note UNIT
Timing interval error defined difference between measured value average value random sample from each process run. NOTE defined Figure
electrical characteristics 25°C
PARAMETER VI(TRIG) II(TRIG) VI(RESET) II(RESET) Threshold voltage Threshold current Trigger voltage Trigger current Reset voltage Reset current Control voltage (open circuit) percentage supply voltage Discharge switch on-state voltage Discharge switch off-state current High-level output voltage 1.36 TEST CONDITIONS 1.66 66.7% 0.14 0.21 0.13 0.08 1.96 UNIT
Low-level voltage level output
Supply current Note NOTE These values apply expected operating configurations which THRES connected directly DISCH TRIG.
POST OFFICE 655303
DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
TYPICAL CHARACTERISTICS
PROPAGATION DELAY TIMES DISCHARGE OUTPUT FROM TRIGGER THRESHOLD SHORTED TOGETHER SUPPLY VOLTAGE
Propagation Delay Times IO(on) 25°C
DISCHARGE SWITCH ON-STATE RESISTANCE FREE-AIR TEMPERATURE
Discharge Switch On-State Resistance
tPHL tPLH
Free-Air Temperature Supply Voltage effects load resistance these values must taken into account separately.
Figure
Figure
APPLICATION INFORMATION
THRES TRIG tPLH TRIGGER THRESHOLD VOLTAGE WAVEFORM tPHL Output tc(L)
tc(H)
CONT RESET TLC555 DISCH
numbers shown packages except package. CIRCUIT
Figure Astable Operation
POST OFFICE 655303
DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
APPLICATION INFORMATION
Connecting TRIG THRES, shown Figure causes timer multivibrator. capacitor charges through threshold voltage level (approximately 0.67 VDD) then discharges through only value trigger voltage level (approximately 0.33 VDD). output high during charging cycle (tc(H)) during discharge cycle (tc(L)). duty cycle controlled values shown equations below. 0.693) c(H) c(L) Period c(H) c(L) c(L) Output driver duty cycle c(H) c(L) c(H) Output waveform duty cycle c(H) c(L)
0.1-µF capacitor CONT Figure decreases period about 10%. formulas shown above allow propagation delay times from TRIG THRES inputs DISCH. These delay times directly period create differences between calculated actual values that increase with frequency. addition, internal on-state resistance during discharge adds provide another source timing error calculation when very very high. equations below provide better agreement with measured values. c(H) -exp
c(L)
-exp
These equations those given earlier similar that time constant multiplied logarithm number function. limit values logarithmic terms must between frequencies extremely high frequencies. duty cycle close 50%, appropriate constant logarithmic terms substituted c(H) with good results. Duty cycles less than require that c(H) possibly ron. These c(H) c(L) c(L) conditions difficult obtain. monostable applications, trip point TRIG voltage applied CONT. input voltage between supply voltage from resistor divider with least 500-µA bias provides good results.
POST OFFICE 655303
DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
MECHANICAL DATA
(R-PDSO-G**)
SHOWN PINS 0.020 (0,51) 0.014 (0,35) 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) 0.008 (0,20) 0.189 (4,80) 0.337 (8,55) 0.386 (9,80) 0.010 (0,25)
PLASTIC SMALL-OUTLINE PACKAGE
0.050 (1,27)
0.197 (5,00)
0.344 (8,75)
0.394 (10,00)
Gage Plane
0.010 (0,25) 0.044 (1,12) 0.016 (0,40)
Seating Plane 0.069 (1,75) 0.010 (0,25) 0.004 (0,10) 0.004 (0,10) 4040047 10/96 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. Body dimensions include mold flash protrusion, exceed 0.006 (0,15). Falls within JEDEC MS-012
POST OFFICE 655303
DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
MECHANICAL INFORMATION
(R-PDSO-G**)
SHOWN 0,65 0,38 0,22 0,15
PLASTIC SMALL-OUTLINE PACKAGE
0,15 5,60 5,00 8,20 7,40
Gage Plane 0,25 1,03 0,63
Seating Plane 2,00 0,05 0,10
PINS
3,30
6,50
6,50
7,50
8,50
10,50
10,50
12,90
2,70
5,90
5,90
6,90
7,90
9,90
9,90
12,30 4040065 10/95
NOTES:
linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-150
POST OFFICE 655303
DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
MECHANICAL INFORMATION
(S-CQCC-N**)
TERMINAL SHOWN
LEADLESS CERAMIC CHIP CARRIER
TERMINALS
0.342 (8,69) 0.442 (11,23) 0.640 (16,26) 0.739 (18,78) 0.938 (23,83) 1.141 (28,99) 0.358 (9,09) 0.458 (11,63) 0.660 (16,76) 0.761 (19,32) 0.962 (24,43) 1.165 (29,59) 0.307 (7,80) 0.406 (10,31) 0.495 (12,58) 0.495 (12,58) 0.850 (21,6) 1.047 (26,6)
0.358 (9,09) 0.458 (11,63) 0.560 (14,22) 0.560 (14,22) 0.858 (21,8) 1.063 (27,0)
0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25)
0.020 (0,51) 0.010 (0,25)
0.055 (1,40) 0.045 (1,14)
0.045 (1,14) 0.035 (0,89)
0.028 (0,71) 0.022 (0,54) 0.050 (1,27)
0.045 (1,14) 0.035 (0,89)
4040140 10/96 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. This package hermetically sealed with metal lid. terminals gold plated. Falls within JEDEC MS-004
POST OFFICE 655303
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TLC555 LinCMOS TIMER
MECHANICAL INFORMATION
(R-GDIP-T8)
0.400 (10,20) 0.355 (9,00)
CERAMIC DUAL-IN-LINE PACKAGE
0.280 (7,11) 0.245 (6,22)
0.065 (1,65) 0.045 (1,14)
0.020 (0,51)
0.310 (7,87) 0.290 (7,37)
0.200 (5,08) Seating Plane 0.130 (3,30)
0.063 (1,60) 0.015 (0,38) 0.100 (2,54)
0.023 (0,58) 0.015 (0,38) 0.014 (0,36) 0.008 (0,20)
0°-15°
4040107/C 08/96 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. This package hermetically sealed with ceramic using glass frit. Index point provided terminal identification only press ceramic glass frit seal only. Falls within MIL-STD-1835 GDIP1-T8
POST OFFICE 655303
DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
MECHANICAL DATA
(R-PDIP-T8)
0.400 (10,60) 0.355 (9,02)
PLASTIC DUAL-IN-LINE PACKAGE
0.260 (6,60) 0.240 (6,10)
0.070 (1,78) 0.020 (0,51) 0.310 (7,87) 0.290 (7,37)
0.200 (5,08) Seating Plane 0.125 (3,18)
0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.010 (0,25) 0.010 (0,25)
4040082 03/95 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. Falls within JEDEC MS-001
POST OFFICE 655303
DALLAS, TEXAS 75265
TLC555 LinCMOS TIMER
MECHANICAL INFORMATION
(R-PDSO-G**)
SHOWN 0,30 0,19
PLASTIC SMALL-OUTLINE PACKAGE
0,65
0,10
0,15 4,50 4,30 6,60 6,20 Gage Plane 0,25 0,75 0,50
Seating Plane 1,20 0,05 0,10
PINS
3,10
5,10
5,10
6,60
7,90
9,80
2,90
4,90
4,90
6,40
7,70
9,60 4040064 08/96
NOTES:
linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-153
POST OFFICE 655303
DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments subsidiaries (TI) reserve right make changes their products discontinue product service without notice, advise customers obtain latest version relevant information verify, before placing orders, that information being relied current complete. products sold subject terms conditions sale supplied time order acknowledgment, including those pertaining warranty, patent infringement, limitation liability. warrants performance products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. Customers responsible their applications using components. order minimize risks associated with customer's applications, adequate design operating safeguards must provided customer minimize inherent procedural hazards. assumes liability applications assistance customer product design. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such products services might used. TI's publication information regarding third party's products services does constitute TI's approval, license, warranty endorsement thereof. Reproduction information data books data sheets permissible only reproduction without alteration accompanied associated warranties, conditions, limitations notices. Representation reproduction this information with alteration voids warranties provided associated product service, unfair deceptive business practice, responsible liable such use. Resale TI's products services with statements different from beyond parameters stated that product service voids express implied warranties associated product service, unfair deceptive business practice, responsible liable such use. Also see: Standard Terms Conditions Sale Semiconductor Products. www.ti.com/sc/docs/stdterms.htm
Mailing Address: Texas Instruments Post Office 655303 Dallas, Texas 75265
Copyright 2001, Texas Instruments Incorporated

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