Semiconductor MSM6794 MATRIX DRIVER WITH 128-CHANNEL This ve

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Semiconductor MSM6794 MATRIX DRIVER WITH 128-CHANNEL This ve

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E2B0046-27-Y2 Semiconductor
Semiconductor MSM6794
MATRIX DRIVER WITH 128-CHANNEL
This version: Nov. 1997 MSM6794 Previous version: Mar. 1996
GENERAL DESCRIPTION
MSM6794 matrix graphic liquid crystal display device display maps. drives panel matrix graphic display under control 8-bit microcomputer. necessary functions driving type built chip. Therefore,by using MSM6794, type matrix graphic liquid crystal display system implemented with small number chips. Since 1-bit data display corresponds light-on/off 1-dot panel (bit system), flexible display, including kanji display, possible. chip comprises graphic display system maximum dots. This display expanded using multiple chips. MSM6794 uses CMOS process. Since internal type, 6794 features power consumption, suited display battery-driven portable equipment.
FEATURES
Segment outputs Common outputs Display duty type internal Display data Standby function program drive bias resistor (externally connected) Built-in voltage multiplier circuit LOGIC voltage driving voltage current consumption Number pads Maximum Maximum 1/33, 1/41, 1/44, 1/48 6,144 bits bits) 8-bit parallel/serial switchable
5.5V (positive voltage) Maximum 10mA standby mode)
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Semiconductor
MSM6794
BLOCK DIAGRAM
SEG1
COM48 SEG128 COM1
drive power supply
Common driver
Segment driver Level shifter Data latch
drive power supply
decoder
Voltage multiplier circuit
display memory
Common counter address counter
decoder
Memory input /output buffer
6-bit conversion circuit VDD1 VDD4 VSS1 VSS3 address counter
address register address register Control register Address register
LCDCK RESET OSC1 OSC2 OSC3 TEST1 TEST2 Timing generator
Clock frequency divider circuit
BUSY
8-bit Serial register
Decoder
control
Input/output buffer
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Semiconductor
MSM6794
ABSOLUTE MAXIMUM RATINGS
Parameter Supply voltage Bias voltage Voltage multiplication reference voltage Input voltage Power dissipation Storage temperature Symbol TSTG Condition Ta=25°C, VDD1-4-VSS1-3 Ta=25°C,V1-V6 VIN-VSS1-3 VIN-VSS1-3 Ta=25°C -0.3 -0.3 -0.3 +4.6 -0.3 VDD+0.3 +150 VIN, VSS1-3 Inputs Rating -0.3 Unit Applicable Pins VDD1-4, VSS1-3
ambient temperature Power dissipation depends heat radiation device attach condition. junction temperature 150°C lower. 25°C; when doubler used. 25°C; when tripler used.
RECOMMENDED OPERATING CONDITIONS
Parameter Supply voltage Bias voltage Voltage multiplicatipon reference voltage Operating frequency Operating temperature Symbol Condition VDD1-4-VSS1-3 V1-V6 VIN-VSS1-3 Note Range Unit Applicable Pins VDD1-4, VSS1-3 VIN, VSS1-3 OSC1
bias potential, highest potential lowest potential. same potential VSS1 VSS3. oscillation external input clock frequency (when frequency dividing ratio divided frequency operation, clock frequency after dividing must within this range.
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Semiconductor
MSM6794
ELECTRICAL CHARACTERISTICS
Characteristics
Parameter input voltage input voltage input voltage input voltage input voltage input voltage input current input current input current input current leakage current output voltage output voltage output voltage output voltage Multiplied voltage Doubler output Multiplied voltage Tripler output output resistance output resistance Supply Current Symbol VIH1 VIH2 VIH3 VIL1 VIL2 VIL3 IIH1 IIH2 IIL1 IIL2 Ioff VOH1 VOH2 VOL1 VOL2 Condition VI=VDD VI=VDD VI=0V VI=0V VI=VDD IO=-1.0mA IO=-1.0mA IO=1.0mA IO=1.0mA IO=-500µA fosc=350kHz IO=-500µA fosc=350kHz IO=±50µA IO=±20µA During display IDD1 External clock fosc 350kHz During display Supply Current IDD2 Internal oscillation fosc 350kHz Supply Current Oscillation frequency IDDS During standby Rf=18k fOSC Cf=56pF Note OSC1, OSC2, OSC3 Min. 0.8VDD 0.8VDD 0.8VDD 0.9VDD 0.9VDD -0.5 -1.0 (VDD=2.7 4.5V, VBI=5 12V, Ta=-25 +85°C) Typ. Max. 0.2VDD 0.2VDD 0.2VDD 0.1VDD 0.1VDD Unit. Unit. Applicable OSC1 DB0-7, LCDCK, FLM, Other input pins OSC1 DB0-7, LCDCK, FLM, Other input pins Input pins excluding DB0-7, LCDCK, DB0-7, LCDCK, FLM, Input pins excluding DB0-7, LCDCK, DB0-7, LCDCK, FLM, LCDCK, FLM, LCDCK, FLM, COM1 COM48 SEG1 SEG128
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Semiconductor Characteristics
MSM6794
(VDD=4.5 5.5V, VBI=5 12V, Ta=-25 +85°C) Parameter input voltage input voltage input voltage input voltage input voltage input voltage input current input current input current input current leakage current output voltage output voltage output voltage output voltage Multiplied voltage Doubler output Multiplied voltage Tripler output output resistance output resistance Supply Current Symbol VIH1 VIH2 VIH3 VIL1 VIL2 VIL3 IIH1 IIH2 IIL1 IIL2 Ioff VOH1 VOH2 VOL1 VOL2 Condition VI=VDD VI=VDD VI=0V VI=0V VI=VDD/0V IO=-1.5mA IO=-1.5mA IO=1.5mA IO=1.5mA IO=-500µA fosc=350kHz IO=-500µA fosc=350kHz IO=±50µA IO=±20µA During display External clock fosc 350kHz During display Internal oscillation fosc=350kHz During standby Rf=22k Cf=56pF Note Min. 0.8VDD 0.8VDD 0.8VDD 0.9VDD 0.9VDD -0.5 -1.0 Typ. Max. 0.2VDD 0.2VDD 0.2VDD 0.1VDD 0.1VDD Unit Applicable OSC1 DB0-7, LCDCK, FLM, Other input pins OSC1 DB0-7, LCDCK, FLM, Other input pins Input pins excluding DB0-7, LCDCK, DB0-7, LCDCK, FLM, Input pins excluding DB0-7, LCDCK, DB0-7, LCDCK, FLM, LCDCK, FLM, LCDCK, FLM, COM1 COM48 SEG1 SEG128
IDD1
Supply Current
IDD2
Supply Current Oscillation frequency
IDDS
fOSC
OSC1, OSC2, OSC3
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Semiconductor
MSM6794
Notes: Voltage multiplication reference voltage maximum when multiplied voltage less. voltage multiplication reference voltage maximum when multiplied voltage more (tripler output). Condition: fosc 350kHz Voltage multiplier circuit configuration: connect following diagram.
Voltage multiplication reference voltage 4.7µF Doubler output Voltage multiplication reference voltage 4.7µF
4.7µF
Tripler output 4.7µF
4.7µF
<Using tripler>
<Using doubler>
multiplied voltage output bias power supply directly connected, voltage multiplier circuit operation malfunction bias power supply noise. countermeasure noise necessary, such inserting series resistor prevent noise from entering multiplied voltage output (VS1, VS2).
4.7µF Tripler output 4.7µF
oscillation circuit configuration: connect following diagram.
OSC1 OSC2 56pF (VDD 4.5V) (VDD 5.5V)
OSC3
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Semiconductor
MSM6794
Characteristics
Parallel interface
Parameter level width level width level width level width WR-RD level width setup time hold time Write data setup time Write data hold time Read data output delay time Read data hold time External clock level width External clock level width RESET pulse width External clock rise time, fall time Symbol tWRH tWRL tWWH tWWL tWWRH tDSW tDHW tDDR tDHR tWCH tWCL tWRE (VDD=2.7 4.5V, VBI=5 12V, Ta=-25 +85°C) Condition CL=50pF Unit
Parallel interface
(VDD=4.5 5.5V, VBI=5 12V, Ta=-25 +85°C) Parameter level width level width level width level width WR-RD level width setup time hold time Write data setup time Write data hold time Read data output delay time Read data hold time External clock level width External clock level width RESET pulse width External clock rise time, fall time Symbol tWRH tWRL tWWH tWWL tWWRH tDSW tDHW tDDR tDHR tWCH tWCL tWRE Condition CL=50pF Unit
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Semiconductor
MSM6794
Parallel Interface Timing Diagram
tWWL
tWWH tWWRH tWRH tWRL
tDSW DB0-DB7 tWRE
tDHW
tDDR
tDHR
RESET
tWCH
OSC1
tWCL
0.8VDD, 0.2VDD 0.9VDD, 0.1VDD
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Semiconductor Serial interface
MSM6794
(VDD=2.7 4.5V, VBI=5 12V, Ta=-25 +85°C) Parameter setup time hold time setup time hold time pulse width pulse width clock cycle time delay time output delay time delay time BUSY delay time setup time pulse width RESET pulse width External clock rise time, fall time Symbol tSAS tSAH tWSHH tWSHL tSYS tOFF tBUSY tSHS tWWL tWRE Condition CL=50pF CL=50pF CL=50pF Unit
Serial interface
(VDD=4.5 5.5V, VBI=5 12V, Ta=-25 +85°C) Parameter setup time hold time setup time hold time pulse width pulse width clock cycle time delay time output delay time delay time BUSY delay time setup time pulse width RESET pulse width External clock rise time, fall time Symbol tSAS tSAH tWSHH tWSHL tSYS tOFF tBUSY tSHS tWWL tWRE Condition CL=50pF CL=50pF CL=50pF Unit
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Semiconductor
MSM6794
Serial Interface Timing Diagram
tSAH
tSAS
tWSHL
tWSHH
tSHS
tSYS
tWWL
tBUSY
tOFF
tWRE
RESET
OSC1
0.8VDD, 0.2VDD 0.9VDD, 0.1VDD
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MSM6794
Serial Interface Input/Output Timing
Input timing
Output timing
BUSY
BUSY
output, bits after input pulse valid.
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Semiconductor
MSM6794
FUNCTIONAL DESCRIPTION
Functional Description (Chip Select) Chip select input pin. Select, Unselect. Internal registers accessed only when this "L". When this "H", becomes high impedance. (Write Enable) This write signal input when parallel interface used. Data written register rising edge signal pulse. This becomes latch signal input when serial interface used. This normally "H". (Read Enable) This read signal input when parallel interface used. Data read while pulse "L". This normally "H". this when serial interface used. (Register Select) Input select register. Setting this selects address register. Setting selects register address register. this changed from while serial interface used, SERW bit) address register automatically reset "0". (Data Buses Data input/output pins parallel interface. These pins normally high impedance status. When "L", each register data output. Leave this open when serial interface used. (Serial Data Input) Data input serial interface. Each register data display data read rising edge SHT, written register falling edge 8-bit data just before rise valid data. this when parallel interface used. (Serial Data Output) Data output serial interface. Each register data output synchronizing with rise SHT. busy/non-busy data, busy ("H") output after rise automatically becomes non-busy ("L") after specified time. This always high impedance status when parallel interface used. (Shift Clock) Clock input serial interface data input/output. Data input synchronizing with rise clock, data output synchronizing with fall clock. This normally "H". this when parallel interface used. (Parallel/Serial Select) Input selecting parallel interface serial interface. Setting this selects parallel interface. Setting selects serial interface. change setting value after power turned 12/34
Semiconductor
MSM6794
(LCD Clock) Input/output display data latch clock. This output master specified input slave specified. more MSM6794 devices, connect LCDCK master with LCDCK slave. (First Line Marker) Input/output first line marker. This output master specified, input slave specified. more MSM6794 devices, connect master with slave. (Display Frequency) Input/output alternating frame signals. This output master specified, input slave specified. more MSM6794 devices, connect master with slave. (Oscillation Input oscillation. Connecting specified capacitor resistor this OSC2 OSC3 pins creates oscillation circuit. generate original oscillation clock externally, input original oscillation clock this pin. OSC3 (Oscillation Oscillation Output pins oscillation. Connecting specified capacitor resistor these pins OSC1 creates oscillation circuit. generate original oscillation clock externally, leave these pins open.
OSC1 OSC2 OSC3
OSC1 OSC2 Open OSC3 Open
External clock
oscillation circuit
external clock input
Oscillation circuit diagram
(Master/Slave) Input switching between master slave. Setting this sets this master side. Setting this sets this slave side. change setting value after power turned (Clock Output) Output original oscillation clock. clock same phase OSC1 output. more MSM6794 devices, connect master with OSC1 slave.
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Semiconductor
MSM6794
RESET (Reset) reset signal input. Setting this sets initial status. status each register display after reset input, "Status Pins Registers after Reset Input". TEST1, TEST2 (Test Signal Test Signal Test signal input pins. These pins used test. these pins permanently. SEG1 SEG128 (Segment Segment 128) Segment signal output pins driving LCD. Leave unused segment pins open. COM1 COM48 (Common Common Common signal output pins driving LCD. COM1 COM33 leave COM34 COM48 open 1/33 duty. COM1 COM41 leave COM42 COM48 open duty. COM1 COM44 leave COM45 COM48 open 1/44 duty. VDD1 VDD4 Pins connect logic power supply. Connect these pins positive pins power supply. VSS1 VSS3 Pins connect power supply. V1,V3, power supply pins segment driver. Connect GND. power supply pins common driver. Connect GND. (Doubler/Tripler Select) Input select voltage multiplier circuit. Setting this selects tripler, setting this selects doubler. change selection after power turned Doubler voltage output pin. Voltage twice high voltage that input from output from this pin. Connect 4.7mF capacitor between this VSS1 VSS3 pins stabilize power supply. When doubler used, connect this with VS2. this level voltage multiplier circuit used. Multiplied voltage output pin. Multiplied voltage output from this pin. tripler used, connect 4.7mF capacitor between this VSS1 VSS3 pins stabilize power supply. doubler used, connect this with VS1. this level voltage multiplier circuit used. VC1, Capacitor connection pins voltage multiplication. Connect 4.7mF capacitor between pins. When electrolytic capacitor used, connect positive side. these pins level voltage multiplier circuit used. Voltage multiplication reference voltage input pin. Voltage three times higher than voltage that input this output from pin. this level voltage multiplier circuit used. 14/34
Semiconductor Registers
Register number Register symbol DRAM Register name Invalid Data
MSM6794
Address register BUSY STBY DISP SERW Display data register address register address register Control register
Register number
DUTY
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Semiconductor
MSM6794
Register Description
Address register (AR)
BUSY STBY DISP SERW
Register number
BUSY (Busy flag) busy ready This indicates that this internal processing. Reading/Writing display memory sets this "1". This becomes busy period maximum clocks reading/writing display memory. Registers other than this register cannot read written while this "1". Setting RESET also sets this "1". This becomes while RESET "L", becomes when RESET becomes "H". case serial interface, becomes high impedance RESET becomes "L". Therefore this cannot read during reset period. This read only. Writing this invalid. STBY (Standby) standby normal This sets this standby mode. This enters standby mode writing this bit, returns from standby mode normal mode writing this bit. This normal status setting RESET "L". Setting this standby mode busy state cause malfunction. details standby mode, "Pin status during Standby Operation Register Status after Cancellation". DISP (Display on/off) display display This sets ON/OFF liquid crystal display connected this Writing this turns liquid crystal display writing turns OFF. This used prevent random display until initialization display memory after power-on. This display status setting RESET "L". SERW (Serial Data Read/Write) writing registers other than address register invalid writing registers valid This limits writing registers when serial interface used. Writing this disables writing registers other than address register, writing enables writing registers. This command make registers read-only when serial interface used. When serial data read from pin, this disables writing registers other than address register, even data input pin. This valid only when serial interface used. When parallel interface used, writing this invalid, always read from this bit. This write enable registers setting RESET "L". This automatically reset each time from "L". 16/34
Semiconductor
MSM6794
(high impedance) output control) high impedance output enable This sets status when serial interface used. Writing this sets high impedance state, writing this sets output enable state. This valid only when serial interface used. When parallel interface used, writing this invalid, always read from this bit. This high impedance state setting RESET "L". (Invalid Bit) Writing this invalid, always read from this bit. (Register Number) These bits select register other than address register. relationship between each each register shown table below.
Code Register Name Display data register address register address register Control register
These bits reset (D1, (display data register select status) setting RESET "L".
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Semiconductor Display data register (DRAM)
8-bit DATA 6-bit DATA
MSM6794
This register used write read display data from liquid crystal display RAM. contents this register written read from address address register address register. length display data selected bit) control register. 6-bit data selected, writing invalid, always read from these bits. 6-bit DATA) MSB, LSB. content this register does change, even RESET "L". address register (XAR)
This register used address liquid crystal display RAM. 8-bit data selected bit) control register, addresses to15 (00H 0FH). 6-bit data selected, addresses (00H 15H). other addresses set, operation unpredictable. Writing bits invalid, always read from these bits. This register reset setting RESET "L". address register (YAR)
This register used address liquid crystal display RAM. 1/48 duty selected DUTY bits (D1, bits) control register, address value (00H 2FH). 1/44 duty selected, address value (00H 2BH). 1/41 duty selected, address value (00H 28H), 1/33 duty selected, address value (00H 20H). other values set, operation unpredictable. Writing bits invalid, always read from these bits. This register reset setting RESET "L".
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Semiconductor Control register (FCR)
MSM6794
DUTY
(Address Increment Direction) direction direction This sets address increment direction display RAM. address display automatically incremented writing data display data register. Writing this sets address increment, writing this sets address increment. details address increment, Address Counter Auto Increment". value this register does change, even RESET "L". (Word Length Select) bits bits This selects read/write word length display RAM. Writing this sets read/write data display units, writing this sets read/write data display units. Select word length according character font used. value this register does change, even RESET "L". (Invalid Bit) Writing this invalid. always read from this bit. (Frame Frequency Select) This selects internal clock frequency dividing ratio original oscillation frequency. Correspondence between each each frequency dividing ratio shown table below.
Code Frequency Dividing Ratio TEST TEST
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MSM6794
When original oscillation frequency 350kHz frequency dividing ratio frame frequency about 80Hz. When display data register written/read, busy time maximum original oscillation clocks. original oscillation frequency increased shorten busy time, frame frequency increases proportion original oscillation frequency. this case frequency dividing ratio must changed that frame frequency falls range 100Hz. details relation between original oscillation frequency frame frequency, "Original Oscillation Frequency Frame Frequency". (D4, combinations which uses testing. these combinations used user, operation this unpredictable. value this register does change even RESET "L". Once frame frequency after power turned value cannot changed. change frame frequency, again according power-on flowchart. "Power-on Flowchart". DUTY (Display Duty Select) These bits select display duty. Correspondence between each display duty shown table below.
Code DUTY 1/48 1/44 1/41 1/33
value this register does change, even RESET "L". Once display duty after power turned value cannot changed. change display duty, again according power-on flowchart. "Power-on Flowchart".
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Semiconductor
MSM6794
Status Pins Registers After Reset Input
following tables show register status after reset input.
OSC2, LCDCK Status Clock output oscillation status Clock output High impedance (master), high impedance (slave) (master), high impedance (slave) (master), high impedance (slave)
Register Address register Display data register address register address register Control register
Status "1", other bits reset "0". Display data held Reset Reset "0". change from status before inputting reset
Status during Standby Operation Register Status after Cancellation
following tables show status during standby operation register status after cancellation.
OSC2 OSC3 LCDCK Status High impedance (master), high impedance (slave) (master), high impedance (slave) (master), high impedance (slave)
Register Address register Display data register address register address register Control register
Status STBY "0", other bits maintain data before standby Maintains data before standby Reset Reset Maintains data before standby
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Semiconductor
MSM6794
Address Counter Auto Increment
liquid crystal display MSM6794 address counter address counter, both have auto increment function. Writing/reading display data increments either address counter. bit) control register selects address incremented. (When address selected:) Address count cycle address counter changes depending word length: 6-bit. word length 8-bit, address counted range. word length 6-bit, address counted range. When maximum value address count value 8-bit word length, 6-bit word length) returns "0", address count value also automatically incremented. (When address selected:) address count address counter changes depending display duty: 1/33, 1/41, 1/44 1/48. display duty 1/33, address counted range. display duty 1/41, address counted range. display duty 1/44, address counted range. display duty 1/48, address counted range. When maximum value address count value display duty 1/33, display duty 1/41, display duty 1/44, display duty 1/48) returns "0", address count value also automatically incremented. (Note) address other than count cycle address counter, count operation becomes abnormal. Example address increment (8-bit word length, 1/33 duty)
address
address
Example address increment (8-bit word length, 1/33 duty)
address
address
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Semiconductor
MSM6794
Display Screen Memory Address
MSM6794 includes type display bit). Display data written display memory with (Xn, address, (Xn+7, address, shown Figure Writing display memory turns light writing turns light off. address assignment memory address changes depending selection word length: bits bits. memory address bits word, bits word. When address with bits word, display memory bits. bits (D5, from data display written memory, with remaining bits becoming invalid.
SEG128 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8
COM1 COM2 panel
COM48 direction
X127
Address assignment bits/word
bits) bits) bits)
direction
Figure Correspondence between display screen memory
Address assignment bits/word
display
Figure Display memory address 23/34
Semiconductor
MSM6794
Power-on Flowchart (Serial Interface)
Power
Reset input
5µs, external power-on reset
Chip enable
"L",
(Standby setting, select, output enable)
"H",
Select duty according specification. FFS, WLS, INC.
"L",
(Standby release, DRAM select)
"H". Input display data.
Wait clocks
Note: This wait wait during busy period. detect busy wait until busy output from "L".
Initial screen data input complete?
"L", Arbitrary
(DISP Normal operation
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Semiconductor
MSM6794
STBY Setting Cancellation Flowchart
Normal operation
Check BUSY data
Confirm non-busy.
Non-busy?
"L",
Arbitrary (Standby setting)
Standby status
"L",
Arbitrary (Standby release) Wait until oscillation stabilizes
Wait until voltage multiplier circuit stabilizes
"L",
Arbitrary (DISP Normal operation
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Semiconductor
MSM6794
Original Oscillation Frequency Frame Frequency
Frame frequency calculation 1/33, 1/44, 1/48 DUTY: (Original oscillation clock cycle) (1/frequency dividing ratio) 4224 frame cycle Formula 1/41 DUTY: (Original oscillation clock cycle) (1/frequency dividing ratio) 4264 frame cycle Formula Frame frequency calculated above formulas. Example original oscillation [kHz], frequency dividing ratio 1/1, 1/33 duty specification: formula frame cycle 4224 12.1 [ms] Therefore, frame frequency 82.9 [Hz] Example original oscillation [MHz], frequency dividing ratio 1/3, 1/41 duty specification: formula frame cycle 4264 12.8 [ms] Therefore, frame frequency 78.2 [Hz] Original oscillation frequency BUSY time When data written read, data processing time (BUSY time) occurs. BUSY time maximum [(original oscillation clock cycle) original oscillation frequency increases, BUSY time becomes shorter (not influenced frequency dividing ratio). increasing original oscillation frequency, BUSY time made shorter proportion. this case frame frequency also increases. frequency dividing ratio that frame frequency reaches frequency close frame frequency used.
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Semiconductor
MSM6794
Drive Power Supply
output example (COM1)
line
frame output example Light ON/light
Light Light
input power supply input power supply
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Semiconductor
MSM6794
APPLICATION CIRCUITS
Application example (1/48 duty, serial interface, voltage multiplier circuit (tripler) used, single chip)
panel
characters lines dots) Kanji Alphabet characters line dots) Cursor lines
Temperature compensation stabilization circuit
lines 4.7µF
lines S128 OSC1 OSC2 OSC3 TEST1 TEST2 56pF OPEN
4.7µF 4.7µF Bias generation circuit
MSM6794
100k RESET
LCDCK
OPEN
OPEN
PORT
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Semiconductor Application example (1/33 duty, parallel interface, voltage multiplier circuit unused, single chip)
MSM6794
panel
Kanji characters lines dots) Symbol line
Temperature compensation stabilization circuit
OPEN
lines
lines S128 OSC1 OSC2 OSC3 TEST1 TEST2 56pF OPEN
Bias generation circuit
MSM6794
100k RESET
LCDCK
OPEN
OPEN
PORT
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panel (SEG) (COM) OPEN lines S128 OCS1 OCS2 OCS3 TEST1 TEST2 OPEN OCS1 OCS2 56pF OCS3 22kW TEST1 TEST2
Kanji characters lines dots) Alphabet characters line dots) Cursor lines
Semiconductor
lines lines S128
Temperature compensation stabilization circuit
4.7µF
4.7µF
4.7µF
Bias generation circuit
MSM6794 (MASTER)
RESET
MSM6794 (SLAVE)
100kW RESET
Application example (1/48 duty, serial interface, chips used, cascade connection)
LCDCK
LCDCK OPEN
OPEN
PORT
MSM6794
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Semiconductor
MSM6794
Interface Connection Example
serial interface (only control signals described)
(Master)
(Slave)
PORT
Master slave control operation Connect above diagram. master side slave side selected setting respectively. Rise fall signal level after confirming NON-BUSY. Example continuous writing data (all master addresses slave addresses):
write start
CS(M) "L", CS(S) "L", write start address setting
CS(M) "L", CS(S) "H", master side data write
Master address data write completed
CS(M) "H", CS(S) "L", slave side data write
Slave address data write completed
write completed
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CONFIGURATION (TOP VIEW)
Layout
Coordinates
Name X(µm) Y(µm) VDD1 VDD2 OSC1 OSC2 OSC3 VSS1 VSS2 RESET -3377 -3784 -3257 -3784 -3137 -3784 -3017 -3784 -2897 -3784 -2777 -3784 -2647 -3784 -2453 -3784 -2284 -3784 -2215 -3784 -1962 -3784 -1842 -3784 -1712 -3784 -1519 -3784 -1317 -3784 -1186 -3784 -1066 -3784 -946 -3784 -826 -3784 -706 -3784 -586 -3784 -404 -3784 -235 -3784 -3784 -103 -3784 Name X(µm) Y(µm) TEST1 TEST2 LCDCK VDD3 VSS3 VDD4 -3784 -3784 -3784 -3784 -3784 Name X(µm) Y(µm) 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 -3306 -3186 -3066 -2946 -2826 -2706 -2586 -2466 -2346 -2226 -2106 -1986 -1866 -1746 -1626 -1506 -1386 -1266 -1146 -1026 -906 -786 -666 -546 -426
1098 -3784 1218 -3784 1399 -3784 1568 -3784 1737 -3784 1937 -3784 2057 -3784 2177 -3784 2297 -3784 2417 -3784 2537 -3784 2657 -3784 2777 -3784 2897 -3784 3017 -3784 3137 -3784 3257 -3784 3377 -3784 4058 -3546 4058 -3426
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Name X(µm) Y(µm) S128 S127 S126 S125 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 4058 -306 -186 1014 1134 1254 1374 1494 1614 1734 1854 1974 2094 2214 2334 2454 2574
Name X(µm) Y(µm) S124 S123 S122 S121 S120 S119 S118 S117 S116 S115 S114 S113 S112 S111 S110 S109 S108 S107 S106 S105 S104 S103 S102 S101 S100 4058 4058 4058 4058 4058 4058 4058 4058 3332 3212 3092 2972 2852 2732 2612 2492 2372 2252 2132 2012 1892 1772 1652 1532 1412 2694 2814 2934 3054 3174 3294 3414 3534 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824
Name X(µm) Y(µm) 1292 1172 1052 -147 -267 -387 -507 -627 -747 -867 -987 -1107 -1277 -1347 -1467 -1587 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824 3824
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Semiconductor
MSM6794
Name X(µm) Y(µm) -1707 3824 -1827 3824 -1947 3824 -2067 3824 -2187 3824 -2307 3824 -2427 3824 -2547 3824 -2667 3824 -2787 3824 -2907 3824 -3207 3824 -3147 3824 -3267 3824 -3387 3824 -4058 3534 -4058 3414 -4058 3294 -4058 3174 -4058 3054 -4058 2934 -4058 2814 -4058 2694 -4058 2574 -4058 2454
Name X(µm) Y(µm) -4058 2334 -4058 2214 -4058 2094 -4058 1974 -4058 1854 -4058 1734 -4058 1614 -4058 1494 -4058 1374 -4058 1254 -4058 1134 -4058 1014 -4058 -4058 -4058 -4058 -4058 -4058 -4058 -4058 -4058
Name X(µm) Y(µm) -4058 -4058 -4058 -666 -786 -906
-4058 -1026 -4058 -1146 -4058 -1266 -4058 -1386 -4058 -1506 -4058 -1626 -4058 -1746 -4058 -1866 -4058 -1986 -4058 -2106 -4058 -2226 -4058 -2346 -4058 -2466 -4058 -2586 -4058 -2706 -4058 -2826 -4058 -2946 -4058 -3066 -4058 -3186 -4058 -3306 -4058 -3426
-4058 -186 -4058 -306 -4058 -426 -4058 -546
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Semiconductor MSM6794 MATRIX DRIVER WITH 128-CHANNEL This ve

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