64M-BIT Mask PDIP Package Only organization (word mode) Fast acce
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MX23C6410
64M-BIT Mask PDIP Package Only
organization (word mode) Fast access time Random access: 100ns (max.) Current Operating: 70mA Supply voltage 5V±10% Package PDIP (600mil)
ORDER INFORMATION
Part Access Time MX23C6410PC-10 100ns MX23C6410PC-12 120ns MX23C6410PC-15 150ns Package PDIP PDIP PDIP
DESCRIPTION CONFIGURATION
PDIP (Word mode only without pin)
Symbol A0~A21 D0~D15
Function Address Inputs Data Outputs Output Enable Input Power Supply Ground Connection
MX23C6410
MODE SELECTION
D15/A-1 D0~D7 Output High D0~D7 D8~D15 High D8~D15 Mode Word Power Active Active
BLOCK DIAGRAM
Address Buffer
Memory Array
Page Buffer
Output Buffer
P/N:PM0828
REV. 1.1, JUL. 2001
MX23C6410
ABSOLUTE MAXIMUM RATINGS
Item Voltage Relative Ambient Operating Temperature Storage Temperature Note: Symbol Topr Tstg Ratings -0.8V VCC+2.0V (Note) -65° 125°
Minimum voltage input pins -0.5V. During voltage transitions, inputs undershoot -0.8V periods 20ns. Maximum voltage input pins VCC+0.5V. During voltage transitions, input overshoot VCC+2.0V periods 20ns.
CHARACTERISTICS 70°C, 5V±10%)
Item Output High Voltage Output Voltage Input High Voltage Input Voltage Input Leakage Current Output Leakage Current Operating Current Input Capacitance Output Capacitance Symbol ICC1 COUT MIN. 2.4V 2.2V -0.3V MAX. 0.4V VCC+0.3V 0.8V 70mA 10pF 10pF Conditions -1.0mA 2.1mA
f=5MHz, output open 1MHZ 1MHZ
CHARACTERISTICS 5V±10%)
Item Read Cycle Time Address Access Time Output Enable Time Output Hold After Address Output High Delay Symbol 23C6410-10 MIN. MAX. 100ns 100ns 50ns 20ns 23C6410-12 MIN. MAX. 120ns 120ns 60ns 20ns 23C6410-15 MIN. MAX. 150ns 150ns 70ns 20ns
Note:Output high-impedance delay (tHZ) measured from going high, this parameter guaranteed design over full voltage temperature operating range tested.
P/N:PM0828
REV. 1.1, JUL. 2001
MX23C6410
Test Conditions
Input Pulse Levels Input Rise Fall Times Input Timing Level Output Timing Level Output Load 0.4V~ 2.4V 10ns 1.4V 0.8V 2.0V Figure
(load)=-1mA DOUT (load)=2.1mA
C<100pF
Note:No output loading present tester load board. Active loading used under software programming control. Output loading capacitance includes load board's stray capacitance.
TIMING DIAGRAM
RANDOM READ
DATA
VALID
VALID
VALID
Note: enable
P/N:PM0828
REV. 1.1, JUL. 2001
MX23C6410
PACKAGE INFORMATION
42-PIN PLASTIC DIP(600 mil)
P/N:PM0828
REV. 1.1, JUL. 2001
MX23C6410
REVISION HISTORY
Revision Description Range 100ns speed grade changed, 5%-> Page Date JUL/27/2001
P/N:PM0828
REV. 1.1, JUL. 2001
MX23C6410
MACRONIX INTERNATIONAL CO., LTD.
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http //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves right change product specifications without notice.
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