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KS57C5616/P5616 single-chip CMOS microcontroller designed high perform


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KS57C5616/P5616
KS57C5616/P5616 single-chip CMOS microcontroller designed high performance application Caller-ID, Telephone using Samsung's newest 4-bit core, SAM47 (Samsung Arrangable Microcontrollers). Featuring DTMF generator, up-to-960-dot direct drive capability, 8-bit timer/counter flexible 8-bit timer/counters, serial interface, KS57C5616/P5616 offer excellent design solution wide variety applications requiring DTMF, support. (including COM/SEG) pins 100-pin package dedicated I/O. Nine vectored interrupts provide fast response internal external events. addition advanced CMOS technology KS57C5616/P5616 ensures power consumption with wide operating voltage range.
KS57C5616 microcontroller also available (One Time Programmable) version, KS57P5616. KS57P5616 microcontroller on-chip 16K-byte one-time-programmable EPROM instead masked ROM. KS57P5616 comparable KS57C5616, both function configuration.
KS57C5616/P5616
FEATURES SUMMARY
Memory 8-bit 5,120 4-bit (excluding RAM) 8-bit Serial Interface 8-bit transmit/receive mode 8-bit receive mode LSB-first MSB-first transmission selectable
Pins Input only: 4pins (Not including COM/SEG) 6pins (Including COM/SEG) I/O: 15pins (Not including COM/SEG) 43pins (Including COM/SEG)
Controller/Driver terminals selectable 8-15: shared with port SEG40-59: shared with port kinds bias resistor value
Memory-Mapped Structure Data memory bank
Sequential Carrier Supports 16-bit serial data transfer arbitrary format
8-bit Basic Timer Four interval timer functions Watchdog timer
Interrupts Four external interrupt vectors Five internal interrupt vectors quasi-interrupts
8-bit Timer/Counter Programmable 8-bit timer External event counter Arbitrary clock frequency output External clock signal divider
Power-Down Modes Idle mode (only clock stops) Stop mode (main system oscillation stops) Subsystem clock stop mode
16-Bit Timer/Counter Programmable 16-bit timer External event counter Arbitrary clock frequency output External clock signal divider Configurable 8-bit Timers Serial interface clock generator
Oscillation Sources Crystal Ceramic system clock Oscillation frequency: 0.4-6.0 clock divider circuit
Instruction Execution Times 1.12, 2.23, 17.88 3.58 0.67, 1.33, 10.7 32.768 (subsystem)
Watch Timer Time interval generation: 32.768 frequency outputs (0.5, kHz) 32.768
Operating Temperature
Comparator 4-channel mode: Internal reference (4-bit resolution); 16-step variable reference voltage 3-channel mode: External reference
Operating Voltage Range (except DTMF Comparator) (include DTMF) (include Comparator)
DTMF Generator dual-tone tone dialing
Package Type 100-pin (1420C)
KS57C5616/P5616
BLOCK DIAGRAM
P7.0/SEG55/CIN0 P7.1/SEG54/CIN1 P7.2/SEG53/CIN2 P7.3/SEG52/CIN3 P1.0-P1.3/ INT0-INT4 P2.0/CLO P2.1/VLC1 P2.2 P3.0/TCLO0 P3.1/TCLO1 P3.2/TCL0 P3.3/TCL1 P4.0-P4.3/ COM8-COM11 P5.0-P5.3/ COM12-COM15 P6.0-P6.3 SEG59-SEG56/ KS4-KS7 P7.0/SEG55/CIN0 P7.1/SEG54/CIN1 P7.2/SEG53/CIN2 P7.3/SEG52/CIN3 P8.0/SEG51/LCDCK P8.1/SEG50/LCDSY P8.2/SEG49 P8.3/SEG48 P9.0-P9.3/ SEG47-SEG44 P10.0-P10.3/ SEG43-SEG40
Comparator RESET Input Port XOUT XTIN XTOUT
Basic Timer Watch Timer
Watchdog Timer
Port
Interrupt Control Block
Clock
Instruction Register Driver/ Controller Program Counter
VLC1 COM0-COM7 P4.0-P5.3/ COM8-COM15 SEG0-SEG39 P10.3-P6.0/ SEG40-SEG59
Port Internal Interrupts
Port Port
Instruction Dcoder Port Port Arithmetic Logic Unit
Serial Program Status Word Port Stack Pointer
P0.0/SCK/KO P0.1/SO/K1 P0.2/SI/K2 P0.3/BUZ/K3 DTMF
DTMF Generator
Port Port 8-Bit Timer/ Counter 16-Bit Timer/Counter (Two 8Bit Timer/Counter) 4-bit 16KB
Port
Figure 1-1. KS57C5616 Block Diagram
KS57C5616/P5616
ASSIGNMENTS
SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28
SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 DTMF P0.0/SCK/K0 P0.1/SO/K1 P0.2/SI/K2 P0.3/BUZ/K3 XOUT TEST XTIN XTOUT
RESET
P1.0/INT0 P1.1/INT1 P1.2/INT2 P1.3/INT4 P2.0/CLO P2.1/VLC1 P2.2 P3.0/TCLO0
SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 P10.3/SEG40 P10.2/SEG41 P10.1/SEG42 P10.0/SEG43 P9.3/SEG44 P9.2/SEG45 P9.1/SEG46 P9.0/SEG47 P8.3/SEG48 P8.2/SEG49 P8.1/SEG50/LCDSY P8.0/SEG51/LCDCK P7.3/SEG52/CIN3 P7.2/SEG53/CIN2 P7.1/SEG54/CIN1 P7.0/SEG55/CIN0 P6.3/SEG56/K7 P6.2/SEG57/K6 P6.1/SEG58/K5
Figure 1-2. KS57C5616 Assignments (100-QFP Package)
P3.1/TCLO1 P3.2/TCL0 P3.3/TCL1 COM0 COM1 COM2 COM3 COM4 COM5 COM6 COM7 P4.0/COM8 P4.1/COM9 P4.2/COM10 P4.3/COM11 P5.0/COM12 P5.1/COM13 P5.2/COM14 P5.3/COM15 P6.0/SEG59/K4
KS57C5616 (100-QFP-1420C)
KS57C5616/P5616
DESCRIPTIONS
Table 1-1. KS57C5616 Descriptions Name P0.0 P0.1 P0.2 P0.3 Type Description 4-bit port. 1-bit 4-bit read/write test possible. Individual pins software configurable input output. Individual pins software configurable open-drain push-pull output. 4-bit pull-up resistors software assignable; pull-up resistors automatically disabled output pins. 4-bit input port. 1-bit 4-bit read test possible. 4-bit pull-up resistors software assignable. Same port except that port 3-bit port. Share
SCK/K0
SO/K1 SI/K2 BUZ/K3
P1.0 P1.1 P1.2 P1.3 P2.0 P2.1 P2.2 P3.0 P3.1 P3.2 P3.3 P4.0-P4.3 P5.0-P5.3
INT0 INT1 INT2 INT4 VLC1 TCLO0 TCLO1 TCL0 TCL1 COM8-COM11 COM12-COM15
Same port
4-bit ports. 4-bit 8-bit read/write test possible. Individual pins software configurable input output. 4-bit pull-up resistors software assignable; pull-up resistors automatically disabled output pins. Same
P6.0-P6.3
SEG59- SEG56/K4-K7 SEG55/CIN0- SEG52/CIN3
P7.0-P7.3 P8.0-P8.1 Input ports. 4-bit 8-bit read test possible. 4-bit pull-up resistors software assignable; pull-up resistors automatically disabled output pins. These pins used push-pull output. Refer NOTES Table 10-3. Port Mode Group Flags. Same
SEG51/LCDCK SEG50/LCDSY
P8.2-P8.3
SEG49 SEG48 SEG47-SEG44
P9.0-P9.3 P10.0-P10.3
Same Serial interface clock signal. Serial data output.
SEG43-SEG40 P0.0/K0 P0.1/K
KS57C5616/P5616
Table 1-1. KS57C5616 Descriptions (Continued) Name INT0, INT1 INT2 INT4 TCLO0 TCLO1 TCL0 TCL1 CIN0 CIN1 CIN2 CIN3 DTMF LCDCK LCDSY COM0-COM7 COM8-COM11 COM12-COM15 SEG0-SEG39 SEG40-SEG59 K0-K3 K4-K7
RESET
Type Serial data input.
Description 0.5, frequency output buzzer sound. External interrupts. triggering edge INT0 INT1 selectable. Quasi-interrupt with detection rising falling edges. External interrupt with detection rising falling edge. Clock output Timer/counter clock output. Timer/counter clock output. External clock input timer/counter External clock input timer/counter 4-Channel comparator input CIN0-CIN2: comparator input only CIN3: comparator input external reference input DTMF output clock output synchronization clock output. common signal output.
Share P0.2/K2 P0.3/K3 P1.0, P1.1 P1.2 P1.3 P2.0 P3.0 P3.1 P3.2 P3.3 P7.0/SEG55 P7.1/SEG54 P7.2/SEG53 P7.3/SEG52 P8.0/SEG51 P8.1/SEG50 P4.0-P4.3 P5.0-P5.3
segment signal output. External interrupt (triggering edge selectable) Main power supply. Ground. Reset signal. power supply. Crystal, Ceramic oscillator pins system clock. Crystal oscillator pins subsystem clock. Chip test input pin. Hold when device operating.
P10.3-P6.0 P0.0-P0.3 P6.0-P6.3
VLC1 XIN, XOUT XTIN, XTOUT TEST
NOTE: Pull-up resistors ports automatically disabled they configured output mode.
KS57C5616/P5616
Table 1-2. Supplemental KS57C5616 Data Names P0.0-P0.3 P1.0-P1.3 P2.0 P2.1 P2.2 P3.0-P3.1 P3.2-P3.3 P4.0-P4.3 P5.0-P5.3 P6.0-P6.3 P7.0-P7.2 P7.3 P8.0-P8.1 P8.2-P8.3 P9.0-P9.3 P10.0-P10.3 COM0-COM7 SEG0-SEG39 DTMF
RESET
Share Pins
SCK/K0, SO/K1,
Type
RESET
Value
Circuit Type H-24 H-25 H-26 H-27 H-28 H-24 H-24 H-24
Input Input Input Input Input Input Input Input Input Input Input Input Input Input Input High High High impedance
SI/K2, BUZ/K3 INT0, INT1 INT2, INT4 VLC1 TCLO0, TCLO1 TCL0, TCL1 COM8-COM11 COM12-COM15 SEG59/K4- SEG56/K7 SEG55/CIN0- SEG53/CIN2 SEG52/CIN3 SEG51-SEG50 SEG49-SEG48 SEG47-SEG44 SEG43-SEG40
VLC1 XIN, XOUT XTIN, XTOUT TEST
KS57C5616/P5616 (Preliminary Spec)
CIRCUIT DIAGRAMS
Pull-Up Resistor
P-Channel N-Channel
Schmitt Trigger
Figure 1-3. Circuit Type
Figure 1-5. Circuit Type
Pull-Up Resistor Pull-Up Resistor Enable Data
P-CH
Output DIsable Schmitt Trigger
N-CH
Figure 1-4. Circuit Type
Figure 1-6. Circuit Type
KS57C5616/P5616
Pull-up Resistor Pull-up Resistor Enable N-CH
P-CH Data Output DIsable
Figure 1-7. Circuit Type
Pull-up Resistor Pull-up Resistor Enable N-CH
P-CH Data Output DIsable
Schmitt Trigger
Figure 1-8. Circuit Type
KS57C5616/P5616
Pull-up Resistor Pull-up Resistor Enable N-CH
P-CH Data Output DIsable
Digital Input VLCEN
Figure 1-9. Circuit Type
1-10
KS57C5616/P5616
VLC2
VLC3
COM/SEG
VLC4
VLC5
VLC6
Figure 1-10. Circuit Type
KS57C5616/P5616
VLC2
VLC3
SEG/COM Data Output DIsable
VLC4
VLC5
Figure 1-11. Circuit Type H-23
1-12
KS57C5616/P5616
Pull-up Resistor Pull-up Resistor Enable COM/SEG LCD_ON Data Output DIsable Circuit Type H-23 Circuit Type
Figure 1-12. Circuit Type H-24
Pull-up Resistor Pull-up Resistor Enable COM/SEG LCD_ON Data Output DIsable Circuit Type H-23 Circuit Type
Figure 1-13. Circuit Type H-25
1-13
KS57C5616/P5616
Pull-up Resistor Pull-up Resistor Enable COM/SEG LCD_ON Data Output DIsable Analog Input Digital Circuit Type H-23 Circuit Type P-CH
Analog
Figure 1-14. Circuit Type H-26
1-14
KS57C5616/P5616
Pull-up Resistor Pull-up Resistor Enable COM/SEG Data Output DIsable Analog Input Digital Circuit Type H-23 Circuit Type P-CH
External
Analog External
Figure 1-15. Circuit Type H-27
1-15
KS57C5616/P5616
Pull-up Resistor Pull-up Resistor Enable COM/SEG LCD_ON LCDCK/CLDSY LCDCK/LCDSY Enable Circuit Type H-23 Circuit Type
Output DIsable
Figure 1-16. Circuit Type H-28
DTMF Disable
Figure 1-17. Circuit Type
1-16
KS57C5616/P5616
ELECTRICAL DATA
ELECTRICAL DATA
this section, information KS57C5616 electrical characteristics presented tables graphics. information arranged following order: Standard Electrical Characteristics Absolute maximum ratings D.C. electrical characteristics Main system clock oscillator characteristics Subsystem clock oscillator characteristics capacitance A.C. electrical characteristics Operating voltage range Stop Mode Characteristics Timing Waveforms data retention supply voltage stop mode Stop mode release timing when initiated RESET Stop mode release timing when initiated interrupt request Miscellaneous Timing Waveforms timing measurement point Clock timing measurement Clock timing measurement XTIN timing Input timing RESET Input timing external interrupts Serial data transfer timing
ELECTRICAL DATA
KS57C5616/P5616
Table 16-1. Absolute Maximum Ratings Parameter Supply Voltage Input Voltage Output Voltage Output Current High Output Current Symbol Ports 0-10 active pins active active Conditions Rating (Peak value) Total ports 2-10 Operating Temperature Storage Temperature Tstg
Duty
(note)
Units
(Peak value) (note)
NOTE: values Output Current (IOL) calculated Peak Value
Table 16-2. D.C. Electrical Characteristics Parameter Input High Voltage Symbol VIH1 VIH2 VIH3 Input Voltage VIL1 VIL2 VIL3 Output High Voltage Output Voltage Conditions input pins except those specified below VIH2-VIH3 Ports P3.2, P3.3,
RESET
Units
XIN, XOUT, XTIN input pins except those specified below VIL2-VIL3 Ports P3.2, P3.3,
RESET
0.3VDD 0.2VDD
XIN, XOUT, XTIN Ports 2-10 Ports 2-10
16-2
KS57C5616/P5616
ELECTRICAL DATA
Table 16-2. D.C. Electrical Characteristics (Continued) Parameter Input High Leakage Current Symbol ILIH1 Conditions input pins except those specified below ILIH2 XIN, XTIN input pins except RESET, XIN, XTIN XIN, XTIN output pins output pins Port 0-10 Voltage Dividing Resistor (Note) |VDD-COMi| Voltage Drop 0-15) |VDD-SEGx| Voltage Drop 0-59) VLCX Output Voltage RLCD1 RLCD2 common segment clock RESET Units
ILIH2 Input Leakage Current ILIL
ILIL2 Output High Leakage Current Output Leakage Current Pull-Up Resistor ILOH
ILOL
VLC1 VLC2 VLC3 VLC4 VLC5
VDD-0.2 0.8VDD-0.2 0.6VDD-0.2 0.4VDD-0.2 0.2VDD-0.2
0.8VDD 0.6VDD 0.4VDD 0.2VDD
VDD+0.2 0.8VDD+0.2 0.6VDD+0.2 0.4VDD+0.2 0.2VDD+0.2
NOTE: RLCD1 Voltage dividing resistor when LCON.1 "0", RLCD2 when LCON.1 "1".
16-3
ELECTRICAL DATA
KS57C5616/P5616
Table 16-2. D.C. Electrical Characteristics (Concluded) Parameter
Supply Current
Symbol
IDD1 (DTMF
Conditions
mode; 3.58 X-tal oscillator, 22pF mode; Crystal oscillator 22pF 3.58
Units
IDD2 (DTMF off)
IDD3
Idle mode; Crystal oscillator 22pF
3.58 3.58
3.58
IDD4 IDD5 IDD6
mode; Crystal oscillator Idle mode; Crystal oscillator SCMOD 0000 Stop mode; XTIN SCMOD 0100 Stop mode; Temp Temp band Temp
17.5
16.0 14.0
11.0
Tone level Ratio Column tone Distortion (Dual tone)
VROW dBCR
NOTES: Data includes power consumption subsystem clock oscillation. When system clock control register, SCMOD, 1001B, main system clock oscillation stops subsystem clock used. Currents following circuits included: on-chip pull-up resistors, internal voltage dividing resistors, output port drive currents.
16-4
KS57C5616/P5616
ELECTRICAL DATA
Table 16-3. Main System Oscillator Characteristics Oscillator Ceramic Oscillator Clock Configuration
XOUT
Parameter Oscillation frequency
Test Condition
Units
Stabilization time Stabilization occurs when equal minimum oscillator voltage range;
Crystal Oscillator
XOUT
Oscillation frequency
Stabilization time External Clock
XOUT
input frequency
input high level width (tXH, tXL) Oscillator
XOUT
83.3
1,250
Frequency
NOTES: Oscillation frequency input frequency data oscillator characteristics only.
Stabilization time interval required oscillating stabilization after power-on occurs, when stop mode terminated.
16-5
ELECTRICAL DATA
KS57C5616/P5616
Table 16-4. Recommended Oscillator Constants Manufacturer Series Number Frequency Range Load (pF) 3.58 MHz-6.0 3.58 MHz-6.0 3.58 MHz-6.0
Oscillator Voltage Range
Remarks
Leaded Type On-chip Leaded Type On-chip Type
NOTES: Please specify normal oscillator frequency. On-chip 30pF built On-chip 38pF built
Table 16-5. Subsystem Clock Oscillator Characteristics Oscillator Crystal Oscillator Clock Configuration
XTIN XTOUT
Parameter
Test Condition
32.768
Units
Oscillation frequency
Stabilization time External Clock
XTIN XTOUT Open
XTIN input frequency
XTIN input high level width (tXTL, tXTH)
NOTES: Oscillation frequency XTIN input frequency data oscillator characteristics only. Stabilization time interval required oscillating stabilization after power-on occurs.
16-6
KS57C5616/P5616
ELECTRICAL DATA
Table 16-6. Input/Output Capacitance Parameter Input Capacitance Output Capacitance Capacitance Symbol COUT Condition MHz; Unmeasured pins returned Units
Table 16-7. Comparator Electrical Characteristics Parameter Input Voltage Range Reference Voltage Range Input Voltage Accuracy Input Leakage Current Symbol VREF VCIN ICIN, IREF Condition Units
16-7
ELECTRICAL DATA
KS57C5616/P5616
Table 16-8. A.C. Electrical Characteristics Parameter Instruction Cycle Time (note) TCL0, TCL1 Input Frequency TCL0, TCL1 Input High, Width Symbol Conditions fTI0, fTI1 tTIH0, tTIL0 tTIH1, tTIL1
Cycle Time
0.67 1.33
Units
0.48 3200 3800
tKCY
External source Internal source External source Internal source; Output
16-8
KS57C5616/P5616
ELECTRICAL DATA
Table 16-8. A.C. Electrical Characteristics (Continued) Parameter
High,
Symbol tKH,
Conditions External source Internal source External source Internal source
TkCY/ 2-50 1600 tKCY/ 2-150
Units
Width
Setup Time High
tSIK
Input Output Input Output
Hold Time High
tKSI
Input Output Input Output
Output Delay
tKSO
Input Output Input Output
1000 1000
Interrupt Input High, Width
RESET Input
tINTH, tINTL tRSL
INT0-INT2, INT4, KS0-KS7 Input
Width
NOTE: Unless specified otherwise, Instruction Cycle Time condition values assume main system clock (fx) source.
16-9
ELECTRICAL DATA
KS57C5616/P5616
Clock 1.5MHz
Main Freq. (Divided 6MHz
1.05MHz 0.75kHz
4.2MHz 3MHz
15.625kHz Supply Voltage Clock oscillator frequency
Figure 16-1. Standard Operating Voltage Range
Table 16-9. Data Retention Supply Voltage Stop Mode Parameter Data retention supply voltage Data retention supply current Release signal time Oscillator stabilization wait time Symbol VDDDR IDDDR tSREL tWAIT Conditions VDDDR Released RESET Released interrupt
Unit
NOTES: During oscillator stabilization wait time, operations must stopped avoid instability that occur during oscillator start-up. basic timer mode register (BMOD) interval timer delay execution instructions during wait time.
16-10
KS57C5616/P5616
ELECTRICAL DATA
TIMING WAVEFORMS
Internal Reset Operation Stop Mode Data Retention Mode Idle Mode Operating Mode
VDDDR Execution STOP Instruction
RESET
tWAIT tSREL
Figure 16-2. Stop Mode Release Timing When Initiated RESET
Idle Mode Stop Mode Data Retention Mode Normal Operating Mode
VDDDR Execution STOP Instrction
tSREL
tWAIT Power-down Mode Terminating Signal (Interrupt Request)
Figure 16-3. Stop Mode Release Timing When Initiated Interrupt Request
16-1
ELECTRICAL DATA
KS57C5616/P5616
Measurement Points
Figure 16-4. A.C. Timing Measurement Points (Except XTIN)
1/fx
Figure 16-5. Clock Timing Measurement
1/fxt tXTL tXTH
XTIN
Figure 16-6. Clock Timing Measurement XTIN
16-12
KS57C5616/P5616
ELECTRICAL DATA
1/fTI tTIL tTIH
TCL0
Figure 16-7. Timing
tRSL
RESET
Figure 16-8. Input Timing RESET Signal
16-13
ELECTRICAL DATA
KS57C5616/P5616
tINTL
tINTH
INT0,
Figure 16-9. Input Timing External Interrupts Quasi-Interrupts
tKCY
tSIK tKSI Input Data tKSO
Output Data
Figure 16-10. Serial Data Transfer Timing
16-14
KS57C5616/P5616
MECHANICAL DATA
diagram
MECHANICAL DATA
This section contains following information about device package: Package dimensions millimeters Pad/pin coordinate data table
23.90 20.00
0.15
+0.10 _0.05
17.00
14.00
100-QFP-1420C
0.10
0.30 0.10
0.65
(0.58)
(0.83)
0.05 2.65 0.10 3.00
NOTE Dimensions millimeters.
0.80 0.20
Figure 17-1. 100-QFP Package Dimensions
0.80 0.20
#100
MECHANICAL DATA
KS57C5616/P5616
NOTES
17-2
KS57C5616/P5616
KS57P5616
KS57P5616
KS57P5616 single-chip CMOS microcontroller (One Time Programmable) version KS57C5616 microcontroller. on-chip instead masked ROM. EPROM accessed serial data format. KS57P5616 fully compatible with KS57C5616, both function configuration. Because simple programming requirements, KS57P5616 ideal evaluation chip KS57C5616.
KS57P5616
KS57C5616/P5616
SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 DTMF P0.0/SCK/K0 P0.1/SO/K1 SDAT /P0.2/SI/K2 SCLK /P0.3/BUZ/K3 VDD/VDD VSS/VSS XOUT VPP/TEST XTIN XTOUT
RESET/RESET
SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28
P1.0/INT0 P1.1/INT1 P1.2/INT2 P1.3/INT4 P2.0/CLO P2.1/VLC1 P2.2 P3.0/TCLO0
SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 P10.3/SEG40 P10.2/SEG41 P10.1/SEG42 P10.0/SEG43 P9.3/SEG44 P9.2/SEG45 P9.1/SEG46 P9.0/SEG47 P8.3/SEG48 P8.2/SEG49 P8.1/SEG50/LCDSY P8.0/SEG51/LCDCK P7.3/SEG52/CIN3 P7.2/SEG53/CIN2 P7.1/SEG54/CIN1 P7.0/SEG55/CIN0 P6.3/SEG56/K7 P6.2/SEG57/K6 P6.1/SEG58/K5
Figure 18-1. KS57P5616 Assignments (100-QFP Package)
18-2
P3.1/TCLO1 P3.2/TCL0 P3.3/TCL1 COM0 COM1 COM2 COM3 COM4 COM5 COM6 COM7 P4.0/COM8 P4.1/COM9 P4.2/COM10 P4.3/COM11 P5.0/COM12 P5.1/COM13 P5.2/COM14 P5.3/COM15 P6.0/SEG59/K4
KS57P5616 (100-QFP-1420C)
KS57C5616/P5616
KS57P5616
Table 18-1. Descriptions Pins Used Read/Write EPROM Main Chip Name P0.2 Name SDAT During Programming Function Serial data pin. Output port when reading input port when writing. assigned Input/push-pull output port. Serial clock pin. Input only pin. Power supply EPROM cell writing (indicates that enters into writing mode). When 12.5 applied, writing mode when applied, reading mode. When operating, hold GND. (Option) Chip initialization Logic power supply pin. should tied during programming.
P0.3 TEST
SCLK (TEST)
RESET
RESET
15/16
VDD/VSS
VDD/VSS
Table 18-2. Comparison KS57P5616 KS57C5616 Features Characteristic Program Memory Operating Voltage (VDD) Programming Mode Configuration EPROM Programmability (TEST) 12.5V User Program time Programmed factory KS57P5616 16-Kbyte EPROM KS57C5616 16-Kbyte mask
OPERATING MODE CHARACTERISTICS When 12.5 supplied (TEST) KS57P5616, EPROM programming mode entered. operating mode (read, write, read protection) selected according input signals pins listed Table 18-3 below. Table 18-3. Operating Mode Selection Criteria (TEST) 12.5 12.5 12.5 REG/ Address (A15-A0) 0000H 0000H 0000H 0E3FH EPROM read EPROM program EPROM verify EPROM read protection Mode
NOTE: means level; means High level.
18-3
KS57P5616
KS57C5616/P5616
Table 18-4. Absolute Maximum Ratings Parameter Supply Voltage Input Voltage Output Voltage Output Current High Output Current Symbol Ports 0-10 active pins active active Conditions Rating (Peak value) (note) Total ports 2-10 Tstg (Peak value) (note) Operating Temperature Storage Temperature
Duty
Units
NOTE: values Output Current (IOL) calculated Peak Value
18-4
KS57C5616/P5616
KS57P5616
Table 18-5. D.C. Electrical Characteristics Parameter Input High Voltage Symbol VIH1 VIH2 VIH3 Input Voltage VIL1 VIL2 VIL3 Output High Voltage Output Voltage Conditions input pins except those specified below VIH2-VIH3 Ports P3.2, P3.3,
RESET
0.7VDD 0.8VDD
Units
XIN, XOUT, XTIN input pins except those specified below VIL2-VIL3 Ports P3.2, P3.3,
RESET
0.3VDD 0.2VDD
XIN, XOUT, XTIN Ports 2-10 Ports 2-10 input pins except those specified below ILIH2 XIN, XTIN input pins except RESET, XIN, XTIN XIN, XTIN output pins output pins
Input High Leakage Current
ILIH
ILIH2 Input Leakage Current ILIL
ILIL2 Output High Leakage Current Output Leakage Current ILOH
ILOL
18-5
KS57P5616
KS57C5616/P5616
Table 18-5. D.C. Electrical Characteristics (Continued) Parameter Pull-Up Resistor Symbol Conditions Port 0-10 Voltage Dividing Resistor (Note) |VDD-COMi| Voltage Drop 0-15) |VDD-SEGx| Voltage Drop 0-59) VLCX Output Voltage RLCD1 RLCD2 common segment clock RESET Units
VLC1 VLC2 VLC3 VLC4 VLC5
VDD-0.2 0.8VDD-0.2 0.6VDD-0.2 0.4VDD-0.2 0.2VDD-0.2
0.8VDD 0.6VDD 0.4VDD 0.2VDD
VDD+0.2 0.8VDD+0.2 0.6VDD+0.2 0.4VDD+0.2 0.2VDD+0.2
NOTE: RLCD1 Voltage dividing resistor when LCON.1 "0", RLCD2 when LCON.1 "1".
18-6
KS57C5616/P5616
KS57P5616
Table 18-5. D.C. Electrical Characteristics (Concluded) Parameter
Supply Current
Symbol
IDD1 (DTMF IDD2 (DTMF off)
Conditions
mode; 3.58 X-tal oscillator, 22pF mode; Crystal oscillator 22pF 3.58 3.58 3.58
Units
IDD3
Idle mode; Crystal oscillator 22pF
3.58
17.5 16.0 14.0
11.0
IDD4 IDD5 IDD6
mode; Crystal oscillator Idle mode; Crystal oscillator Stop mode; SCMOD 0000 XTIN
Tone level Ratio Column tone Distortion (Dual tone)
VROW dBCR
SCMOD 0100 Stop mode; Temp Temp band Temp
NOTES: Data includes power consumption subsystem clock oscillation. When system clock control register, SCMOD, 1001B, main system clock oscillation stops subsystem clock used. Currents following circuits included: on-chip pull-up resistors, internal voltage dividing resistors, output port drive currents.
18-7
KS57P5616
KS57C5616/P5616
Table 18-6. Main System Oscillator Characteristics Oscillator Ceramic Oscillator Clock Configuration
XOUT
Parameter Oscillation frequency
Test Condition
Units
Stabilization time Stabilization occurs when equal minimum oscillator voltage range;
Crystal Oscillator
XOUT
Oscillation frequency
Stabilization time External Clock
XOUT
input frequency
input high level width (tXH, tXL) Oscillator
XOUT
83.3
1,250
Frequency
NOTES: Oscillation frequency input frequency data oscillator characteristics only.
Stabilization time interval required oscillating stabilization after power-on occurs, when stop mode terminated.
18-8
KS57C5616/P5616
KS57P5616
Table 18-7. Subsystem Clock Oscillator Characteristics Oscillator Crystal Oscillator Clock Configuration
XTIN XTOUT
Parameter
Test Condition
32.768
Units
Oscillation frequency
Stabilization time
External Clock
XTIN XTOUT Open
XTIN input frequency
XTIN input high level width (tXTL, tXTH)
NOTES: Oscillation frequency XTIN input frequency data oscillator characteristics only. Stabilization time interval required oscillating stabilization after power-on occurs.
Table 18-8. Input/Output Capacitance Parameter Input Capacitance Output Capacitance Capacitance Symbol COUT Condition MHz; Unmeasured pins returned Units
18-9
KS57P5616
KS57C5616/P5616
Clock 1.5MHz
Main Freq. (Divided 6MHz
1.05MHz 0.75kHz
4.2MHz 3MHz
15.625kHz Supply Voltage Clock oscillator frequency
Figure 18-2. Standard Operating Voltage Range
18-10

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