µPD78P9014 8-bit Single-Chip Microcontroller PD78P9014 produ

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INTEGRATED CIRCUIT
µPD78P9014
8-bit Single-Chip Microcontroller
PD78P9014 product PD789014 Subseries compact, general-purpose microcontrollers 78K/
Series. addition 8-bit CPU, this product substantial hardware such on-chip ports, timers, serial interface, interrupt controls. This PROM product incorporates one-time PROM that written only once. Since user write programs, this microcontroller best suited evaluation during development, multi-product small-volume production, rapid start These user's manuals contain detailed descriptions functions. sure read them before designing.
PD78P9014 Subseries User's Manual: U11187E
78K/0S Series User's Manual Instruction: U11047E
FEATURES
compatible with mask products (except pin) On-chip one-time PROM: bytes On-chip high-speed RAM: bytes change minimum instruction execution time fast speed (0.4 speed (1.6 ports: Serial interface: channel select three-wire serial mode UART mode
Timers: channels
8-bit timer/event counter: channels Watchdog timer: channel
Operation possible same power supply voltage mask products (VDD Compatible with QTOPmicrocontroller
Remarks QTOP microcontroller name on-chip one-time PROM microcontroller fully supported write service (sealing from write, screening, inspection).
APPLICATION FIELDS
Compact household appliances, remote controls, games, etc.
ORDERING INFORMATION
Part Number Package 28-pin plastic shrink (400 mils) 28-pin plastic (375 mils)
PD78P9014CT PD78P9014GT
information this document subject change without notice. Document U10912EJ1V0DS00 (1st edition) Date Published October 1997 Printed Japan
mark
shows major revised points.
1995
µPD78P9014
OVERVIEW FEATURES
Item On-chip memory One-time PROM High-speed General-purpose registers Minimum instruction execution time Instruction bytes bytes bits registers (main system clock: operation) 16-bit calculations manipulation (set, reset, test) CMOS I/O: select three-wire serial mode UART mode: channel 8-bit timer/event counter: channels Watchdog timer: channel Timer output Vector interrupt source Maskable Nonmaskable Power supply voltage Ambient operating temperature Package Internal: External: Internal: +85°C 28-pin plastic shrink (400 mils) 28-pin plastic (375 mils) Function
ports Serial interface Timers
µPD78P9014
78K/0S Series Expansion
following shows 78K/0S Series products development. Subseries names shown inside frames.
Products mass production Products under development subseries products compatible with bus. Compact General-Purpose 42/44 pins pins
PD789026 PD789014
16-bit timer added µPD789014. There on-chip UART, voltage operation (1.8 possible.
Driving LCDs 78K/0S Series pins pins
PD789417 PD789407
ASSPs
converter µPD789407 enhanced. converter added µPD789026, timer enhanced.
42/44 pins pins pins
PD789800 PD789806Y PD789810
keyboards. On-chip functions. monitors. On-chip functions on-chip sync separation circuit. cards. On-chip security circuit.
following lists main functional differences between subseries products.
Function Capacity 4K-16K 2K-4K 12K-24K 12K-24K Timers 8-bit 16-bit Watch (USB 1ch) (USB 1ch, 1ch) (UART 1ch) 8-bit 10-bit 8-bit Minimum
Subseries Name Compact, generalpurpose driving ASSP
Serial Interface (UART
µPD789026 µPD789014 µPD789417 µPD789407 µPD789800
µPD789806Y µPD789810
µPD78P9014
CONTENTS
CONNECTION DIAGRAM (Top View) BLOCK DIAGRAM DIFFERENCES BETWEEN µPD78P9014 MASK PRODUCTS
FUNCTION LIST Pins Normal Operating Mode Pins PROM Programming Mode Circuit Unused Connections MEMORY SPACE OVERVIEW INSTRUCTION Legend Operation List PROM PROGRAMMING Operating Modes PROM writing procedure PROM reading procedure One-Time PROM Product Screening ELECTRICAL SPECIFICATIONS CHARACTERISTIC CURVES (REFERENCE VALUES) PACKAGE DRAWINGS RECOMMENDED SOLDERING CONDITIONS APPENDIX DEVELOPMENT TOOLS APPENDIX RELATED DOCUMENTS
µPD78P9014
CONNECTION DIAGRAM (Top View)
Normal operating modes 28-pin plastic shrink (400 mils)
µPD78P9014CT
28-pin plastic (375 mils)
µPD78P9014GT
P31/INTP1/TI1/TO1 P32/INTP2 RESET
P30/INTP0/TI0/TO0 P22/RxD/SI0 P21/TxD/SO0 P20/ASCK/SCK0
Caution Directly connect VSS. ASCK INTP0-INTP2 P00-P07 P10-P17 P20-P22 P30-P32 RESET SCK0 Asynchronous Serial Clock Interrupt from Peripherals Port0 Port1 Port2 Port3 Reset Receive Data Serial Clock TI0, TO0, Serial Input Serial Output Timer Input Timer Output Transmit Data Power Supply Programming Power Supply Ground Crystal
µPD78P9014
PROM programming mode 28-pin plastic shrink (400 mils)
µPD78P9014CT
28-pin plastic (375 mils)
µPD78P9014GT
RESET Open
Cautions Open D0-D7 MD0-MD3 RESET
Individually connect pull-down resistor. Connect ground. Leave open. Power Supply Programming Power Supply Ground Programming Clock Input
RESET level.
Data Programming Mode Select Reset
µPD78P9014
BLOCK DIAGRAM
TI0/TO0/P30/INTP0
8-bit TIMER/ EVENT COUNTER0 78K/0S CORE TIME PROM
PORT0
P00-P07
TI1/TO1/P31/INTP1
8-bit TIMER/ EVENT COUNTER1
PORT1
P10-P17
WATCHDOG TIMER
PORT2
P20-P22
SCK0/ASCK/P20 SO0/TxD/P21 SI0/RxD/P22 INTP0/P30INTP2/P32
SERIAL INTERFACE0
PORT3
P30-P32
INTERRUPT CONTROL
SYSTEM CONTROL
RESET
µPD78P9014
DIFFERENCES BETWEEN µPD78P9014 MASK PRODUCTS
µPD78P9014 product with on-chip one-time PROM that only written once.
Table lists differences between µPD78P9014 mask products. Table 3-1. Differences Between µPD78P9014 Mask Products
One-Time PROM Product Item On-chip memory High-speed Mask Products
µPD78P9014
bytes bytes
µPD789011
bytes bytes
µPD789012
bytes
µPD78P9014
FUNCTION LIST Pins Normal Operating Mode
Port pins
Name P00-P07 Function Port 8-bit port Input/output specifiable bit-wise When used input port, on-chip pull-up resistor used software. LEDs directly driven. Port 8-bit port Input/output specifiable bit-wise When used input port, on-chip pull-up resistor used software. LEDs directly driven. Port 3-bit port Input/output specifiable bit-wise When used input port, on-chip pull-up resistor used software. LEDs directly driven. Port 3-bit port Input/output specifiable bit-wise When used input port, on-chip pull-up resistor used software. LEDs directly driven. Reset Input Alternate Function
P10-P17
Input
Input
ASCK/SCK0 TxD/SO0 RxD/SI0
Input
INTP0/TI0/TO0 INTP1/TI1/TO1 INTP2
µPD78P9014
Pins ports
Input Function External interrupt input whose valid edge specified (rising edge, falling edge, both rising falling edges) Reset Input Alternate Function P30/TI0/TO0 P31/TI1/TO1 Input Output Input Output Input Input Serial data input serial interface Serial data output serial interface Serial clock serial interface Serial data input asynchronous serial interface Serial data output asynchronous serial interface Serial clock input asynchronous serial interface External count clock input 8-bit timer (TM0) External count clock input 8-bit timer (TM1) Output 8-bit timer output Input Input Input Input Input Input Input Input P22/RxD P21/TxD P20/ASCK P22/SI0 P21/SO0 P20/SCK0 P30/INTP0/TO0 P31/INTP1/TO1 P30/INTP0/TI0 P31/INTP1/TI1 Input Input Positive power supply High voltage applied when writing verifying programs. normal operating mode, this directly connected VSS. Ground potential System reset input Crystal connection main system clock oscillation Input
Name INTP0Note INTP1Note INTP2Note SI0Note SCK0Note RxDNote ASCKNote TI0Note TI1Note RESET
Note These pins input through Schmitt triggers. (See Type Figure 4-1, "Pin Circuit Types.")
Pins PROM Programming Mode
Name RESET Input Input Connect VSS. High voltage applied when setting PROM programming mode when writing program verifying. +5.5 applied +12.5 applied pin, PROM programming mode entered. MD0-MD3 D0-D7 Input Select operating mode when PROM programming mode. Data Clock input address updating PROM programming mode PROM programming mode setting positive power supply Ground potential Function
µPD78P9014
Circuit Unused Connections
Table shows types circuits each connections unused pins. Figure structure each type circuit. Table 4-1. Types Circuits
Name P00-P07 P10-P17 P20/ASCK/SCK0 P21/TxD/SO0 P22/RxD/SI0 P30/INTP0/TI0/TO0 P31/INTP1/TI1/TO1 P32/INTP2 RESET Connect directly VSS. Connect through separate resistor. Circuit Type Recommended Connection Unused Connect through separate resistor.
Figure 4-1. Summary Circuits
Type Type
pullup enable data P-ch
P-ch
IN/OUT Schmitt-Triggered Input with hysteresis characteristics output disable N-ch
Type
input enable
pullup enable data P-ch
P-ch
IN/OUT output disable N-ch
input enable
µPD78P9014
MEMORY SPACE
Figure shows µPD78P9014 memory map. Figure 5-1. Memory
FFFFH Special function register bits FEFFH On-chip high-speed bits FDFFH
used Data memory space FFFH Program area FFFH
Program memory space
On-chip PROM 8,192 bits
CALLT table area Program area Vector table area
µPD78P9014
OVERVIEW INSTRUCTION
µPD78P9014 instruction shown table below.
Legend
6.1.1 Operand identifiers methods Operands described "Operand" column each instruction accordance with description method instruction operand identifier (refer assembler specifications detail). When there more description methods, select them. Alphabetic letters capitals symbols, keywords must described they are. Each symbol following meaning. Immediate data specification Absolute address specification Relative address specification Indirect address specification
case immediate data, describe appropriate numeric value label. When using label, sure describe symbols. operand register identifiers, either function names etc.) absolute names (names parentheses table below, etc.) used description. Table 6-1. Operand Identifiers Description Methods
Identifier saddr saddrp addr16 Description Method (R0), (R1), (R2), (R3), (R4), (R5), (R6), (R7) (RP0), (RP1), (RP2), (RP3) Special-function register symbol FE20H-FF1FH Immediate data labels FE20H-FF1FH Immediate data labels (even addresses only) 0000H-FFFFH Immediate data labels (Only even addresses 16-bit data transfer instructions) addr5 word byte 0040H-007FH Immediate data labels (even addresses only) 16-bit immediate data label 8-bit immediate data label 3-bit immediate data label
µPD78P9014
6.1.2 Description "Operation" column NMIS register 8-bit accumulator register register register register register register register register pair; 16-bit accumulator register pair register pair register pair Program counter Stack pointer Program status word Carry flag Auxiliary carry flag Zero flag Interrupt request enable flag Non-maskable interrupt servicing flag Memory contents indicated address register contents parentheses High bits bits 16-bit register Logical product (AND) Logical (OR) Exclusive logical (exclusive Inverted data addr16 16-bit immediate data label jdisp8 signed 8-bit data (displacement value)
6.1.3 Description "Flag Operation" column (Blank) Unchanged Clear Set/cleared according result Previously saved value restored.
µPD78P9014
Operation List
Flags Mnemonic Operand #byte saddr, #byte sfr, #byte saddr saddr, sfr, !addr16 !addr16, PSW, #byte PSW, [DE] [DE], [HL] [HL], byte] byte], saddr [DE] [HL] byte] MOVW #word saddrp saddrp, XCHW
Note Note Note Note Note Note
Bytes
Clock byte (saddr) byte byte (saddr) (saddr) (addr16) (addr16) byte (DE) (DE) (HL) (HL) byte) byte) (saddr) (sfr) (DE) (HL) byte) word (saddrp) (saddrp)
Operation
Notes Except Except Only when Remark instruction clock cycle cycle clock (fCPU) selected processor clock control register (PCC).
µPD78P9014
Flags Mnemonic Operand #byte saddr, #byte saddr !addr16 [HL] byte] ADDC #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] SUBC #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] Bytes Clock byte (saddr), (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr), (saddr) byte (saddr) (add16) (HL) byte) byte (saddr), (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr), (saddr) byte (saddr) (addr16) (HL) byte) byte byte (saddr) (saddr) (saddr) (addr16) (HL) byte) Operation
Remark instruction clock cycle cycle clock (fCPU) selected processor clock control register (PCC).
µPD78P9014
Flags Mnemonic Operand #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] ADDW SUBW CMPW #word #word #word saddr saddr INCW DECW RORC ROLC Bytes Clock byte (saddr) byte (saddr) (addr16) (HL) byte) word word word rr+1 (saddr) (saddr) rr+1 (saddr) (saddr) (CY, Am-1 (CY, Am+1 Am-1 Am+1 byte byte Operation byte
(saddr) (saddr) (saddr) (addr16) (HL)
byte) byte
(saddr) (saddr) (saddr) (addr16) (HL)
byte)
Remark instruction clock cycle cycle clock (fCPU) selected processor clock control register (PCC).
µPD78P9014
Flags Mnemonic SET1 Operand saddr. sfr. PSW. [HL]. CLR1 saddr. sfr. PSW. [HL]. SET1 CLR1 NOT1 CALL CALLT !addr16 [addr5] Bytes Clock (saddr. bit) sfr. PSW. (HL). (saddr. bit) sfr. PSW. (HL). (SP-1) 3)H, 3)L, addr16, (SP-1) 1)H, 1)L, (00000000, addr5 (00000000, addr5), (SP), (SP), NMIS PUSH MOVW !addr16 $addr16 PSW, rpH, rpL, (SP), (SP), addr16 jdisp8 Operation
RETI
Remark instruction clock cycle cycle clock (fCPU) selected processor clock control register (PCC).
µPD78P9014
Flags Mnemonic Operand $saddr16 $addr16 $addr16 $addr16 saddr. bit, $addr16 Bytes Clock Operation jdisp8 jdisp8 jdisp8 jdisp8 jdisp8 (saddr. bit) sfr. bit, $addr16 bit, $addr16 PSW. bit, $addr16 saddr. bit, $addr16 jdisp8 sfr. jdisp8 jdisp8 PSW. jdisp8 (saddr. bit) sfr. bit, $addr16 bit, $addr16 PSW. bit, $addr16 DBNZ $addr16 jdisp8 sfr. jdisp8 jdisp8 PSW. then jdisp8 $addr16 then jdisp8 saddr, $addr16 (saddr) (saddr) then jdisp8 (saddr) HALT STOP Operation (Enable Interrupt) (Disable Interrupt) HALT Mode STOP Mode
Remark instruction clock cycle cycle clock (fCPU) selected processor clock control register (PCC).
µPD78P9014
PROM PROGRAMMING
program memory µPD78P9014 8K-byte one-time PROM that written electrically. pins listed Table used write verify this one-time PROM. connections unused pins, "(2) PROM programming mode" section "Pin Connection Diagram (Top View)." method updates address clock input from address input. Table 7-1. Pins PROM Programming Mode
Name Function High voltage setting PROM programming mode writing verifying program (usually, potential) Operating mode selection when writing verifying program Data Address update clock input when writing verifying program setting PROM programming mode applying power supply voltage. normal operating mode, applied. PROM programming mode, +5.5 applied.
MD0-MD3 D0-D7
Operating Modes
+5.5 applied +12.5 applied pin, PROM programming mode entered. This mode becomes operating mode Table based settings pins. Table 7-2. Operating Modes PROM Programming
Pins Operating Mode Zero clear program memory address Write mode Verify mode Program inhibit mode +12.5 +5.5
µPD78P9014
PROM writing procedure
following PROM writing procedure. High-speed writing enabled. Pull down each unused through resistor VSS. level. Supply pins. Wait clear mode program memory address Supply 12.5 pin. Write data 1-ms write mode. Verify mode. written, (8). written, repeat (7). Additional write (Counts written (7): Update (+1) program memory address input four pulses pin.
(10) Repeat until last address. (11) clear mode program memory address (12) Change voltages pins (13) Power Steps illustrated following diagram.
Repeat times Write Verify Additional write Increment address
D0-D7
Data input
Data output
Data input
µPD78P9014
PROM reading procedure
following PROM reading procedure. Pull down each unused through resistor VSS. level. Supply pins. Wait clear mode program memory address Supply +5.5V +12.5 VPP. Verify mode. When clock pulses input pin, data sequentially output each address period four clock pulses. clear mode program memory address Supply pins. Power Steps shown figure below.
D0-D7
Data output
Data output
µPD78P9014
One-Time PROM Product Screening
one-time PROM product cannot tested completely before shipped, because structure. recommended perform screening verify PROM after writing necessary data performing high-temperature storage under following conditions.
Storage Temperature Storage Time hours
provides fee-based, one-time microprocessor PROM writing, marking, screening, verifying service called QTOP. details, contact your distributor.
µPD78P9014
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings 25°C)
Parameter Supply voltages Symbol Input voltage Output voltage Output current, high IOHNote Peak value r.m.s. Total pins Peak value r.m.s. Output current, IOLNote Peak value r.m.s. Total pins Peak value r.m.s. Operating ambient temperature Storage temperature Tstg Test Conditions Rating -0.3 -0.3 13.5 -0.3 -0.3 +150 Unit
Note r.m.s. should calculated follows [r.m.s.] [peak value] duty Caution Product quality suffer absolute maximum rating exceeded even single parameter even momentarily. That absolute maximum ratings rated values which product verge suffering physical damage, therefore product must used under conditions which ensure that absolute maximum ratings exceeded. Remark characteristics alternate function port same unless specified otherwise. Capacitance 25°C,
Parameter Input capacitance Output capacitance capacitance Symbol COUT Test Condition MHz, Unmeasured pins returned MIN. TYP. MAX. Unit
µPD78P9014
Main System Clock Oscillation Circuit Characteristics(TA
Resonator Recommended Circuit Ceramic resonator Parameter Oscillator frequency (fx)Note Test Condition Oscillating voltage range MIN. TYP. MAX. Unit
Oscillation stabilization timeNote
After reaches oscillator voltage range MIN.
Crystal resonator
Oscillating frequency (fx)Note
Oscillation stabilization timeNote
External clock
input frequency (fx)Note
input high/low level width
PD74HCU04
(tXH, tXL)
Notes Indicates only oscillation circuit characteristics. Refer characteristics instruction execution time. Time required stabilize oscillation after reset STOP mode release. Caution When using main system clock oscillator, wiring area enclosed with dotted line should carried follows avoid adverse effect from wiring capacitance. Wiring should short possible. Wiring should cross other signal lines. Wiring should placed close varying higher current. potential oscillator capacitor ground should same VSS. ground wiring ground pattern which high current flows. fetch signal from oscillator.
µPD78P9014
Recommended Oscillating Circuit Constants Ceramic Resonator +85°C)
Recommended Oscillation Oscillation Voltage Range Frequency Circuit (VDD) (MHz) Constant (pF) Murata Mfg. Co., Ltd. CSB1000JNote CSA2.00MG040 CST2.00MG040 CSA4.19MG CST4.19MGW CSA5.00MG CST5.00MGW CSA5.00MGU CST5.00MGWU CCR1000K2 CCR4.19MC3 FCR4.19MC5 CCR5.0MC3 FCR5.0MC5 Kyocera Corp. KBR-1000F/Y KBR-2.0MS PBRC4.19A PBRC4.19B KBR-4.19MSB KBR-4.19MKC PBRC5.00A PBRC5.00B KBR-5.0MSB KBR-5.0MKC 4.19 4.19 5.00 4.19 1.00 2.00 Product containing capacitor, +85°C +85°C Product containing capacitor, +85°C +85°C Product containing capacitor, +85°C +85°C Product containing capacitor, +85°C Product containing capacitor Product containing capacitor Product containing capacitor Product containing capacitor Product containing capacitor Product containing capacitor Product containing capacitor MIN. MAX. Product containing capacitor
Manufacturer
Product Name
Remarks
Note ceramic resonator CSB1000J (1.0 MHz) Murata Mfg. Co., Ltd., limiting resistor needed (see following figure). another recommended oscillator used, limiting resistor needed.
CSB1000J
Caution oscillation circuit constants oscillation voltage range indicate conditions stable oscillation guarantee accuracy oscillation frequency. application circuit requires accuracy oscillation frequency, necessary oscillation frequency resonator application circuit. this, necessary directly contact manufacturer resonator being used.
µPD78P9014
Characteristics +85°C,
Parameter Output current, Symbol Total pins Input voltage, high VIH1 P07, P17, P22, VIH2 INTP0 INTP2, SI0, RxD, ASCK, SCK0, TI0, TI1, RESET VIH3 Input voltage, VIL1 P07, P17, P22, VIL2 INTP0 INTP2, SI0, RXD, ASCK, SCK0, TI0, TI1, RESET VIL3 Output voltage, high -100 Output voltage, Input leakage current, high ILIH1 Pins other than ILIH2 Input leakage current, ILIL1 Pins other than ILIL2 Output leakage current, high Output leakage current, ILOH ILOL VOUT VOUT Test Conditions MIN. TYP. MAX. Unit
Remark characteristics alternate function port same unless specified otherwise.
µPD78P9014
Characteristics +85°C,
Parameter Software pull-up resistor Supply currentNote Symbol IDD1 %Note Test Conditions MIN. TYP. 0.95 0.05 0.05 MAX. 12.0 Unit
Crystal oscillation operation %Note IDD2 %Note
Crystal oscillation HALT mode %Note IDD3 STOP mode
Notes This does include port current (containing current flowing through on-chip pull-up resistor). When operating high-speed mode (when processor clock control register (PCC) 00H) When operating low-speed mode (when 02H) Remark characteristics alternate function port same unless specified otherwise.
µPD78P9014
Characteristics Basic operation +85°C,
Parameter Cycle time (Min. instruction execution time) Symbol Test Conditions MIN. TI0, inputs High/low level widths TI0, input frequency tTIH, tTIL Interrupt request input High/low level widths RESET level width tINTH, tINTL tRSL INTP0 INTP2 TYP. MAX. Unit
(Main System Clock)
Cycle time
Operation guaranteed range
1.82 2.73 Supply voltage
µPD78P9014
Serial interface channel +85°, 3-wire serial mode (SCK0 on-chip clock output)
Parameter SCK0 cycle time Symbol tKCY1 Test Conditions MIN. 3200 SCK0 high/low level widths setup time SCK0 hold time SCK0 SCK0 Output delay time tKSO1 pFNote tKSI1 tKH1, tKL1 tSIK1 tKCY1/2-50 tKCY1/2-150 1000 TYP. MAX. Unit
Note load resistance load capacitance output line. (ii) 3-wire serial mode (SCK0 external clock output)
Parameter SCK0 cycle time Symbol tKCY2 Test Conditions MIN. 3200 SCK0 high/low level widths setup time SCK0 hold time SCK0 SCK0 Output delay time tKSO2 pFNote tKSI2 tKH2, tKL2 tSIK2 1600 1000 TYP. MAX. Unit
Note load resistance load capacitance output line. (iii) UART mode (dedicated baud rate generator output)
Parameter Transfer rate Symbol Test Conditions MIN. TYP. MAX. 78125 19531 Unit
µPD78P9014
(iv) UART mode (external clock input)
Parameter ASCK cycle time Symbol tKCY3 Test Conditions MIN. 3200 ASCK high level widths Transfer rate tKH3, tKL3 1600 39063 9766 ASCK rise fall times TYP. MAX. Unit
µPD78P9014
Timing Test Points (Except input)
Test Points
Clock Timing
1/fX
input
VIH3 (MIN.) VIL3 (MAX.)
Timing
tTIL0, tTIL1 tTIH0, tTIH1
TI0,
µPD78P9014
Serial Transfer Timing 3-Wire serial mode:
tKCYm tKLm tKHm
SCK0
tSIKm
tKSIm
Input data
tKSOm
Output data
UART mode (external clock input):
tKCY3 tKL3 ASCK tKH3
µPD78P9014
Data Memory STOP Mode Supply Voltage Data Retention Characteristics +85°C)
Parameter Data retention supply voltage Release signal time Oscillation stabilization wait time Symbol VDDDR tSREL tWAIT Release RESET Release interrupt request Test Conditions MIN. 215/fX Note TYP. MAX. Unit
Note combination with bits (OSTS0 OSTS2) oscillation stabilization time select register (OSTS), selection 212/fX, 215/fX, 217/fX possible. Remark Main system clock oscillation frequency Data Retention Timing (STOP Mode Release RESET)
Internal Reset Operation HALT Mode STOP Mode Data Retention Mode Operating Mode
VDDDR STOP Instruction Execution tSREL
RESET
tWAIT
Data Retention Timing (Standby Release Signal: STOP Release Interrupt Request Signal)
HALT Mode STOP Mode Data Retention Mode Operating Mode
VDDDR STOP Instruction Execution
tSREL
Standby Release Signal (Interrupt Request) tWAIT
µPD78P9014
Interrupt Request Input Timing
tINTL tINTH
INTP0-INTP2
RESET Input Timing
tRSL
RESET
µPD78P9014
Programming Characteristics 25°C, 0.25 12.5
Parameter Input voltage, high Symbol VIH1 VIH2 Input voltage, VIL1 VIL2 Input leakage current Output voltage, high Output voltage, supply current supply current VIL, Test Conditions Neither Neither VDD-1.0 MIN. VDD-0.5 TYP. MAX. Unit
Cautions Keep within +13.5 including overshoot. Apply before turn after VPP.
µPD78P9014
Programming Characteristics 25°C, 0.25 12.5
Parameter Address setup (vs. setup time (vs. Data setup time (vs. Address hold (vs. Data hold time (vs. data output float delay time setup time (vs. setup time (vs. Initial program pulse width Additional program pulse width setup time (vs. data output delay time hold time (vs. recovery time Program counter reset time input high/low level widths input frequency Initial mode time setup time (vs. hold time (vs. setup time (vs. AddressNote data output delay time AddressNote data output hold time hold time (vs. data output float delay time tM3HR tDFR During program memory read During program memory read tHAD During program memory read tVPS tVDS tOPW tMOS tM1H tM1R tPCR tXH, tKL. tM3S tM3H tM3SR tDAD tVPS tVCS tOPW tCES tOEH tACC During program memory read During program memory read tM1H tM1R 0.125 4.19 0.95 0.95 1.05 21.0 timeNote tM1S tOES timeNote Symbol Note Test Conditions MIN. TYP. MAX. Unit
Notes Symbol corresponding those µPD27C256A. internal address signal incremented rising edge fourth input connected pin.
µPD78P9014
Program Memory Write Timing
tVPS tVDS Data input Data input
D0-D7
Data input
Data output
tPCR tM3S tM1S tM1H
tM1R
tM0S
tOPW
tM3H
Program Memory Read Timing
tVPS tVDS tHAD D0-D7 tM3HR Data output Data output tDFR tDAD
tPCR tM3SR
µPD78P9014
CHARACTERISTIC CURVES (REFERENCE VALUES)
(Main system clock: ceramic oscillator) 25°C)
Main system clock HALT mode
Supply Current (mA)
0.05
0.01
0.005
Ceramic oscillator
0.001
Supply Voltage
µPD78P9014
PACKAGE DRAWINGS
28PIN PLASTIC SHRINK (400 mil)
NOTES Each lead centerline located within 0.17 (0.007 inch) true position (T.P.) maximum material condition. ltem center leads when formed parallel.
ITEM
MILLIMETERS 28.46 MAX. 2.67 MAX. 1.778 (T.P.) 0.50±0.10 MIN. 3.2±0.3 0.51 MIN. 4.31 MAX. 5.08 MAX. 10.16 (T.P.) 0.25 +0.10 -0.05 0.17 0~15°
INCHES 1.121 MAX. 0.106 MAX. 0.070 (T.P.) 0.020 +0.004 -0.005 0.035 MIN. 0.126±0.012 0.020 MIN. 0.170 MAX. 0.200 MAX. 0.400 (T.P.) 0.339 0.010 +0.004 -0.003 0.007 0~15° P28C-70-400A-1
µPD78P9014
PLASTIC (375 mil)
detail lead
NOTE
ITEM
MILLIMETERS 18.07 MAX. 0.78 MAX. 1.27 (T.P.) 0.40 +0.10 -0.05 0.1±0.1 MAX. 2.50 10.3±0.3 0.15 +0.10 -0.05 0.8±0.2 0.12 0.15
INCHES 0.712 MAX. 0.031 MAX. 0.050 (T.P.) 0.016 +0.004 -0.003 0.004±0.004 0.115 MAX. 0.098 0.406 +0.012 -0.013 0.283 0.063 0.006 +0.004 -0.002 0.031 +0.009 -0.008 0.005 0.006 P28GM-50-375B-3
Each lead centerline located within 0.12 (0.005 inch) true position (T.P.) maximum material condition.
µPD78P9014
RECOMMENDED SOLDERING CONDITIONS
µPD78P9014 should soldered mounted under conditions recommended table below. detail recommended soldering conditions, refer information document Semiconductor Device Mounting Technology Manual (C10535E). soldering methods conditions other than those recommended below, contact sales representative. Table 11-1. Soldering Conditions Surface-mount Devices
µPD78P9014GT: 28-pin Plastic (375 mils)
Soldering Method Infrared reflow Soldering Conditions Package peak temperature: 235°C, Duration: seconds max. 210°C above) Number times: times max., Limit number days: daysNote (Later, prebaking 125°C hours required.) Attention Articles other than heat-resistant tray (magazine, taping, non-heat-resistant tray) cannot baked packed state. Package peak temperature: 215°C, Duration: seconds max. 200°C above) Number times: times max., Limit number days: daysNote (Later, prebaking 125°C hours required.) Wave soldering Soldering bath temperature: 260°C max., Duration: seconds max., Number times: Once Preheating temperature: 120°C max.(Package surface temperature) Limit number days: daysNote (Later, prebaking 125°C hours required.) temperature: 300°C max., Duration: seconds max. (per device side) WS60-207-1 VP15-207-2 Recommended Condition Code IR35-207-2
Partial heating
Note storage conditions 25°C number storage days after opening seal pack. Caution Using more than soldering method should avoided. (except case partial heating) Table 11-2. Soldering Conditions Through-hole Devices
µPD78P9014CT: 28-pin Plastic Shrink (400 mils)
Soldering Method Wave soldering (pin only) Partial heating Soldering Conditions Solder bath temperature: max., Duration: seconds max. temperature: max., Duration: seconds max.(per pin)
Caution Wave soldering only lead part order that solder cannot contact with chip directly.
µPD78P9014
APPENDIX DEVELOPMENT TOOLS
following development tools available development systems that employ µPD78P9014. Language Processing Software
RA78K0SNotes CC78K0SNotes DF789014Notes CC78K0S-LNotes 78K/0S Series common assembler package 78K/0S Series common compiler package
µPD789014 Subseries common device file
78K/0S Series common compiler library source file
PROM Writing Tools
PG-1500 PA-78P9014GT PG-1500 controller PROM programmer PROM programmer adapter connected PG-1500 PG-1500 control program
Debugging Tools
ND-K901Notes IF-98DNote IF-PCDNote IF-CARDNote NP-28CTNote NP-28GTNote NJ-535Note NJ-550WNote SM78K0SNotes DF789014Notes In-circuit emulator µPD789014 Subseries; included screen debugger NS-78K9 ND-K901 Interface board required when PC-9800 Series (except notebook PCs) used host machine NK-K901 Interface board required when PC/AT compatible machine (except notebook PCs) used host machine NK-K901 Interface card required when PC-9800 Series, PC/AT, compatible notebook used host machine NK-K901 Emulation probe 28-pin plastic shrink Emulation probe 28-pin plastic 100V/120V-compatible voltage adapter 100V 240V-compatible voltage adapter 78K/0S Series common system simulator Device file µPD789014 Subseries
Real-Time
MX78K0SNotes 78K/0S Series
Notes PC-9800 Series (MS-DOSTM) based PC/ATand compatibles DOSTM/IBM DOSTM/MS-DOS) based HP9000 Series 700(HP-UXTM) based, SPARCstation(SunOSTM) based, NEWS(NEWS-OSTM) based This product Naito Densei Machida Seisakusho Co., Ltd. (044-822-3813). purchase, contact Naito Densei Machida Seisakusho Co., Ltd. PC-9800 Series (MS-DOS WindowsTM) based PC/AT compatibles DOS/IBM DOS/MS-DOS Windows) based Under development Remark RA78K0S, CC78K0S, SM78K0S used with DF789014.
µPD78P9014
APPENDIX RELATED DOCUMENTS
Documents Related Device
Document Name Japanese Document English prepared prepared U11187E U11047E
µPD78P9014 Data Sheet µPD789011, 9012 Data Sheet µPD789014 Subseries User's Manual
78K/0S Series User's Manual Instruction
This document prepared U11187J U11047J
Development Tool Documents (User's Manual)
Document Name Japanese RA78K0S Assembler Package Operation Assembly language Structured assembly language CC78K/0S Compiler Operation Language SM78K0S System Simulator Windows based SM78K Series System Simulator External components user-open interface specification PG-1500 U11940J U11940E U10092J U10092E Reference U11622J U11599J U11623J U11816J U11817J U11489J Document English U11622E U11599E U11623E U11816E U11817E U11489E
Documents Related Embedded Software (User's Manual)
Document Name Japanese 78K/0S Series MX78K0S prepared Document English prepared
Caution documents listed above subject change without notice. sure latest documents designing, etc.
µPD78P9014
Other Related Documents
Document Name Japanese Package Manual Semiconductor Device Surface Mount Technology Manual Quality Grades Semiconductor Device Semiconductor Device Reliability/Quality Control System Electrostatic Discharge (ESD) Test Guide Quality Assurance Semiconductor Device Guide Products Related Microcomputer: Other Companies C10943X C10535J C11531J C10983J C11892J C11893J U11416J C10535E C11531E C10983E C11892E MEI-1202 Document English
Caution documents listed above subject change without notice. sure latest documents designing, etc.
µPD78P9014
[MEMO]
µPD78P9014
NOTES CMOS DEVICES
PRECAUTION AGAINST SEMICONDUCTORS
Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices
HANDLING UNUSED INPUT PINS CMOS
Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS device behave differently than Bipolar NMOS devices. Input levels CMOS devices must fixed high using pull-up pull-down circuitry. Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices.
STATUS BEFORE INITIALIZATION DEVICES
Note: Power-on does necessarily define initial status device. Production process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. Hence, power-on does guarantee out-pin levels, settings contents registers. Device initialized until reset signal received. Reset operation must executed immediately after power-on devices having reset function.
µPD78P9014
QTOP trademark Corp. MS-DOS Windows either registered trademarks trademarks Microsoft Corporation United States and/or other countries. DOS, PC/AT, trademarks International Business Machines Corporation. HP9000 Series HP-UX trademarks Hewlett-Packard Company. SPARCstation trademark SPARC International, Inc. SunOS trademark Microsystems, Inc. NEWS NEWS-OS trademarks Sony Corporation.
export this product from Japan regulated Japanese government. export this product prohibited without governmental license, need which must judged customer. export re-export this product from country other than Japan also prohibited without license from that country. Please call sales representative.
part this document copied reproduced form means without prior written consent Corporation. Corporation assumes responsibility errors which appear this document. Corporation does assume liability infringement patents, copyrights other intellectual property rights third parties arising from device described herein other liability arising from such device. license, either express, implied otherwise, granted under patents, copyrights other intellectual property rights Corporation others. While Corporation been making continuous effort enhance reliability semiconductor devices, possibility defects cannot eliminated entirely. minimize risks damage injury persons property arising from defect semiconductor device, customers must incorporate sufficient safety measures design, such redundancy, fire-containment, anti-failure features. devices classified into following three quality grades: "Standard", "Special", "Specific". Specific quality grade applies only devices developed based customer designated "quality assurance program" specific application. recommended applications device depend quality grade, indicated below. Customers must check quality grade each device before using particular application. Standard: Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade devices "Standard" unless otherwise specified NEC's Data Sheets Data Books. customers intend devices applications other than those specified Standard quality grade, they should contact sales representative advance. Anti-radioactive design implemented this product.
96.5

µPD78P9014 8-bit Single-Chip Microcontroller PD78P9014 produ

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