Stereo 2.6W Audio Amplifier(With Gain Control) operating current

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Stereo 2.6W Audio Amplifier(With Gain Control) operating current

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APA2030/2031
Stereo 2.6W Audio Amplifier(With Gain Control)
operating current with Improved depop circuitry eliminate turn-on transients outputs High PSRR Internal gain control, eliminate external components. 2.6W channel output power into load mode Multiple input modes allowable selected /LINE (APA2030) output modes allowable with modes selected SE/BTL (for APA2030 only) current consumption shutdown mode (50µ Short Circuit Protection TSSOP-24-P (APA2030) TSSOP-20-P (APA2031) with thermal package.
General Description
APA2030/1 monolithic integrated circuit, which provides internal gain control, stereo bridged audio power amplifiers capable producing 2.6W (1.9W) into with less than (1.0%) THD+N. control gain setting pins, Gain0 Gain1, amplifier provide 6dB, 10dB, 15.6dB, 21.6dB gain settings. advantage internal gain setting less components area. Both depop circuitry thermal shutdown protection circuitry integrated APA2030/1, that reduces pops clicks noise during power shutdown mode operation. also improved power noise protects chip from being destroyed over temperature short current failure. simplify audio system design APA2030 combines stereo bridge-tied loads (BTL) mode speaker drive stereo single-end (SE) mode headphone drive into single chip, where both modes easily switched SE/BTL input control signal. Besides multiple input selections used portable audio system. APA2031 eliminates both input selection single-end (SE) mode function simplifying design save space.
Applications
NoteBook Monitor
Ordering Marking Information
APA2030/1
Lead Free andling ange ackage 2030/1 2030/1 XXXXX ackage ange andling Tube Tape Tray Lead Free Lead Free evice lank riginal evice XXXXX
ANPEC reserves right make changes improve reliability manufacturability without notice, advise customers obtain latest version relevant information verify before placing orders. Copyright ANPEC Electronics Corp. Rev. -Apr., 2004 www.anpec.com.tw
APA2030/2031
Assignment
LOUT+ LLINEIN LHPIN RIN+ LOUT- LIN+
2030_P inOut
RLINEIN SHUTDOWN ROUT+ 2030) RHPIN HP/LINE ROUT15 SE/BTL PCBEEP
LOUT+ LIN- RIN+ LOUT- LIN+
2031)
SHUTDOWN ROUT+ RIN16 ROUT13
Block Diagram
LLINEIN LHPIN
LOUT+
LIN+
LOUTGA RLINEIN RHPIN
select
ROUT+
RIN+ HP/LINE
SE/BTL
SHUTDOW
ROUT-
PCBEEP
2030_B lock
APA2030
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APA2030/2031
Block Diagram
LIN-
LOUT+
LIN+
SHUTDOWN RIN-
LOUT-
select
ROUT+
RIN+
ROUTAPA2031_Block
APA2031
Absolute Maximum Ratings
(Over operating free-air temperature range unless otherwise noted.) Parameter Supply voltage range, VDD, PVDD Input voltage range SE/BTL, HP/LINE, SHUTDOWN, Operating ambient temperature range, Maximum junction temperature, Storage temperature range, TSTG Soldering Temperature, seconds,
Electrostatic Discharge, VESD Power dissipation, Note: Rating -0.3V -0.3V -40°C 85°C Internal Limited -65°C 150°C 260°C -3000 3000*1 -200 200*2 Internal Limited
Human body model: C=100pF, R=1500, positives pulse plus negative pulses Machine model: C=200pF, L=0.5mH, positive pulses plus negative pulses
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APA2030/2031
Recommended Operating Conditions
Supply Voltage, VDD.4.5V 5.5V
Thermal Characteristics
Symbol RTHJA Parameter Thermal Resistance from Junction Ambient Free TSSOP-P24* TSSOP-P20* Value Unit °C/W
printed circuit board with trace copper through 25mil diameter vias. thermal TSSOP_P package with solder printed circuit board.
Electrical Characteristics
(VDD=5V,-20°C<TA<85°C, unless otherwise noted.)
Symbol VICM
Parameter Supply Voltage Supply current Supply current shutdown mode High level threshold Voltage level threshold Voltage Input current Common mode Input voltage Output differential voltage PC_beep trigger level
Test Condition SE/BTL SE/BTL SHUTDOWN SHUTDOWN, GAIN0, GAIN1 SE/BTL, HP/LINE SHUTDOWN, GAIN0, GAIN1 SE/BTL, HP/LINE SHUTDOWN, SE/BTL, HP/LINE, GAIN0, GAIN1
Min.
Typ.
Max.
Unit
VDD-1.0
Vp.p
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APA2030/2031
Electical Characteristics (Cont.)
Operating Characteristics, mode Vdd=5V, TA=25°C, Rl=4, Gain=6dB, (Unless otherwise noted)
Symbol
Parameter
Test Condition THD=10%, Fin=1khz, RL=3 THD=10%, Fin=1khz, RL=4 THD=10%, Fin=1khz, RL=8 THD=1%, Fin=1khz, RL=3 THD=1%, Fin=1khz, RL=4 THD=1%, Fin=1khz, RL=8
Min.
Typ.
Max.
Unit
Maximum output power
0.05 0.04
THD+N PSRR xtalk
Total harmonic distortion plus noise Power ripple rejection ratio Channel separation HP/LINE input separation Signal noise ratio
Po=1.1W, RL=4 Fin=1khz Po=0.7W, RL=8, Fin=1khz Vin=0.2Vrms, Rl=8, Cb=0.47µf, f=120Hz f=1khz, Cb=0.47µf, f=1khz, Cb=0.47µf, Po=1.1W, Rl=8 A_weight
Operating Characteristics, mode APA2030 only) Vdd=5V, TA=25°C, Rl=32, Gain=4, 1dB, (Unless otherwise noted)
Symbol THD+N PSRR
Parameter Maximum output power
Test Condition THD=10%, Fin=1khz, RL=32 THD=1%, Fin=1khz, RL=32
Min.
Typ. 0.03
Max. Unit
Total harmonic distortion plus Po=75mW, RL=32 .Fin=1khz noise Vin=0.2Vrms, Rl=32, Power ripple rejection ratio Cb=0.47µf, f=120, SE/BTL attenuation Channel separation HP/LINE input separation Signal noise ratio f=1khz, Cb=0.47µf, f=1khz, Cb=0.47µf, Po=75mW, Rl=32, A_weight,
xtalk
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APA2030/2031
Descriptions
APA2030
Config. Function Description round connection, Connected therm pad. AIN0 Input signal internal gain setting AIN1 Input signal internal gain setting LOUT+ Left channel positive output LLINEIN Left channel line input term inal, selected when HP/LINE held low. RLINEIN Right channel line input term inal, selected when HP/LINE held low. LHPIN Left channel headphone input term inal, selected when HP/LINE held high. Supply voltage only power plifier RIN+ Right channel positive signal input, when differential signal accepted. LOUT9 Left channel negative output high pedance LIN+ Left channel positive signal input, when differential signal accepted. BYPASS Bypass voltage PCBEEP PC-beep signal input utput control input pin, high output SE/BTL Right channel negative output high pedance ROUT16 Multi-input selection input, headphone when held high, line-in HP/LINE when held Supply voltage internal circuit excepting power plifier. Right channel headphone input term inal, selected when HP/LINE held RHPIN high. ROUT+ Right channel positive output SHUTDOW will into shutdown when pull RLINEIN Right channel line input term inal, selected when HP/LINE held name
APA2031
name GAIN0 GAIN1 LOUT+ LINPVDD RIN+ LOUTLIN+ BYPASS ROUTVDD Config. Function Description Ground connection, Connected thermal pad. Input signal internal gain setting Input signal internal gain setting Left channel positive output Left channel negative audio signal input 6,15 Supply voltage only power amplifier Right channel positive audio signal input Left channel negative output Left channel positive audio signal input Bypass voltage connection Right channel negative output Supply voltage internal circuit excepting power amplifier
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APA2030/2031
Description
APA2031
name RIN+ ROUT+ Config. Function Description Right channel negative audio signal input Right channel positive output will into shutdown mode when pull
SHUTDOWN
Control Input Table APA2030 only)
LINE SE/BTL SHUTDOWN PCBEEP Disable Disable Disable Disable Disable Enable Operating mode Shutdown mode Line input, input, Line input, input, PCBEEP input,
Gain Setting Table (for both APA2030 APA2031)
GAIN0 GAIN1 25.7K 111K 138K 10dB 15.6dB
154.3K 21.6dB
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APA2030/2031
Typical Application Circuit
(for APA2030 using input signal)
100µF PVDD
0.1µF 0.47µF L-LINE L-HP 0.47µF 0.47µF 0.47µF LLINEIN LHPIN LIN+ BYPASS
LOUT+ 220µF
Vbias
Control Ring SE/BTL Signal Sleeve Headphone Jack
GAIN0 GAIN1 0.47µF R-LINE R-HP 0.47µF 0.47µF
Gain selectable
LOUT-
RLINEIN RHPIN RIN+ HP/LINE
ROUT+ 220µF
HP/LINE Control Signal 100k SE/BTL Signal Shutdown Signal BEEP Signal
100k SE/BTL
HP/LINE
Vbias
SE/BTL
ROUT-
SHUTDOWN PCBEEP 0.47µF
Shutdown PC-BEEP
APA2030AppCkt
2030
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APA2030/2031
Typical Application Circuit
(for APA2031 using input signal)
-INP
BYPASS
Vbias
Gain
R-INP
RIN-
RIN+
Vbias
2031
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APA2030/2031
Typical Characteristics
THD+N Output Power
THD+N Output Power
VDD=5V AV=6dB f=1kHz
VDD=5V AV=4.1dB f=1kHz COUT=330µF
THD+N
THD+N
RL=8
RL=4
RL=3
RL=32
RL=16
0.01
0.01
Output Power
Output Power (mW)
THD+N Output Power
THD+N Output Power
VDD=5V AV=6dB RL=3
f=15kHz f=15kHz
THD+N
THD+N
f=1kHz
f=1kHz
f=30Hz
0.01
0.01
VDD=5V AV=15.6dB RL=3
100m
f=30Hz
100m
Output Power
Output Power
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APA2030/2031
Typical Characteristics (Cont.)
THD+N Output Power
THD+N Output Power
VDD=5V AV=6dB RL=4
f=15kHz f=15kHz
THD+N
THD+N
f=1kHz
f=1kHz
f=30Hz
VDD=5V AV=15.6dB RL=4
0.01 100m
f=30Hz
100m
Output Power
Output Power
THD+N Output Power
THD+N Frequency
VDD=5V AV=6dB RL=8 f=15kHz
VDD=5V AV=15.6dB RL=8 f=15kHz
THD+N
THD+N
f=30Hz
f=1kHz
f=1kHz f=30Hz
0.01 0.01
100m
100m
Output Power
Output Power
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APA2030/2031
Typical Characteristics (Cont.)
THD+N Output Power
THD+N Output Power
VDD=5V AV=4.1dB RL=32 COUT=1000µF
VDD=5V AV=4dB RL=16 COUT=1000µF
f=30Hz f=15kHz
THD+N
THD+N
f=15kHz
f=30Hz f=1kHz
0.01 0.01
f=1kHz
200m 300m 100m 200m 300m
100m
Output Power
Output Power
THD+N Frequency
THD+N Frequency
VDD=5V PO=1.75W RL=3
VDD=5V AV=6dB RL=3
THD+N
THD+N
AV=15.6dB
PO=1.75W
AV=6dB
PO=1W
0.01
0.01
Frequency (Hz)
Frequency (Hz)
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APA2030/2031
Typical Characteristics (Cont.)
THD+N Frequency
THD+N Frequency
VDD=5V PO=1.5W RL=4
VDD=5V AV=6dB RL=4
THD+N
THD+N
AV=15.6dB
PO=1.5W
AV=6dB
PO=0.75W
0.01
0.01
Frequency (Hz)
Frequency (Hz)
THD+N Frequency
THD+N Frequency
VDD=5V AV=6dB RL=8
VDD=5V PO=1W RL=8
THD+N
PO=1W
THD+N
AV=6dB
PO=0.5W
AV=15.6dB
0.01
0.01
Frequency (Hz)
Frequency (Hz)
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APA2030/2031
Typical Characteristics (Cont.)
THD+N Frequency
THD+N Frequency
VDD=5V AV=4.1dB RL=16 COUT=1000µF
VDD=5V AV=4.1dB RL=32 COUT=1000µF
THD+N
THD+N
PO=75mW
PO=25mW
PO=150mW
0.01 0.01
PO=75mW
Frequency (Hz)
Frequency (Hz)
Frequency Response
+240
Frequency Response
+270 +260 +250
+230 +220
Gain
Phase (Degress)
+200
+220 +210 +200 +190 +180
Gain (dB)
+190 +180
Gain (dB)
Phase
+170 +160
VDD=5V RL=4 AV=6dB PO=1W
Phase DD=5V RL=4 AV=15.6dB PO=1W
+170 +160 +150 +140 +130 +120 100k 200k
+150 +140 +130 +120 100k 200k
Frequency (Hz)
Frequency (Hz)
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Phase (Degress)
+210
Gain
+240 +230
APA2030/2031
Typical Characteristics (Cont.)
Frequency Response
+270
Frequency Response
+300 +280 +260 +250 +240 +230 +220 +210 +200 +190 +180
Gain
Gain
+260
Phase (Degress)
Gain (dB)
Gain (dB)
+220 +200 +180
Phase VDD=5V RL=8 AV=10dB PO=0.5W
+170 +160 +150 +140 +130 +120 100k 200k
Phase VDD=5V RL=32 AV=4.1dB
+160 +140 +120 +100 100k 200k
Frequency (Hz)
Frequency (Hz)
Crosstalk Frequency
Crosstalk Frequency
VDD=5V RL=4 AV=6dB PO=1.5W
Crosstalk (dB)
VDD=5V RL=32 AV=4.1dB COUT=330µF
Crosstalk (dB)
Left Right
Left Right Right Left
-100
-120
Right Left
-100
-140
Frequency (Hz)
Frequency (Hz)
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Phase (Degress)
+240
APA2030/2031
Typical Characteristics (Cont.)
PSRR Frequency
PSRR Frequency
VDD=5V RL=32 CB=0.47µF
VDD=5V RL=4 CB=0.47µF
PSRR (dB)
-100
PSRR (dB)
-100
Frequency (Hz)
Frequency (Hz)
Output Noise Voltage Frequency
Output Noise Voltage Frequency
Filter 22kHz
Output Noise Voltage (µV)
Filter 22kHz
Output Noise Voltage (µV)
A-Weight
A-Weight
VDD=5V RL=4 AV=6dB
VDD=5V RL=32 AV=4.1dB
Frequency (Hz)
Frequency (Hz)
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APA2030/2031
Typical Characteristics (Cont.)
Supply Current Supply Voltage
Power Dissipation Output Power
VDD=5V RL=3
Load
Power Dissipation
Supply Current (mA)
RL=4
RL=8
Supply Voltage
Output Power
Power Dissipation Output Power
RL=8
Power Dissipation (mW)
RL=16
RL=32
Output Power (mW)
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APA2030/2031
Application Descriptions
Operation APA2030/1 pairs operational amplifiers internally, allowed different amplifier configurations.
Single-Ended Operation (for APA2030 only) Consider single-supply configuration shown Application Circuit. coupling capacitor required block offset voltage from reaching load. These capacitors quite large (approximately 33µF 1000µF) they tend expensive, occupy valuable area, have additional drawback limiting low-frequency performance system (refer Output Coupling Capacitor). rules described should following relationship:
_CONF
Figure APA2030 internal configuration (each channel) differential drive configuration, differential drive configuration doubling voltage swing load compare single-ending configuration, differential gain each channel 2X(Gain mode). driving load differentially through outputs OUT+ OUT-, amplifier configuration commonly referred bridged mode established. mode operation different from classical single-ended amplifier configuration where side load connected ground. amplifier design distinct advantages over configuration, provides differential drive load, thus doubling output swing specified supply voltage. Four times output power possible compared amplifier under same conditions. configuration, such used APA2030/1, also creates second advantage over amplifiers. Since differential outputs, ROUT+, ROUT-, LOUT+, LOUT-, biased half-supply, need voltage exists across load. This eliminates need output coupling capacitor which required single supply, configuration.
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OUT+
bias
OUTOP2
Cbypass
Output SE/BTL Operation (for APA2030 only) ability APA2030 easily switch between modes most important costs saving features. This feature eliminates requirement additional headphone amplifier applications where internal stereo speakers driven mode external headphone speakers must accommodated. Internal APA2030, separate amplifiers drive OUT+ OUT- (see Figure SE/BTL input controls operation follower amplifier that drives LOUT- ROUT-. When SE/BTL held low, actived APA2030 mode. When SE/BTL held high, high output impedance state, which configures APA2030 driver from OUT+. reduced approximately one-half mode.
Control SE/BTL input logic-level source resistor divider network stereo headphone jack with switch shown Application Circuit.
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APA2030/2031
Application Descriptions
Control Ring
SE/BTL
100K
100K
SE/BTL_Switc
HP/LINE pin, enabling headphone input function. Differential Input Operation
Sleeve
Headphone Jack
Figure SE/BTL input selection phonejack plug Figure input SE/BTL operates follows: When phonejack plug inserted, resistor disconnected SE/BTL input pulled high enables mode. When input goes high level, OUT- amplifier shutdown causing speaker mute. OUT+ amplifier then drives through output capacitor (CO) into headphone jack. When there headphone plugged into system, contact headphone jack connected from signal pin, voltage divider resistors 100k Resistor then pulls SE/BTL pin, enabling function. Input HP/LINE Operation (for APA2030 only) APA2030 amplifier separate inputs each left right stereo channels. internal multiplexer selects which input will connected amplifier based state HP/LINE select line inputs, HP/LINE tied level enable headphone inputs, LINE tied high level
APA2030/1 accepted differential input signal, it's improve CMRR (Common Mode Rejection ratio). example: when apply differential input signals APA2031, connect positive input signals (LIN+ RIN+) APA2031 negative input signals (LIN- RIN-) APA2031. When input signals single-end, just connect (LIN+ RIN+) ground capacitor. Input Resistance, APA2030/1 provides four gain setting decided GAIN0 GAIN1 input Differential mode become 4.1dB fixed gain when mode selected (for APA2030). table 1,internal resistors according operation gain each audio input APA2030/1.
GAIN0 GAIN1 111K 138K SE/BTL 10dB 15.6dB 21.6dB 4.1dB
25.7K 154.3K 111K
Table close loop gain setting resistance Ri/Rf mode operation brings about factor gain equation inverting amplifier mirroring voltage swing across load. input resistance wide variation (+/-10%) caused manufacture. Input Capacitor, typical application input capacitor, required allow amplifier bias input signal proper level optimum operation. this case, minimum input impedance form high-pass filter with corner frequency determined follow equation:
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Refer application circuit, voltage divider 100k sets voltage HP/LINE approximately 50mV when there headphones plugged into system. This logic voltage HP/LINE enables APA2030 places LINE input mode operation. When headphones plugged into system, contact headphone jack disconnected from signal pin, interrupting voltage divider resistors 100k. Resistor 100k then pulls-up
Copyright ANPEC Electronics Corp. Rev. Apr., 2004
APA2030/2031
Application Descriptions
(highpass)=
avoid start-up noise occurred, bypass voltage should rise slower then input bias voltage relationship shown equation should maintained.
Cbypass 125k
value important consider directly affects frequency performance circuit. Consider example where when gain setting specification calls flat bass response down 40Hz Equation reconfigured follow:
2Rifc
180k
capacitor from 125k source inside amplifier. Bypass capacitor, values 3.3µF 10µF ceramic tantalum low-ESR capacitors recommended best noise performance. bypass capacitance also effect start time. determined follow equation: Tstart =5x(Cbypassx125k)
Consider input resistance variation, 0.04µF would likely choose value range 0.1µF 1.0µF. further consideration this capacitor leakage path from input source through input network (Ri+Rf, load. This leakage current creates offset voltage input amplifier that reduces useful headroom, especially high gain applications. this reason low-leakage tantalum ceramic capacitor best choice. When polarized capacitors used, positive side capacitor should face amplifier input most applications level there held VDD/2, which likely higher that source level. Please note that important confirm capacitor polarity application. Effective Bypass Capacitor, Cbypass with power amplifier, proper supply bypassing critical noise performance high power supply rejection. capacitor location both bypass power supply pins should close device possible. effect larger half supply bypass capacitor improved PSRR increased halfsupply stability. Typical applications employ regulator with 1.0µF 0.1µF bypass capacitors which supply filtering. This does eliminate need bypassing supply nodes APA2030/1. selection bypass capacitors, especially thus dependent upon desired PSRR requirements, click performance.
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Output Coupling Capacitor, (for APA2030 only) typical single-supply configuration, output coupling capacitor (Cc) required block bias output amplifier thus preventing currents load. with input coupling capacitor, output coupling capacitor impedance load form high-pass filter governed equation.
RLCC
fc(highpass)=
example, 330µF capacitor with speaker would attenuate frequencies below 60.6Hz. main disadvantage, from performance standpoint, load impedance typically small, which drives low-frequency corner higher degrading bass response. Large values required pass frequencies into load. Power Supply Decoupling, APA2030/1 high-performance CMOS audio amplifier that requires adequate power supply decoupling ensure output total harmonic distortion (THD) possible.
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APA2030/2031
Application Descriptions
Power supply decoupling also prevents oscillations causing long lead length between amplifier speaker. optimum decoupling achieved using different type capacitors that target different type noise power supply leads. higher frequency transients, spikes, digital hash line, good ceramic capacitor, typically 0.1µF placed close possible device lead works best. filtering lowerfrequency noise signals, large aluminum electrolytic capacitor 10µF greater placed near audio power amplifier recommended. Shutdown Function order reduce power consumption while use, APA2030/1 contains shutdown externally turn amplifier bias circuitry. This shutdown feature turns amplifier when logic placed SHUTDOWN pin. trigger point between logic high logic level typically 2.0V. best switch between ground supply provide maximum device performance. switching SHUTDOWN low, amplifier enters low-current state, IDD<50µA. APA2030 shutdown mode, except PC-BEEP detect circuit. normal operating, SHUTDOWN pull high level keeping shutdown mode. SHUTDOWN should tied definite voltage avoid unwanted state changes. PC-BEEP Detection APA2030 only) APA2030 integrates PCBEEP detect circuit NOTEBOOK used. When PC-BEEP signal drive PCBEEP input pin, PCBEEP mode active. APA2030 will force mode internal gain fixed -10dB. PCBEEP signal becomes amplifier input signal play speaker without coupling capacitor. amplifier shutdown mode, will shutdown mode whenever PCBEEP mode enable. APA2030 will return previous setting when PC-BEEP mode. input impedance 100k PCBEEP input pin.
Copyright ANPEC Electronics Corp. Rev. Apr., 2004
Optimizing Depop Circuitry Circuitry been included APA2030/1 minimize amount popping noise power-up when coming shutdown mode. Popping occurs whenever voltage step applied speaker. order eliminate clicks pops, capacitors must fully discharged before turn-on. Rapid on/off switching device shutdown function will cause click circuitry. value will also affect turn-on pops. (Refer Effective Bypass Capacitance) bypass voltage rise should slower than input bias voltage. Although bypass current source cannot modified, size changed alter device turn-on time amount clicks pops. increasing value turn-on reduced. However, tradeoff using larger bypass capacitor increase turn-on time this device. There linear relationship between size turn-on time. SE(for APA2030) configuration, output coupling capacitor, particular concern. This capacitor discharges through internal resistors. Depending size time constant relatively large. reduce transients mode, external resistor placed parallel with internal resistor. tradeoff using this resistor increase quiescent current. most cases, choosing small value range 0.33µF 1µF, being equal 0.47µF external resistor should placed parallel with internal resistor should produce virtually clickless popless turn-on. high gain amplifier intensifies problem small delta voltage multiplied gain. advantageous low-gain configurations. Amplifier Efficiency easy-to-use equation calculate efficiency starts being equal ratio power from power supply power delivered load. following equations basis calculating amplifier efficiency.
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Application Descriptions
Efficiency Where:
VOrms PSUP
VOrms
final point remember about linear amplifiers (either BTL) manipulate terms efficiency equation utmost advantage whenpossible. Note that equation, dominator. This indicates that goes down,efficiency goes other words, efficiency analysis choose correct supply voltage speaker impedance application. Power Dissipation Whether power amplifier operated modes, power dissipation major concern. equation11 states maximum power dissipation point mode operating given supply voltage driving specified load.
Psup IDDAVG
Efficiency configuration:
PSUP 4VDD
(VDD
(10)
mode PD,MAX
(11)
Table calculates efficiencies four different output power levels. Note that efficiency amplifier quite lower power levels rises sharply power load increased resulting nearly flat internal power dissipation over normal operating range. Note that internal dissipation full output power less than half power range. Calculating efficiency specific system proper power supply design. stereo audio system with loads supply, maximum draw power supply almost
mode operation, output voltage swing doubled mode. Thus maximum power dissipation point mode operating same given conditions times mode.
mode PD,MAX
(12)
0.25 0.50 1.00 1.25
Efficiency 31.25 47.62 66.67 78.13
IDD(A) 0.16 0.21 0.30 0.32
VPP(V) 2.00 2.83 4.00 4.47
0.55 0.55 0.35
Since APA2030/1 dual channel power amplifier, maximum internal power dissipation times that both equations depending mode operation. Even with this substantial increase power dissipation, APA2030/1 does require extra heatsink. power dissipation from equation12, assuming 5V-power supply load, must greater than power dissipation that results from equation13: PD,MAX
TJ.MAX
(13)
**High peak voltages cause increase. Table Efficiency Output Power 5V/8 Systems
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TSSOP-24 (APA2030) TSSOP-20 (APA2031) package with without thermal pad, thermal resistance equal oC/W 48oC/W, respectively. Since maximum junction temperature (TJ,MAX) APA2030/1 150oC ambient temperature (TA) defined power system design, maximum
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APA2030/2031
Application Descriptions
power dissipation which package able handle obtained from equation13. Once power dissipation greater than maximum limit D,MAX either supply voltage must bedecreased, load impedance (RL) must increased ambient temperature should reduced. Thermal Considerations thermal must connected ground. package with thermal APA2030/1 requires special attention thermal design. thermal design issues properly addressed, APA2030/1 will into thermal shutdown when driving load. thermal bottom APA2030/1 should soldered down copper circuit board. Heat conducted away from thermal through copper plane ambient. copper plane surface circuit board, vias smaller diameter should used thermally couple thermal bottom plane. good thermal conduction, vias must plated through solder filled. copper plane used conduct heat away from thermal should large practical. ambient temperature higher than 25°C, larger copper plane forced-air cooling will required keep APA2030/1 junction temperature below thermal shutdown temperature (150°C). higher ambient temperature, higher airflow rate and/ larger copper area will required keep thermal shutdown. Thermal Considerations Linear power amplifiers dissipate significant amount heat package under normal operating conditions. calculate maximum ambient temperatures, first consideration that numbers from Power Dissipation Output Power graphs (page17) channel values, dissipation heat needs doubled two-channel operation. Given maximum allowable junction temperature (TJ, total internal dissipation (PD), maxiMAX ambient temperature calculated with following equation. maximum recommended junction temperature APA2030/1 150°C. internal dissipation figures taken from Power Dissipation Output Power graphs. (Page17)
TA,Max TJ,Max -APD 45(0.8*2) 78°C (TSSOP-P24) 48(0.8*2) 73.2°C (TSSOP-P20)
(14)
APA2030/1 designed with thermal shutdown protection that turns device when junction temperature surpasses 150°C prevent damaging
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APA2030/2031
Packaging Information
eference egistration -153)
GAUGE PLANE
EXPOSED THERMAL 0.25 (L1)
BOTTOM VIEW (THERMALLY ENHANCED VARIATIONDS ONLY)
illim eters
Inches
0.00 0.15 0.80 1.05 =20P =20P =24P =24P =28P =28P =20P =24P =28P 0.65 6.40 4.30 4.50 =20P =24P =28P 0.45 0.75 0.09 0.09
0.047 0.000 0.006 0.031 0.041 0.252 =20P 0.260 =20P 0.303 =24P 0.311 =24P 0.378 =28P 0.386 =28P 0.165 =20P 0.188 =24P 0.150 =28P 0.026 0.252 0.169 0.177 0.118 =20P 0.127 =24P 0.110 =28P 0.018 0.030 0.039R 0.004 0.00 0.008
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Copyright ANPEC Electronics Corp. Rev. Apr., 2004
APA2030/2031
Physical Specifications
Terminal Material Lead Solderability Solder-Plated Copper (Solder Material 90/10 63/37 SnPb), 100%Sn Meets Specification RSI86-91, ANSI/J-STD-002 Category
(IR/Convection Reflow)
p-up Critical
Reflow Condition
Temperature
p-down Preheat
Peak
Classificatin Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly Large Body Small Body
Pb-Free Assembly Large Body Small Body 3°C/second max. 150°C 200°C 60-180 seconds 3°C/second 217°C 60-150 seconds +0/-5°C +0/-5°C 10-30 seconds 20-40 seconds
Average ramp-up rate 3°C/second max. Preheat Temperature (Tsmin) 100°C Temperature (Tsmax) 150°C Time (min max)(ts) 60-120 seconds Tsmax Ramp-up Rate Tsmax Temperature(TL) 183°C Time (tL) 60-150 seconds Peak Temperature(Tp) +0/-5°C +0/-5°C Time within actual Peak 10-30 seconds 10-30 seconds Temperature(tp) Ramp-down Rate 6°C/second max. minutes max. Time 25°C Peak Temperature
Copyright ANPEC Electronics Corp. Rev. Apr., 2004
6°C/second max. minutes max.
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Note: temperatures refer topside package. Measured body surface.
APA2030/2031
Reliability Test Program
Test item SOLDERABILITY HOLT Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B,A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD Description 245°C, 1000 Bias 125°C Hrs, 100%RH, 121°C -65°C 150°C, Cycles VHBM 2KV, 200V 10ms, 100mA
Carrier Tape Reel Dimensions
Application
+0.1
±0.5
±0.5 ±0.1
16.4 ±0.2 ±0.1
±0.2 ±0.1
±0.3 ±0.1
±0.1 ±0.1
1.75±0.1 0.3±0.05
TSSOP-
±0.1
(mm)
Copyright ANPEC Electronics Corp. Rev. Apr., 2004
www.anpec.com.tw
APA2030/2031
Cover Tape Dimensions
Application TSSOP- Carrier Width Cover Tape Width 21.3 Devices Reel 2000
Customer Service
Anpec Electronics Corp. Head Office Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. 886-3-5642000 886-3-5642050 Taipei Branch 137, Lane 235, Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, 886-2-89191368 886-2-89191369
Copyright ANPEC Electronics Corp. Rev. Apr., 2004
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Stereo 2.6W Audio Amplifier(With Gain Control) operating current

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