MIPS Instruction Architecture (ISA) Multiply, Accumulate (MAC) Prefetc

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MIPS Instruction Architecture (ISA) Multiply, Accumulate (MAC) Prefetc

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TX39TM/TX49RISCASICCores 32/64-bit MIPS
MIPS Instruction Architecture (ISA) Multiply, Accumulate (MAC) Prefetch (PREF) instructions 64-bit integer general purpose register 32-bit floating point general purpose registers Instruction Cache: 16K/32K Bytes (option), 4-Way Associative Lock function support Data Cache: 16K/32K Bytes (option), 4-Way Associative Lock function support, Write back Write through support -Entry MMU: 48-double entry JTLB, 2-entry Instruction TLB, 4-entry Data Optional Floating Point Unit (IEEE Std. Double precision) Debug Support Unit with Enhanced JTAG support TX49 Core Diagram
TX49 Core
Integer Unit System Control Coprocessor (CP0) Registers Registers
Data Path Pipeline Controller
-Bus
Inst.
Data
DMAC
ogic
RISCASIC Core Peripherals Block Diagram
Description
Toshiba offers 32/64-bit peripheral cores based architecture pioneered MIPS® Technologies Inc. These cores come varied speeds sizes help customers achieve best price performance solution their ASIC implementation. Toshiba been supporting customers with core peripherals embedded ASICs many years with solid track record successful RISCASICs consumer, communications computer applications. These cores have also been implemented high volume ASSP products fully supported with software hardware development tools.
Floating-Point Coprocessor (CP1)
Data Path
Exception Unit
Byte 4-way Instruction Cache
Cache Controller
Byte 4-way Data Cache
Write Buffer
TX39 Core Features
TX39 family includes TC220, ASIC families offers high performance processor ASIC-ready hard core. applications digital signal processing fields with single-cycle Multiply Accumulate (MAC) operation. debug support unit also available core. 5-Stage Pipeline MIPS Instruction Architecture (ISA) Non-Blocking Load Instruction Cache: 8K/4K Bytes, 2-Way Associative Data Cache: 4K/1K Bytes, 2-Way Associative -Entry MMU/TLB: Byte Byte pages
TX39/49 Peripherals
These peripherals support DRAM available soft cores. DRAM, Memory Controller Timer Serial
Core Lineup
Following table shows list Cores their relevant features:
Clock Speed 70Mhz TX39/H TX39/H2 100Mhz TX39/H3 133Mhz 150Mhz TX49H Core TX49H2 Family TC220 TC240 TC260 TC240 Geometry 0.35 CMOS 0.25 CMOS 0.14 CMOS 0.25 CMOS 0.14 CMOS
TX49 Core Features
TX49 family high-end 64-bit processor offering ASIC-ready hard core. These cores available TC240 families with cache options. 5-Stage Pipeline (optimized)
180Mhz TC260
TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
Application Specific Standard Products (ASSPs)
Toshiba offers ASSPs help customers understand features peripheral cores. following diagram shows list ASSPs their peripherals:
ASSP ROMC DMAC DRAMC Timer UART 3903A 3904AF 3912 3927AF 4927 4955
Evaluation Board Evaluation Board (EVAL Board) debug monitor enables user execute, evaluate debug user programs. connects debugger serial interface. EVAL board uses application specific standard product (ASSP) that designed corresponding core.
Hardware Software Co-Development
user able co-develop software hardware using third party products from Plus® Mentor Graphics® improve debugging process user able co-verify operation these modules performing proper partitioning hardware software. Mentor's Seamlessproduct provides full control through software/hardware break points allows different event recognizers generate triggers their collection.
Development Tools
complete range hardware software tools available from Toshiba third party tool vendors. development environment includes C-Compiler, simulator, Evaluation Board, Circuit Emulator (ICE) Real Time Operating System (RTOS). environment provides full support program debugging during application development. These tools also used conjunction with third-party development system. C-Compiler C/C++ Compilers MIPS family available from Cygnus®. Position independent code specified 16/32/64-bit instruction sets supported. Operating systems Windows Solaris supported. Simulator simulator simple, high-speed instruction keeps executed instructions. allows tracing status changes registers. Target hardware required. Debugger debugger features Graphical User Interface (GUI) which controls simulator, emulator debug monitor. supports "drop drag" feature, interwindow access Windows environments. debugging system uses JTAG feature communicates serially with target chip (RISCASIC). Break points trace through debug pins.
Summary
Today's deep sub-micron ASIC technologies capable millions gates permit high levels System Level Integration (SLI) consisting memory, microprocessors, analog functions, application logic I/Os chip. ASIC design success means getting through development into production on-time while keeping development costs device price low. challenge employ best ASIC technology, design flow methodology, tools, libraries packaging matched job. With many years serving ASIC customers, Toshiba provides capabilities needed success. Toshiba offers embedded arrays fast turn around times when special blocks such RAM, RISC CPUs needed standard cell approach available lowest device costs best chip performance. Toshiba's design flow based commercially available tools includes Toshiba's Timing-Driven Flow (TDF). broad packaging capabilities include thermally enhanced profile QFPs BGAs with high count. Toshiba committed fastest proto-typing ramp-to-production industry across ASICs high capacity manufacturing facilities ISO9001 certified. With these capabilities, Toshiba make sure that your chips on-time meet your specifications with lowest cost risk.
Toshiba,TX39, TX49 RISCASIC trademarks Toshiba Corporation. MIPS registered trademark MIPS Technologies Inc. Cygnus registered trademark Hat, Inc. Plus registered trademark Plus Inc. Seamless trademark Mentor Graphics registered trademark Mentor Graphics.All others trademarks their respective manufacturer registered certain jurisdictions.
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NORTHWEST Jose, TEL: (408) 526-2400 FAX: (408) 526-2410 Portland, TEL: (503) 629-0818 FAX: (503) 629-0827 SOUTHWEST Irvine, TEL: (949) 461-3800 FAX: (949) 768-2918 Dallas, TEL: (972) 480-0470 FAX: (972) 235-4114 CENTRAL Chicago, TEL: (847) 945-1500 FAX: (847) 945-1044 NORTHEAST Boston, TEL: (781) 224-0074 FAX: (781) 224-1096 Edison, TEL: (732) 248-8070 FAX: (732) 248-8030
technical data controlled under U.S. Export Administration Regulations subject approval U.S. Department Commerce prior export. export reexport directly indirectly, contravention U.S. Export Administration regulations, strictly prohibited. TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.

MIPS Instruction Architecture (ISA) Multiply, Accumulate (MAC) Prefetc

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