KS85F40113 KS85F40113 KS85F40113 single-chip CMOS microcontroller

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KS85F40113 KS85F40113 KS85F40113 single-chip CMOS microcontroller

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High Performance 8-bit Portable Audio Applicatio
KS85F40113 KS85F40113
KS85F40113 single-chip CMOS microcontroller been designed high performance using Samsung's newest 8-bit core, CalmRISC. Audio Speech Codec Features
With features such Multiple CODEC decoder capability, 8-channel converter, full speed USB, Architecture 24-bit MAC), watch timer, KS85F40113 offers excellent variety design solutions portable digital audio systems.
8-bit CalmRISC Core Architecture 24-bit MAC)
Memory Code Memory 128-K Bytes(64-KWord) Full Flash type memory(User mode) Data Memory 36-K Bytes SRAM. Pins I/O: 59pins, input only pin. CODE OPTIONS Maximum Watchdog timer clock source select Basic timer counter clock source selecting reset value stop release select 8-Bit Basic Timer Watch-dog timer Programmable basic timer 8-bit counter 3-bit counter kinds clock source Overflow signal 8-bit counter makes basic timer interrupt. control oscillation warm-up time Overflow signal 3-bit counter makes system reset. 8-Bit Timer/Counters programable timer/counters Interval, capture match overflow mode 8-Bit Serial Interface 8-bit transmit/receive 8-bit receive mode. first first transmission selectable. Internal external clock source. IIC, Interface One-Ch Multi- Master controller Two-Ch Sony/Phillips controller UART Interface Full-duplex UART controller SSFDC Interface Logic
Specification Compliance(Ver1.0, Ver1.1) Built Full Speed Transceiver Support device address endpoints. control endpoint data endpoints bytes endpoint, bytes point, bytes endpoints. each data endpoint configurable interrupt, bulk isochronous. Parallel Port Interface Controller Interrupt-based operation Support IEEE Standard 1284 communication mode(compatibility, nibble, byte mode). Supports protocol with without run-length encoding Automatic handshaking mode forward reverse protocol with software enable/disable. External Interrupt source Edge triggered Level triggered 8-bit resolution channels normal input Power-down Modes Idle mode only clock stop. Stop mode system clock clock stop. OSCILLATION SOURCES Clock Synthesizer(Phase Locked Loop) based 32.768KHz. clock divider circuit(Div 128) INSTRUCTION EXECUTION TIMES 33.3ns Fxx=30MHz when cycle instruction 66.6ns Fxx=30MHz when cycle instruction OPERATING TEMPERATURE OPERATING VOLTAGE RANGE 3.0V 3.6V 30MHz Package Types 80-QFP, 80-TQFP
Random Number Generator
Strong Point Provide Flash version device which totally compatible with standard mask product Real time engineering support Competitive Price
KS85F40113
Target Application Portable Digital Audio Application (MPEG-1 Audio, Layer Audio RealAudio (G2) G.729, G.726
99-10-14
KS85F40113 KS85F40113
Block Diagram Port Port (P0.0 P0.7) (P0.0 P0.7) Port Port (P1.0 P1.7) (P1.0 P1.7) Port Port (P2.0 P2.7) (P2.0 P2.7) Port Port (P3.0 P3.7) (P3.0 P3.7) Port Port (P4.0 P4.7) (P4.0 P4.7) Port Port (P5.0 P5.7) (P5.0 P5.7) Port Port (P6.0 P6.7) (P6.0 P6.7) Port Port (P7.0 P7.7) (P7.0 P7.7) System Block Diagram 8-bit CalmRISC 8-bit CalmRISC Control Control 8-bit 8-bit Basic Timer Basic Timer UART UART Timer Timer Smart Media Smart Media (SSFDC) (SSFDC) Ext. Interrupt Ext. Interrupt 128K-byte 128K-byte Flash Flash 36K-byte 36K-byte SRAM SRAM Port Port (P8.0 P8.3) (P8.0 P8.3) Watch Watch Timer Timer
Core MAC) Core MAC)
C-PAD (CalmRISC Portable Audio Device) Block Diagram (MP3 Application, KS85F40113)
Speaker Display Display Audio tuner Audio tuner
Flash Memory Card
SSFDC SSFDC
Module Module
Stereo Codec Stereo Codec Mixer Mixer
CalmRISC CalmRISC Microcontroller Microcontroller
128KByte 128KByte (Flash Type) (Flash Type)
MAC2424 MAC2424 Co-processor Co-processor (S/W Codecs (S/W Codecs
Matrix Matrix Byte SRAM Byte SRAM
Hardware Release Schedule Nov. `00. User's manual Dec. Target Board Dec. Contact Point
Software Development Schedule Decoder Dec. Audio Dec. A-CELP.live Dec.
http://www.samsungsemi.com
Jong-In (Application)
(TEL) 82-331-209-3022 (FAX) 82-331-209-6547 (Email) kjoy@samsung.co.kr
99-10-14
Yong-Soo (Sales Marketing) (TEL) 82-331-209-1915 (FAX) 82-331-209-1899 (Email) yskim1@sec.samsung.com
KS85F40113
CalmRISC Core
MAC2424 Coprocessor
8-Bit Harvard RISC Core 1MWord Program Memory Space 64KByte Data Memory Space Register-Memory Instruction Architecture Stage Pipeline General Purpose Registers, Special Purpose Register Efficient Coprocessor Interface (Fig. Instruction Classes including Coprocessor Instructions Instructions Word Long Except Long Branches Words Long) Ultra Power High Performance /MIPS MIPS 3.0V with 3-Metal CMOS Process
PA[19:0] PD[15:0] Program Address Generation Unit PC[15:0]
24-Bit Engine Multiplier Adder/Subtracter Accumulators (MA0, MA1) 32KWord X-Memory Y-Memory Address Space (1Word Bytes) Accumulators Pointers(RP0/1/2/3, RPD0/1) Exponent Detector Barrel Shifter Ultra Power High Performance /MIPS MIPS 3.0V with 3-Metal CMOS Process
RPD0-1
Status Registers
SD0-3 MSR0
Control
RP0-3
MC0-1
SPTR[5:0] HS[0] Hardware Stack
Modulo Arithmetic
Modulo Arithmetic YB[23:0]
MSR1 MSR2
Interface Logic
HS[15]
DO[7:0] DI[7:0] ALUL
ABUS[7:0] BBUS[7:0]
XB[23:0] X0/X1 Y0/Y1 24-bit Adder Multiplier 16-bit Barrel Shifter 52-bit Adder
IDL1
ALUR
24-bit Exponent Detector
Flag RBUS
IDL0
MA0/1
DA[15:0]
Data Memory Address Generation Unit
(Fig.
(Fig. Coprocessor Interface
Passive Coprocessor (Only CalmRISC Fetches Instructions) Multiplier Adder/Subtracter Pipeline Synchronization between CalmRISC MAC2424 Resource Conflict Feadlock 32KWord X-Memory Y-Memory Address Space (1Word Bytes) Real Time Status Flagging from Coprocessor CalmRISC Single (Microprocessor Development System)
Data Memory
Command Program Memory CalmRISC Core Status MAC2424 Core
(Fig.
99-10-14
KS85F40113

KS85F40113 KS85F40113 KS85F40113 single-chip CMOS microcontroller

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