16COM/80SEG CONTROLLER/DRIVER SPLC781A, dot-matrix controller dri
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SPLC781A
16COM/80SEG CONTROLLER/DRIVER
SPLC781A, dot-matrix controller driver, low-power CMOS integrated circuit. SPLC781A capable connecting with application easily used designing low-cost products.
BLOCK DIAGRAM
Timing Generation Circuit 80-bit Bi-Direction Shift Register Latch Circuit Segments Commons Driver
OSC1
DB0-DB3 DB4-DB7 Buffer
Parallel Serial Data Conversion Circuit Busy Flag Character Generator Character Generator Cursor Blink Control Circuit
Data Register
Display Data Bytes 16-bit Shift Register
COM1COM16
Instruction Register
Instruction Decorder
SEG1SEG80
Address Counter
FEATURES
Character generator ROM: 7200 bits Character font dots: characters Character font dots: characters Character generator RAM: bits Character font dots: characters Character font dots: characters Provide connecting 4-bit 8-bit Direct driver LCD: COMs SEGs 80-channel Bi-Direction segment driver Duty factor (selected program): duty: line dots 1/11 duty: line dots 1/16 duty: lines dots line Support external clock operation Package form: bump chip
SUNPLUS TECHNOLOGY reserves right change this documentation without prior notice. Information provided SUNPLUS TECHNOLOGY believed accurate reliable. However, SUNPLUS TECHNOLOGY makes warranty errors which appear this addition, document. Contact SUNPLUS TECHNOLOGY obtain latest version device specifications before placing your order. responsibility assumed SUNPLUS TECHNOLOGY infringement patent other rights third parties which result from use. failure product reasonably expected result significant injury user, without express written approval Sunplus. SUNPLUS products authorized critical components life support devices/ systems aviation devices/systems, where malfunction
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SPLC781A
FUNCTION DESCRIPTION
OSCILLATOR
built-in oscillator generates suitable clock SPLC781A operation.
Code
Display On/Off Control
Display Display Cursor Cursor Blinks Blinks
CONTROL DISPLAY INSTRUCTIONS
Control display instructions shown follows:
Clear Display
Code
character font
character font
line
Cursor
11th line
clears whole display sets display data RAMs address address counter.
Return Home
Code
Blink display alternately
Cursor Display Shift
Without changing RAMs data, move cursor shift display.
care
sets display data RAMs address address counter display returns original position. cursor blink goes
Code
left edge display line lines displayed). content Display Data does change.
Entry Mode
During writing reading data, sets cursor move direction shifts display.
Description Shift cursor left Shift cursor right Shift display left. Cursor follows display shift Shift display right.
Address Counter
Code
Cursor follows display shift
Increment, Decrement. display shift, display does shift.
I/D=1 I/D=0
shifts display left shifts display right
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MAY. 2001 Version:
SPLC781A
Function
Code
Display data read write after this setting. one-line display (aaaaaaa)2: (00)16 (4F)16.
care sets interface data length. Datas transferred with 8-bit lengths (DB0 DB7). Datas transferred with 4-bit lengths (DB4 DB7). requires times transfer data) sets number display line. One-line display. Two-line display. sets character font. dots character font. dots character font.
two-line display (aaaaaaa)2: (00)16 (27)16 first line, (aaaaaaa)2:(40)16 -(67)16 second line.
Read Busy Flag Address
Code
When indicates that system busy now; will accept instruction until busy
Display Lines Character Font dots dots dots Duty Factor
Code
same time,
address counter contents (aaaaaaa)2 read out.
Write Data Character Generator Display Data
cannot display lines with character font.
Character Generator Address
Code
writes data (dddddddd)2 character generator display data RAM.
Read Data from Character Generator Display Data
sets character generator address (aaaaaa)2 address counter. Character generator data read write after this setting.
Code
Display Data Address
Code
reads data (dddddddd)2 from character generator display data RAM.
correct data readout shown belows: address character generator display
sets display data address (aaaaaaa)2 address counter.
data shift cursor instruction. Send Read instruction.
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SPLC781A
INSTRUCTION TABLE
Instruction Clear Display Return Home Instruction Code Description Write "20H" DDRAM DDRAM address "00H" from DDRAM address "00H" from return cursor original position shifted. Entry Mode Display Control Cursor Display Shift Function contents 38µs 38µs DDRAM changed. Assign cursor moving direction enable shift entire display bit. cursor moving display shift control bit, direction, 38µs without changing DDRAM data. interface data length (DL: 8-bit/4-bit), numbers display line 2-line/1-line) and, display font type (F:5x10 dots/5x8 dots) CGRAM Address DDRAM Address Read Busy Flag Address Counter Write Data Read Data from
"-": don't care
Execution time (fosc=270KHz) 1.52ms 1.52ms
display(D),
cursor(C),
blinking cursor(B) on/off control 38µs
CGRAM address address counter.
38µs 38µs
DDRAM address counter Whether during internal operation known reading contents address counter also read.
Write
data
into
internal
38µs 38µs
(DDRAM/CGRAM). Read data from internal (DDRAM/CGRAM).
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SPLC781A
8-BIT Operation 16-Digit 1-Line Display (Using Internal Reset)
Instruction Display Power reset. display. 8-bit operation select 1-line display line character font.
Operation
Power SPLC781A starts initializing Function
RSR/W DB7DB6DB5DB4DB3DB2 DB1DB0
Display control
Display Cursor appear.
Entry mode
Increase address one. will shift cursor right when writing RAM. display shift.
Write data
Write cursor incremented shifted right.
Write data
Write cursor incremented shifted right.
Write data
WELCOME
ELCOME
WELCOME
Write cursor incremented shifted right.
mode display shift when writing
Entry mode
Write data
Write
"(space).
cursor incremented shifted right.
LCOME
Write data
Write cursor incremented shifted right.
Write data
COMPAMY COMPAMY
Write cursor incremented shifted right.
Cursor display shift
Only shift cursor's position left
Cursor display shift
COMPAMY
Only shift cursor's position left
Write data
COMPAMY
Write display moves left.
Cursor display shift
COMPAMY
Shift display cursor's position right.
Cursor display shift
COMPAMY
Shift display cursor's position right.
Write data
OMPANY
Write
space
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SPLC781A
Instruction
Display
Operation cursor incremented shifted right.
Return home
WELCOME
Both display cursor return original position address
4-BIT Operation 16-Digit 1-Line Display (Using Internal Reset)
Instruction Display Power reset. display. 4-bit operation.
Operation
Power SPLC781A starts initializing Function
DB7DB6
Function
4-bit operation select 1-line display line character font.
Display control
Display Cursor appears.
Entry mode
Increase address one. will shift cursor right when writing RAM. display shift.
Write data
Write cursor incremented shifted right.
8-BIT Operation 16-Digit 2-Line Display (Using Internal Reset)
Instruction Display Power reset. display. 8-bit operation select 2-line display line
Operation
Power SPLC781A starts initializing Function
RSR/W DB6DB5DB4DB3DB2 DB1DB0
character font.
Display control
Display Cursor appear.
Entry mode
Increase address one. will shift cursor right when writing RAM. display shift.
Write data
Write cursor incremented shifted right.
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MAY. 2001 Version:
SPLC781A
Write data
WELCOME WELCOME_
Instruction
Display
Operation
Write cursor incremented shifted right. sets RAM's address. cursor moved beginning position line. Write cursor incremented shifted right. Write cursor incremented shifted right. Write cursor incremented shifted right. When writing, sets mode display shift.
address
Write data
WELCOME
WELCOME PART_ WELCOME PART_
Write data
Write data
Entry mode
WELCOME PART_ ELCOME PARTY_
Write data
Write cursor incremented shifted right.
Return home
WELCOME PARTY
Both display cursor return original position address
RESET FUNCTION
power starts internal auto-reset circuit executes initial instructions.
8-Bit Interface Power Wait time after 4.5V
There initial procedures shown belows:
Wait time 40ms After 2.7V cannot checked before this instruction Function Interface bits length
Wait time
cannot checked before this instruction Function Interface bits length
Wait time
cannot checked before this instruction Function Interface bits length checked after following instructions Function Interface bits length Specify number display lines character font number display lines character font cannot changed afterwards Display Display clear Entry mode
Initialization Ends
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SPLC781A
4-Bit Interface Power Wait time after 4.5V Wait time Wait time cannot checked before this instruction Function Interface bits length checked after following instructions Function interface bits length) Interface bits length Function Interface bits length Specify number display lines character font number display lines character font cannot changed afterwards Display Display clear Initialization Ends Entry mode cannot checked before this instruction Function Interface bits length Wait time 40ms After 2.7V cannot checked before this instruction Function Interface bits length
DISPLAY DATA RAM)
stores display data size bytes. area that used display used general data RAM. address address counter. There relations between display data RAMs address LCDs position shown belows.
1-line display display characters
Display position Display data address
Example 1-line display display characters
Display position Display data address
When display shift operation performed display data RAM's address moves Left shift
Right shift
CHARACTER GENERATOR ROM)
Using 8-bit character code, character generator generates character patterns. character patterns. Sunplus Technology Co., Ltd. also generate character patterns
CHARACTER GENERATOR RAM)
Using programs, users easily change character patterns character generator RAM. character patterns. PAGE MAY. 2001 Version: written with dots, character patterns written with dots,
SPLC781A
Here SPLC781As character patterns shown belows: Correspondence between Character Codes Character Patterns
Higher 4-bit Character Code (Hexadecimal) 0000
0010 0011 0100 0101 0110 0111 1010 1011 1100 1101 1110 1111
0000
0001
0010
0011
Lower 4-bit CHaracter Code (Hexadecimal)
0100
0101
0110
0111
1000
1001
1010
1011
1100 1101
1110
1111
Sunplus Technology Co., Ltd. PAGE MAY. 2001 Version:
SPLC781A
relations between character generator addresses, character generator data (character patterns) character character patterns
Character Code Data Address Character Patterns Data Character Pattern Example Cursor Position Character Pattern Example
codes shown belows:
Note1:
means that bit0~2 character code correspond bit3~5 address.
Note2:
These areas used display, used general data RAM.
Note3: When bit4-7 character code character patterns selected. Note4: Selected, selected care Note5: example (1), character code b7-b4 display That means character code (00)16,and (08)16 display character. Note6: bits character code character pattern line position. line cursor position display formed logical with cursor.
Character Code Data
Address
Character Patterns Data Cursor Position Character Pattern Example
Note1:
means that bit1~2 character code correspond bit4~5 address
Note2:
These areas used display used general data RAM.
Note3: When bit4-7 character code character patterns selected. Note4: Selected selected care Note5: example (1), character code b7-b4 display That means character codes (00) (01) (08) 16,and (09) display character Note6: bit0-3 character code character pattern line position. 11th line cursor position display formed logical with cursor.
TIMING GENERATION CIRCUIT
timing generation circuit generate needed timing signals internal circuits. generated. prevent internal timing interface, access timing access timing separately
DRIVER CIRCUIT
There commons segments signal drivers driver circuit. When program specifies character fonts line numbers, corresponding common signals will output drive waveforms others still output unselected waveforms.
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SPLC781A
CURSOR BLINK CONTROL CIRCUIT
generate cursor blink cursor blink control circuit. cursor blink appears digit display data address address counter. When address counter (07) cursors position shown follows:
1-line display digit Display position Display data address Hexadecimal cursor position 2-line display digit line line Display position Display data address Hexadecimal
cursor position
INTERFACING
There types data operations: 4-bit operation 8-bit operation. Using 4-bit MPU, interfacing 4-bit data Using 4-bit
SPLC781A SPLC781A
transferred lines (for 8-bit operation, DB4). lines used. interface 8-bit data needs times.
First, higher 4-bit data
transferred 4-busline (for 8-bit operation, DB4). Secondly, lower 4-bit data transferred lines (for 8-bit operation, DB0). Using 8-bit MPU, interfacing 8-bit data transferred lines (DB0 DB7).
short
open
SUPPLY VOLTAGE DRIVE
bias selected open/short pins.
Bias (1/8, 1/11 Duty)
Bias (1/16 Duty)
Connect Condition
Duty Factor Bias
1/8, 1/11 Short
1/16 Open
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MAY. 2001 Version:
SPLC781A
relations between frames frequency oscillators frequency (Assume oscillation frequency 250KHz, clock cycle time
Duty
clocks
COM1 V2(V3) frame frame (µs) 12800 (µs) 12.8 Frame frequency 78.1 (Hz) 12.8 (ms)
Duty
clocks
COM1 V2(V3) frame frame (µs) 17600 (µs) 17.6 Frame frequency 56.8 (Hz) 17.6 (ms)
Duty
clocks
COM1 frame frame (µs) 12800 (µs) 12.8 78.1 (Hz) 12.8 (ms)
Frame frequency
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SPLC781A
REGISTER (Instruction Register) (Data Register)
SPLC781A 8-bit registers (instruction register) (data register). followings, combinations select
SEGMENT DATA DIRECTION
segment data shift direction control pin. data shifted from SEG1 SEG80 connecting VSS, reversed connecting VDD.
PORT CONFIGURATION
Input port
Operation write (Display clear, etc.) Read busy flag (DB7) address counter (DB0 DB6) write Display data Character generator RAM) read (Display data generator Character
NMOS PMOS
Input port
written from MPU, cannot read MPU.
PMOS
BUSY FLAG (BF)
When busy flag output DB7. busy flag 1,SPLC781A busy state does accept instructions until busy flag
ADDRESS COUNTER (AC)
address counter assigns addresses display data character generator RAM. When instruction address After
Output port
PMOS
written address information sent from
writing into reading from)display data character generator RAM, automatically incremented decremented -1). contents output when
NMOS
Input Output port
PMOS
PMOS
Enable
NMOS
Data
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MAY. 2001 Version:
SPLC781A
DESCRIPTION
Mnemonic OSC1 signal select read write. Read, Write. signal select register. Data register (for read write) Instruction register (for write), Busy flag address counter (for read). Low-order data bits High-order data bits Test mode clock output; Open normal mode Test mode data output; Open normal mode Segment data shift direction. Segment Segment Segment Segment SEG1 SEG10 SEG11 SEG70 SEG71 SEG80 COM1 COM8 COM9 COM16 Common signals LCD. Segment signals LCD. start signal read data write data. Dummy Type Power input Ground Test Mode clock input; Open normal mode Supply voltage driving. VLCD Description
ABSOLUTE MAXIMUM RATINGS
Characteristics Operating Voltage Driver Supply Voltage Input Voltage Range Operating Temperature Storage Temperature
conditions AC/DC Electrical Characteristics.
Symbol VLCD TSTO
Ratings -0.3V +7.0V VDD-12V VDD+0.3V -0.3V 0.3V +125
normal operational
Note: Stresses beyond those given Absolute Maximum Rating table cause operational errors damage device.
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MAY. 2001 Version:
SPLC781A
CHARACTERISTICS
Characteristics Operating Voltage Operating Current Input High Voltage Input Voltage Input High Current Input Current Output High Voltage (TTL) Output Voltage (TTL) Symbol VIH1 VIL1 VOH1 VOL1 VDCOM Voltage Drop VDSEG Voltage VLCD 11.0 Limit Min. -0.3 Typ. -125 Max. -250 Unit Internal clock (Note) Pins:(E, R/W, DB7) Test Condition
Pins: (RS, R/W, DB7) Pins: Pins: Pins: COM1 COM16 Pins: SEG1 SEG80 VDD-V5, bias bias
Note: E="L", R/W, open, outputs loads.
CHARACTERISTICS
INTERNAL CLOCK OPERATION
Characteristics Frequency Symbol FOSC1 Limit Min. Typ. Max. Unit
BIAS RESISTOR
Characteristics Bias Resistor Symbol Limit Min. Typ. Max. Unit K-ohm
WRITE MODE (Writing Data from SPLC781A)
Characteristics Cycle Time Pulse Width Rise/Fall Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Sunplus Technology Co., Ltd. Symbol tSP1 tHD1 tSP2 tHD2 Limit Min. Typ. PAGE Max. Unit Test Condition Pins: R/W, Pins: R/W, Pins: Pins: MAY. 2001 Version:
SPLC781A
READ MODE (Reading Data from SPLC781A MPU)
Characteristics Cycle Time Pulse Width Rise/Fall Time Address Setup Time Address Hold Time Data Output Delay Time Data hold time Symbol tSP1 tHD1 tHD2 Limit Min. Typ. Max. Unit Test Condition Pins: R/W, Pins: R/W, Pins:
WRITE MODE TIMING DIAGRAM (Writing Data from SPLC781A)
VIH1 VIL1 tSP1 VIL1 VIH1 VIL1 VIH1 VIL1 VIH1 VIL1 tSP2
VIH1 VIL1 tHD1 VIL1 tHD1 VIL1 tHD2 VIH1 VIL1
Valid Data
READ MODE TIMING DIAGRAM (Reading Data from SPLC781A MPU)
VIH1 VIL1 tSP1 VIH1
VIH1 VIL1 tHD1 VIH1 tHD1 VIL1 tHD2 Valid Data VIH1 VIL1
VIH1 VIL1 VIH1 VIL1
VIH1 VIL1
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SPLC781A
APPLICATION NOTES
INTERFACE
Interface 8-bit 6805
6805 COM1 COM16 SEG1 SEG80
Interface 8-bit
IORQ COM1 COM16
PANEL COMMONS
PANEL COMMONS
SPLC781A
SPLC781A SEG1 SEG80
SEGMENTS
SEGMENTS
APPLICATIONS
Panel characters line
SEG2 SEG1 COM8 COM1
BOTTOM VIEW
SEG79 SEG80 COM16 COM9
Example dots characters line Bias Duty Chip bottom view lower side (SHL "0")
Panel characters line
SEG2 SEG1 COM8
BOTTOM VIEW
SEG79 SEG80 COM16 COM11 COM10 COM9
COM1
Example dots characters line Bias Duty Chip bottom view lower side (SHL "0")
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MAY. 2001 Version:
SPLC781A
Panel characters lines
SEG2 SEG1 COM8 COM1
BOTTOM VIEW
SEG79 SEG80 COM16 COM9
Example dots characters lines Bias Duty Chip bottom view lower side (SHL "0")
Panel characters lines
SEG79 SEG80 COM16
VIEW
SEG2 SEG1 COM8
COM9
COM1
Example dots characters lines Bias Duty Chip view lower side (SHL "1")
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MAY. 2001 Version:
SPLC781A
CHARACTER GENERATOR (SPLC781A-01)
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MAY. 2001 Version:
SPLC781A
CHARACTER GENERATOR (SPLC781A-02)
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MAY. 2001 Version:
SPLC781A
ASSIGNMENT LOCATIONS
ASSIGNMENT
SEG11 SEG12 SEG13 SEG14 SEG15 SET16 SEG17 SEG18
SEG63 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70
SEG10 SEG9
SEG71
SEG80 COM16
SEG1
COM8
COM10 COM9
COM1
OSC1
SPLC781A DIMENSIONS
Item Chip Size Bumped Size Bumped Height Size 6330 (TYP) 2080 Unit
Note1: ensure that functions properly, please bond VDD, pins. Note2: 0.1µF capacitor between should placed close passible.
ORDERING INFORMATION
Product Number SPLC781A-nnnnV-C
Note1: Code number (nnnnV) assigned customer. Note2: Code number (nnnn 0000 9999); version
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Package Type Chip form(COG)
MAY. 2001 Version:
SPLC781A
LOCATIONS
Name SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 OSC1 -3022 -3022 -3022 -3022 -3022 -3022 -3022 -3022 -3022 -3022 -3022 -3022 -3022 -3022 -3022 -3022 -3022 -3022 -3022 -3022 -3022 -2988 -2769 -2383 -2249 -2068 -1996 -1924 -1792 -1714 -1637 -1505 -1433 -1361 1092 1252 -163 -241 -318 -396 -472 -550 -627 -750 -898 -898 -898 -898 -898 -898 -898 -910 -910 -910 -898 -898 -898 -898 -898 -898 -898 -898 -898 -898 PAGE Name SEG73 SEG72 SEG71 SEG70 SEG69 SEG68 SEG67 SEG66 SEG65 SEG64 SEG63 SEG62 SEG61 SEG60 SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 3027 3027 3027 3027 2274 2197 2119 2043 1965 1888 1810 1733 1655 1578 1500 1423 1345 1269 1191 1114 1036 -124 -202 -279 -357 -433 -511 MAY. 2001 Version:
Sunplus Technology Co., Ltd.
SPLC781A
Name COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 SEG80 SEG79 SEG78 SEG77 SEG76 SEG75 SEG74 1636 1795 2184 2344 2729 2889 3027 3027 3027 3027 3027 3027 3027 3027 3027 3027 3027 3027 3027 3027 3027 3027 3027 -898 -898 -898 -898 -898 -898 -744 -672 -538 -460 -384 -306 -229 -151 Name SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 -588 -666 -743 -821 -898 -976 -1053 -1131 -1207 -1285 -1362 -1440 -1517 -1595 -1672 -1750 -1827 -1905 -1981 -2059 -2136 -2214 -2291
DISCLAIMER
information appearing this publication believed accurate. Integrated circuits sold Sunplus Technology covered warranty patent indemnification provisions stipulated terms sale only. SUNPLUS makes warranty, express, statutory implied description regarding information this publication FURTHER, SUNPLUS MAKES WARRANTY SUNPLUS reserves right halt production alter specifications regarding freedom described chip(s) from patent infringement. MERCHANTABILITY FITNESS PURPOSE. prices time without notice. publication current before placing orders.
Accordingly, reader cautioned verify that data sheets other information this Products described herein intended normal commercial applications. Please note that application circuits
Applications involving unusual environmental reliability requirements, e.g. military equipment medical life support equipment, specifically recommended without additional processing SUNPLUS such applications. illustrated this document reference purposes only.
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MAY. 2001 Version:
SPLC781A
REVISION HISTORY
Date APR. 19999 NOV. 1999 Revision Description Original Indicate dummy desctiption. display 16-digit). Remove from output port. Remove external clock from characteristic. Typ: Max: Min: Modify application circuit. coordinator modified. OCT. 2000 FEB. 2001 Delete "PRELIMINARY" chip size description example Modify corong direction example when "1". "REVISION HISTORY" MAY. 2001 Modify Application Note Correct Chip Size Reset format Modify bias resistor Mark COM16 corresponding Pin57 Page
titles Page changed from 8-digit 16-digit (because segments able
Sunplus Technology Co., Ltd.
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MAY. 2001 Version:
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