16COM/40SEG Controller/Driver APR. 2001 Version SUNPLUS TECH
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SPLC780B
16COM/40SEG Controller/Driver
APR. 2001 Version
SUNPLUS TECHNOLOGY infringement patent other rights third parties which result from use. addition, SUNPLUS products authorized critical components life support devices/ systems aviation devices/systems, where malfunction failure product reasonably expected result significant injury user, without express written approval Sunplus.
SPLC780B
Table Contents
PAGE
GENERAL DESCRIPTION. FEATURES. BLOCK DIAGRAM SIGNAL DESCRIPTION. FUNCTIONAL DESCRIPTION 5.1. OSCILLATOR 5.2. CONTROL DISPLAY INSTRUCTIONS 5.3. INSTRUCTION TABLE. 5.4. 8-BIT OPERATION 8-DIGIT 1-LINE DISPLAY (USING INTERNAL RESET). 5.5. 4-BIT OPERATION 8-DIGIT 1-LINE DISPLAY (USING INTERNAL RESET). 5.6. 8-BIT OPERATION 8-DIGIT 2-LINE DISPLAY (USING INTERNAL RESET).11 5.7. RESET FUNCTION 5.8. DISPLAY DATA RAM) 5.9. TIMING GENERATION CIRCUIT. 5.10. DRIVER CIRCUIT 5.11. CHARACTER GENERATOR ROM) 5.12. CHARACTER GENERATOR RAM) 5.13. CURSOR BLINK CONTROL CIRCUIT. 5.14. INTERFACING MPU. 5.15. SUPPLY VOLTAGE DRIVE 5.16. REGISTER (INSTRUCTION REGISTER) (DATA REGISTER) 5.17. BUSY FLAG (BF) 5.18. ADDRESS COUNTER (AC). 5.19. PORT CONFIGURATION ELECTRICAL SPECIFICATIONS 6.1. ABSOLUTE MAXIMUM RATINGS 6.2. CHARACTERISTICS (VDD 4.5V, 25). 6.3. CHARACTERISTICS (VDD 4.5V, 25). 6.4. CHARACTERISTICS (VDD 5.5V, 25). 6.5. CHARACTERISTICS (VDD 5.5V, 25). 6.6. WRITE MODE TIMING DIAGRAM (WRITING DATA FROM SPLC780B) 6.7. READ MODE TIMING DIAGRAM (READING DATA FROM SPLC780B MPU) 6.8. INTERFACE MODE WITH SPLC100A1 TIMING DIAGRAM APPLICATION CIRCUITS. 7.1. R-OSCILLATOR 7.2. INTERFACE MPU. 7.3. SPLC780B APPLICATION CIRCUIT 7.4. APPLICATIONS
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CHARACTER GENERATOR 8.1. SPLC780B 8.2. SPLC780B 8.3. SPLC780B 8.4. SPLC780B 8.5. SPLC780B PACKAGE/PAD LOCATIONS 9.1. ASSIGNMENT 9.2. ORDERING INFORMATION 9.3. LOCATIONS 9.4. PACKAGE CONFIGURATION 9.5. PACKAGE INFORMATION DISCLAIMER. REVISION HISTORY
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16COM/40SEG CONTROLLER/DRIVER
GENERAL DESCRIPTION
SPLC780B, dot-matrix controller driver from SUNPLUS, unique design displaying alpha-numeric, Japanese-Kana characters symbols. SPLC780B provides types interfaces MPU: 4-bit 8-bit interfaces. than 4-bit. 8-character lines. transferring speed 8-bit twice faster cascading with SPLC100 SPLC063, single SPLC780B able display
FEATURES
Character generator ROM: 10880 bits Character font dots: characters Character font dots: characters Character generator RAM: bits Character font dots: characters Character font dots: characters 4-bit 8-bit interfaces Direct driver LCD: COMs SEGs Duty factor (selected program): duty: line dots 1/11 duty: line dots 1/16 duty: lines dots line Built-in power automatic reset circuit Built-in oscillator circuit (with external resistor) Support external clock operation Power Consumption Package form: bare chip available
display capability extended. CMOS technology ensures power saves most efficient performance keeps highest rank.
BLOCK DIAGRAM
CL1,CL2 40-bit Shift Register
OSC1 OSC2
Timing Generation Circuit Parallel Serial Data Conversion Circuit Busy Flag Character Generator Instruction Register Instruction Decorder Display Data Bytes 16-bit Shift Register Character Generator Cursor Blink Control Circuit
DB0-DB3 DB4-DB7 Power Supply Drive (V1-V5) Buffer Data Register
Latch Circuit
Segments Commons Driver
COM1COM16
SEG1SEG40
Address Counter
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SIGNAL DESCRIPTION
Mnemonic OSC1, OSC2 Type Power input Ground Both OSC1 OSC2 connected resistor internal oscillator circuit. external clock operation, clock input OSC1. Supply voltage driving. start signal reading writing data. signal selecting read write actions. Read, Write. signal selecting registers. Data Register (for read write) Instruction Register (for write), Busy flag Address Counter (for read). SEG1 SEG40 SEG1 SEG16 4-bit data High 4-bit data Clock latch serial data Clock shift serial data Switch signal convert waveform Sends character pattern data corresponding each common signal serially. Selection, Non-selection. Segment signals LCD. Common signals LCD. Description
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FUNCTIONAL DESCRIPTION
5.1. Oscillator
SPLC780B oscillator supports only internal oscillator operation, also external clock operation. I/D=1 I/D=0 shifts display left shifts display right
5.2. Control Display Instructions
Control display instructions described details follows:
5.2.4. Display ON/OFF control
5.2.1. Clear display
Code
Code
Display Display Cursor Cursor Blinks Blinks
character font character font
clears entire display sets Display Data Address Address Counter.
5.2.2. Return home
Code
line Cursor 11th line
care sets Display Data Address Address Counter display returns original position. displayed). change.
Code
5.2.5. Cursor display shift
Without changing data, moves cursor shifts display.
cursor blink goes
most-left side display line lines contents Display Data
5.2.3. Entry mode
During writing reading data, defines cursor moving direction shifts display.
Code
Blink display alternately
Increment, Decrement. display shift, display does shift.
Shift cursor left Shift cursor right Shift display left. Shift display right.
Description
Address Counter
Cursor follows display shift Cursor follows display shift
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5.2.6. Function
Display data read written after this setting.
Code
one-line display (aaaaaaa)2: (00)16 (4F)16.
care sets interface data length. Data transferred with 8-bit length (DB0 DB7). Data transferred with 4-bit length (DB4 DB7). requires times accomplish data transferring. sets number display line. One-line display. Two-line display. sets character font. dots character font. dots character font.
two-line display (aaaaaaa)2: (00)16 (27)16 first line, (aaaaaaa)2: (40)16 (67)16 second line.
5.2.9. Read busy flag address
Code
When indicates system busy will accept instruction until busy same time, content Address Counter (aaaaaaa)2 read.
Display Lines
Character Font dots dots dots
Duty Factor
5.2.10. Write data character generator display data
Code
cannot display lines with dots character font.
5.2.7. character generator address
Code
writes data (dddddddd)2 character generator display data RAM.
5.2.11. Read data from character generator display data
sets Character Generator Address (aaaaaa)2 Address Counter. Character Generator data read written after this setting. reads data (dddddddd)2 from character generator display data RAM.
Code
5.2.8. display data address
Code
read data correctly, following: address Character Generator Display Data shift cursor instruction. Read instruction.
sets Display Data Address (aaaaaaa)2 Address Counter.
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5.3. Instruction Table
Instruction Clear Display Return Home Instruction Code Description Write "20H" DDRAM DDRAM address "00H" from DDRAM address "00H" from return cursor original position shifted. changed. Entry Mode Display ON/OFF Control Cursor Display Shift Function Assign cursor moving direction enable shift entire display display(D), cursor(C), blinking cursor(B) on/off control bit. cursor moving display shift control bit, direction, without changing DDRAM data. interface data length (DL: 8-bit/4-bit), numbers display line 2-line/1-line) and, display font type (F:5x10 dots/5x8 dots) CGRAM Address DDRAM Address Read Busy Flag Address Counter Write Data Read Data from
Note: "-": don't care
Execution time (fosc=270KHz) 1.52ms 1.52ms
contents DDRAM 38µs 38µs 38µs
38µs
CGRAM address address counter.
38µs 38µs
DDRAM address counter
Whether during internal operation known reading read. contents address counter also
Write Read
data data
into from
internal internal
38µs 38µs
(DDRAM/CGRAM). (DDRAM/CGRAM).
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5.4. 8-Bit Operation 8-Digit 1-Line Display (Using Internal Reset)
Instruction Power (SPLC780B starts initializing) Function
Display Power reset. display.
Operation
8-bit operation select 1-line display line character font.
Display control
Display Cursor appear. Increase address one.
Entry mode
will shift cursor right when writing RAM/CG RAM. display shift.
Write data
Write cursor incremented shifted right. Write cursor incremented shifted right.
Write data
Write data
WELCOME_
Write cursor incremented shifted right. mode display shift when writing
Entry mode
WELCOME_
Write data
ELCOME
Write
"(space).
cursor incremented shifted right. Write cursor incremented shifted right.
Write data
LCOME
Write data
COMPAMY_
Write cursor incremented shifted right.
Cursor display shift
COMPAMY_
Only shift cursor's position left (Y).
Cursor display shift
COMPAMY_
Only shift cursor's position left
Write data
OMPANY_
Write display moves left.
Cursor display shift
COMPAMY_
Shift display cursor's position right.
Cursor display shift
OMPANY_
Shift display cursor's position right.
Write data
COMPAMY_
Write
(space).
cursor incremented shifted right.
Return home
WELCOME_
Both display cursor return original position (address
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5.5. 4-Bit Operation 8-Digit 1-Line Display (Using Internal Reset)
Power (SPLC780B starts initializing) Instruction Display Operation
Power reset. display.
Function
4-bit operation.
4-bit operation select 1-line display line character font.
Display Cursor appears.
Increase address one.
will shift cursor right when writing RAM. display shift.
Write cursor incremented shifted right.
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5.6. 8-Bit Operation 8-Digit 2-Line Display (Using Internal Reset)
Power (SPLC780B starts initializing) Function
Instruction
Display Power reset. display.
Operation
8-bit operation select 2-line display line character font.
Display Cursor appear.
Display control
Entry mode
Increase address one. will shift cursor right when writing RAM. display shift. Write cursor incremented shifted right.
Write data
Write data
WELCOME_
Write cursor incremented shifted right.
address
WELCOME
sets RAM's address. cursor moved beginning position line. Write cursor incremented shifted right.
Write data
WELCOME
Write data
WELCOME PART_
Write cursor incremented shifted right. When writing, sets mode display shift.
Entry mode
WELCOME PART_
Write data
ELCOME PARTY_
Write cursor incremented shifted right.
Return home
WELCOME PARTY
Both display cursor return original position (address
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5.7. Reset Function
power SPLC780B starts internal auto-reset circuit executes initial instructions. initial procedures shown follows:
8-Bit Interface
Power
time after 4.5V
time 40ms After 2.7V
cannot checked before this instruction Function Interface bits length
time
cannot checked before this instruction Function Interface bits length
time
cannot checked before this instruction Function Interface bits length
checked after following instructions Function Interface bits length Specify number display lines character font
number display lines character font cannot changed afterwards Display Display clear
Initialization Ends
Entry mode
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4-Bit Interface Power
time after 4.5V
time 40ms After 2.7V
cannot checked before this instruction Function Interface bits length
time
cannot checked before this instruction Function Interface bits length
time
cannot checked before this instruction Function Interface bits length
checked after following instructions Function interface bits length) Interface bits length Function Interface bits length Specify number display lines character font number display lines character font cannot changed afterwards Display Display clear
Initialization Ends
Entry mode
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5.8. Display Data RAM)
80-bit normally used storing display data. Those used display data used general data RAM. address configured Address Counter. relationships between Display Data Address LCDs position depicted follows.
1-line display display characters
Display position Display data address
Example 1-line display display characters
Display position Display data address
When display shift operation performed display data RAM's address moves Left shift Right shift
5.9. Timing Generation Circuit
timing generating circuit able generate timing signals internal circuits. order prevent internal timing interface, access timing access timing generated independently.
5.11. Character Generator ROM)
Using 8-bit character code, character generator generates dots dots character patterns. dots character patterns. also generate 192's dots character patterns 64's
5.10. Driver Circuit
Total commons segments signal drivers valid driver circuit. When program specifies character fonts line numbers, corresponding common signals output drive-waveforms others still output unselected waveforms.
5.12. Character Generator RAM)
Users easily change character patterns character generator through program. written dots, 8-character patterns dots 4-character patterns.
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following diagram shows SPLC780B character patterns: Correspondence between Character Codes Character Patterns
Higher 4-bit Character Code (Hexadecimal)
Lower 4-bit Character Code (Hexadecimal)
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relationships between Character Generator Addresses, Character Generator Data (character patterns), Character Codes depicted follows:
5.12.1. character patterns
Character Code Data
Address
Character Patterns Data Character Pattern Example Cursor Position Character Pattern Example
Note1: Note2:
means that bit0-2 character code correspond bit3-5 address.
These areas used display, used general data RAM.
Note3: When bit4-7 character code character patterns selected. Note4: "1": Selected, "0": selected, "X": care Note5: example (1), character code display "T". display character. Note6: bits character code character pattern line position. cursor. line cursor position display formed logical with That means character code (00)16, (08)16
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5.12.2. character patterns
Character Code Data Address Character Patterns Data Cursor Position Character Pattern Example
Note1: Note2:
means that bit1-2 character code correspond bit4-5 address.
These areas used display, used general data RAM.
Note3: When bit4-7 character code character patterns selected. Note4: "1": Selected, "0": selected, "X": care Note5: example (1), character code b7-b4 display (08)16, (09)16 display character. Note6: bits character code character pattern line position. cursor. 11th line cursor position display formed logical with That means character codes (00)16, (01)16,
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5.13. Cursor Blink Control Circuit
This circuit generates cursor blink cursor blink control circuit. Address defined Address Counter. When Address Counter (07) cursor position shown belows: cursor blink appears digit Display Data
1-line display
digit Display position Display data address Hexadecimal cursor position
2-line display
digit line line Display position Display data address Hexadecimal
cursor position
5.14. Interfacing
There types data operations: 4-bit 8-bit operations. Using 4-bit MPU, interfacing 4-bit data transferred 4-busline (DB4 DB7). used. transferring. Thus, lines Using 4-bit interface 8-bit data requires times First, higher 4-bit data transferred Secondly, lower
5.15. Supply Voltage Drive
Different voltages supplied SPLC780Bs pins obtaining drive-waveform. relationships between bias, duty factor supply voltages shown belows:
Duty Factor Supply Voltage
1/8, 1/11 VLCD VLCD VLCD VLCD VLCD
1/16 VLCD VLCD VLCD VLCD VLCD
4-busline (for 8-bit operation, DB4). DB0).
4-bit data transferred 4-busline (for 8-bit operation, 8-bit MPU, 8-bit data transferred 8-buslines (DB0 DB7).
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power connections (1/4 Bias, Bias) shown belows:
VLCD VLCD
Bias (1/8,1/11 Duty)
Bias (1/16 Duty)
bypass-capacitor improves display quality.
VDD(
VDD(
Bias (1/8,1/11 Duty) Bias
(1/16 Duty)
bias voltage must have following relations:
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relationship between frames frequency oscillators frequency (Assume oscillation frequency 250.0KHz, clock cycle time 4.0µs)
Duty clocks
COM1 V2(V3) frame
frame (µs) 12800 (µs) 12.8 Frame frequency 78.1 (Hz) 12.8 (ms)
Duty clocks
COM1 V2(V3) frame frame (µs) 17600 (µs) 17.6 56.8 (Hz) Frame frequency 17.6 (ms)
Duty clocks
COM1 frame frame (µs) 12800 (µs) 12.8 Frame frequency 78.1 (Hz) 12.8 (ms)
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5.16. Register (Instruction Register) (Data Register)
SPLC780B contains 8-bit registers: Instruction Register (IR) Data Register (DR). Using combinations selects below:
Input port PMOS
5.19. Port Configuration
Operation
write (Display clear, etc.) Read busy flag (DB7) Address Counter (DB0 DB6) write Display data Character generator RAM) read (Display data Character generator
Input port PMOS PMOS
NMOS
written MPU, cannot read MPU.
5.17. Busy Flag (BF)
When busy flag output DB7. instruction until busy flag
NMOS
busy flag SPLC780B busy state does accept
5.18. Address Counter (AC)
Address Counter assigns addresses Display Data Character Generator RAM. When instruction address written address information sent from After writing to/reading from Display Data Character Generator RAM, automatically incremented decremented one). contents output NMOS PMOS Output port
when
Input Output port PMOS PMOS Enable
NMOS
Data
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ELECTRICAL SPECIFICATIONS
6.1. Absolute Maximum Ratings
Characteristics Symbol Ratings
Operating Voltage Driver Supply Voltage Input Voltage Range Operating Temperature Storage Temperature
conditions AC/DC Electrical Characteristics.
VLCD TSTO
-0.3V +7.0V 0.3V -0.3V 0.3V +125
normal operational
Note: Stresses beyond those given Absolute Maximum Rating table cause operational errors damage device.
6.2. Characteristics (VDD 4.5V,
Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition
Operating Current Input High Voltage Input Voltage Input High Voltage Input Voltage Input High Current Input Current Output High Voltage (TTL) Output Voltage (TTL) Output High Voltage (CMOS) Output Voltage (CMOS) Driver Resistance (COM) Driver Resistance (SEG) Voltage
VIH1 VIL1 VIH2 VIL2 VOH1 VOL1 VOH2 VOL2 RCOM RSEG VLCD
0.7VDD -0.3 0.7VDD -0.2 -1.0 -5.0 0.75VDD 0.8VDD
-15.0
0.55 0.2VDD -30.0 0.2VDD 0.2VDD 20.0 30.0 11.0
External clock (Note) Pins:(E, R/W, DB7)
OSC1 Pins: (RS, R/W, DB7) 3.0V 0.1mA Pins: 0.1mA Pins: 40.0µA, Pins: CL1, CL2, 40.0µA, Pins: CL1, CL2, ±50.0µA, VLCD 4.0V Pins: COM1 COM16 ±50.0µA, VLCD 4.0V Pins: SEG1 SEG40 VDD-V5, bias bias
Note: FOSC 250.0KHz, 3.0V, "L", R/W, open, outputs loads.
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6.3. Characteristics (VDD 4.5V, 6.3.1. Internal clock operation
Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition
Frequency
FOSC1
190.0
270.0
350.0
3.0V 75.0K±2%
6.3.2. External clock operation
Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition
External Frequency Duty Cycle Rise/Fall Time
FOSC2
125.0 45.0
250.0 50.0
350.0 55.0
6.3.3. Write Mode (Writing data from SPLC780B)
Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition
Cycle Time Pulse Width Rise/Fall Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time
tSP1 tHD1 tSP2 tHD2
1000.0 450.0 60.0 20.0 195.0 10.0
25.0
Pins: R/W, Pins: R/W, Pins: Pins:
6.3.4. Read Mode (Reading data from SPLC780B MPU)
Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition
Cycle Time Pulse Width Rise/Fall Time Address Setup Time Address Hold Time Data Output Delay Time Data hold time
tSP1 tHD1 tHD2
1000.0 450.0 60.0 20.0
25.0 360.0
Pins: R/W, Pins: R/W, Pins:
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6.4. Characteristics (VDD 5.5V,
Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition
Operating Current Input High Voltage Input Voltage Input High Voltage Input Voltage Input High Current Input Current Output High Voltage (TTL) Output Voltage (TTL) Output High Voltage (CMOS) Output Voltage (CMOS) Driver Resistance (COM) Driver Resistance (SEG) Voltage
VIH1 VIL1 VIH2 VIL2 VOH1 VOL1 VOH2 VOL2 RCOM RSEG VLCD
-0.3 VDD-1 -0.2 -2.0 -20.0 0.9VDD
0.55 -50.0
-100.0 0.1VDD 20.0 30.0 11.0
External clock (Note) Pins:(E, R/W, DB7)
OSC1 OSC1 Pins: (RS, R/W, DB7) 5.0V
0.1mA Pins: 0.1mA Pins: 40.0µA, Pins: CL1, CL2, 40.0µA, Pins: CL1, CL2, ±50.0µA, VLCD 4.0V Pins: COM1 COM16 ±50.0µA, VLCD 4.0V Pins: SEG1 SEG40 VDD-V5, bias bias
Note: FOSC 250.0KHz, 5.0V, "L", R/W, open, outputs loads.
6.5. Characteristics (VDD 5.5V, 6.5.1. Internal clock operation
Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition
Frequency
FOSC1
190.0
270.0
350.0
5.0V 91.0K±2%
6.5.2. External clock operation
Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition
External Frequency Duty Cycle Rise/Fall Time
FOSC2
125.0 45.0
250.0 50.0
350.0 55.0
trr,
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6.5.3. Write mode (Writing data from SPLC780B)
Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition
Cycle Time Pulse Width Rise/Fall Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time
tSP1 tHD1 tSP2 tHD2
400.0 150.0 30.0 10.0 40.0 10.0
25.0
Pins: R/W, Pins: R/W, Pins: Pins:
6.5.4. Read mode (Reading data from SPLC780B MPU)
Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition
Cycle Time Pulse Width Rise/Fall Time Address Setup Time Address Hold Time Data Output Delay Time Data hold time
tSP1 tHD1 tHD2
400.0 150.0 30.0 10.0 20.0
25.0 100.0
Pins: R/W,E Pins: R/W,E Pins:
6.5.5. Interface mode with driver (SPLC100A1)
Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition
Clock pulse width high Clock pulse width Clock setup time Data setup time Data hold time delay time
tPWH tPWL tCSP tDSP
800.0 800.0 500.0 300.0 300.0 -1000.0
1000.0
Pins: CL1, Pins: CL1, Pins: CL1, Pins: Pins: Pins:
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6.6. Write Mode Timing Diagram (Writing Data from SPLC780B)
tSP1 tSP2
tHD1 tHD1 tHD2
Valid Data
6.7. Read Mode Timing Diagram (Reading Data from SPLC780B MPU)
tSP1
tHD1 tHD1 tHD2 Valid Data
6.8. Interface Mode with SPLC100A1 Timing Diagram
0.9VDD 0.9VDD
tPWH tCSP
tPWH
0.9VDD 0.1VDD 0.1VDD
tCSP
0.9VDD 0.1VDD
tPWL
0.9VDD 0.1VDD
tDSP
0.1VDD
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APPLICATION CIRCUITS
7.1. R-Oscillator
oscillation resistor used only internal oscillaotr operation mode.
OSC1 OSC2
when 3.0V) when 5.0V)
Since oscillation frequency varies depending OSC2 capacitance, wiring length these pins should minimized.
Fosc
Fosc
Rosc Kohms
Rosc Kohms
3.0V
5.0V
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7.2. Interface
Interface 8-bit 6805
6805
COM1 COM16 SPLC780B
PANEL COMMONS
SEG1 SEG40 SEGMENTS
Interface 8-bit IORQ SEG1 SEG40
COM1 COM16 SPLC780B
PANEL COMMONS SEGMENTS
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7.3. SPLC780B Application Circuit
MATRIX PANEL
COM16 (COM8) COM1
SEG40 SEG1
Y1-Y40 SHL1 SHL2
SPLC100A1
SHL1 SHL2
SPLC100A1
SPLC100A1
Y1-Y40
Y1-Y40 SHL1 SHL2 V1V2 V4V5
V1V2V3 V4V5V6 SPLC780B
V1V2 V4V5
Suggested values 0.1µF 0.47µF)
7.4. Applications
SPLC780B COM1 Panel COM8 SEG1 characters line
SEG40 Example dots characters line Bias Duty
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SPLC780B COM1 Panel characters line COM11 SEG1
SEG40 Example dots characters line Bias Duty
SPLC780B COM1 Panel COM8 COM9 COM16 SEG1 characters lines
SEG40 Example dots characters lines Bias Duty
SPLC780B COM1 COM8 SEG1 SEG40 COM9 COM16 Example dots characters line Bias Duty
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SPLC780B
SEG1 SEG20 COM1 Panel COM8 characters lines
SEG21 SEG40 Example dots characters lines Bias Duty
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CHARACTER GENERATOR
8.1. SPLC780B
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8.2. SPLC780B
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8.3. SPLC780B
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8.4. SPLC780B
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8.5. SPLC780B
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PACKAGE/PAD LOCATIONS
9.1. Assignment
Chip Size: 3840µm 3250µm Size: 100µm 100µm This substrate should connected
Note1: Chip size included scribe line. Note2: ensure that functions properly, please bond pins. Note3: 0.1µF capacitor between should placed close possible.
9.2. Ordering Information
Product Number Package Type
SPLC780B-nnnnV-C SPLC780B-nnnnV-P
Note1: Code number (nnnnV) assigned customer. Note2: Code number (nnnn 0000 9999); version
Chip form Package form
Sunplus Technology Co., Ltd. Proprietary Confidential
APR. 2001 Version:
SPLC780B
9.3. Locations
Name Name
OSC1 OSC2 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 SEG40
-1711 -1711 -1711 -1711 -1711 -1711 -1711 -1711 -1711 -1711 -1711 -1711 -1711 -1711 -1711 -1711 -1711 -1722 -1574 -1428 -1281 -1135 -987 -836 -690 -542 -396 -162 1012 1159 1305 1453 1719
1264 1090 -153 -300 -447 -594 -740 -888 -1034 -1180 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1417 -1426
SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1
1719 1719 1719 1719 1719 1719 1719 1719 1719 1719 1719 1719 1719 1719 1719 1719 1719 1696 1550 1404 1256 1110 -211 -357 -504 -651 -798 -944 -1092 -1238 -1384 -1711
-1279 -1132 -986 -838 -692 -546 -398 -252 -105 1069 1417 1417 1417 1417 1417 1417 1417 1417 1417 1417 1417 1417 1417 1417 1417 1417 1417 1417 1417 1417 1417 1417 1437
Sunplus Technology Co., Ltd. Proprietary Confidential
APR. 2001 Version:
SPLC780B
9.4. Package Configuration
View
SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38
SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG09 SEG08 SEG07 SEG06 SEG05 SEG04 SEG03 SEG02 SEG01 OSC1
SEG39 SEG40
COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1
SPLC780B-XX
OSC2
Sunplus Technology Co., Ltd. Proprietary Confidential
APR. 2001 Version:
SPLC780B
9.5. Package Information
Sunplus Technology Co., Ltd. Proprietary Confidential
APR. 2001 Version:
SPLC780B
DISCLAIMER
information appearing this publication believed accurate. Integrated circuits sold Sunplus Technology covered warranty patent indemnification provisions stipulated terms sale only. SUNPLUS makes warranty, express, statutory implied description regarding information this publication FURTHER, SUNPLUS MAKES WARRANTY SUNPLUS reserves right halt production alter specifications regarding freedom described chip(s) from patent infringement. MERCHANTABILITY FITNESS PURPOSE. prices time without notice. publication current before placing orders.
Accordingly, reader cautioned verify that data sheets other information this Products described herein intended normal commercial applications.
Applications involving unusual environmental reliability requirements, e.g. military equipment medical life support equipment, specifically recommended without additional processing SUNPLUS such applications. Please note that application circuits illustrated this document reference purposes only.
Sunplus Technology Co., Ltd. Proprietary Confidential
APR. 2001 Version:
SPLC780B
REVISION HISTORY
Date Revision Description Page
NOV. 1999 JUN. 2000
Original "Instruction Table" Modify "Electrical specifications"
OCT. 2000 APR. 2001
Delete "Preliminary" Correct Chip Size Size Note1 Note3 "9.1 Assignment" Package Informat "9.2 Ordering Information" Renew document format
Sunplus Technology Co., Ltd. Proprietary Confidential
APR. 2001 Version:
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