700MHZ, JITTER LVPECL FREQUENCY SYNTHESIZER FEATURES Fully i

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700MHZ, JITTER LVPECL FREQUENCY SYNTHESIZER FEATURES Fully i

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ICS8430-11
700MHZ, JITTER LVPECL FREQUENCY SYNTHESIZER
FEATURES
Fully integrated 14MHz 25MHz crystal reference frequency Dual differential 3.3V LVPECL output 15.63MHz 700MHz output frequency 2.6ps output jitter Parallel interface programming counter output dividers Serial wire interface Selectable crystal oscillator interface LVCMOS reference input LVCMOS control inputs 3.3V supply voltage lead low-profile QFP(LQFP), 1.4mm package body, 0.8mm package lead pitch 70°C ambient operating temperature
GENERAL DESCRIPTION
ICS8430-11 general purpose, dual output high frequency synthesizer member HiPerClockSHiPerClockSfamily High Performance Clock Solutions from ICS. operates frequency range 250MHz 700MHz. With output configured divide frequency output frequency steps small 1MHz achieved using 16MHz crystal reference clock. Output frequencies 700MHz programmed using serial parallel interfaces configuration logic. jitter frequency range ICS8430-11 make ideal clock generator most clock tree applications.
BLOCK DIAGRAM
VCO_SEL XTAL_SEL REF_CLK XTAL1 XTAL2
ASSIGNMENT
VCO_SEL nP_LOAD XTAL2
TEST FOUT1 nFOUT1 VCCO FOUT0 nFOUT0
XTAL1 REF_CLK XTAL_SEL VCCA S_LOAD S_DATA S_CLOCK
ICS8430-11
PHASE DETECTOR S_LOAD S_DATA S_CLOCK nP_LOAD M0:M8 N0:N2 CONFIGURATION INTERFACE LOGIC
FOUT0 nFOUT0 FOUT1 nFOUT1
TEST
32-Lead LQFP Package View
Preliminary Information presented herein represents product prototyping pre-production. noted characteristics based initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves right change circuitry specifications without notice.
ICS8430BY-11
REV. JUNE 2001
ICS8430-11
700MHZ, JITTER LVPECL FREQUENCY SYNTHESIZER
FUNCTIONAL DESCRIPTION
ICS8430-11 features fully integrated therefore requires external components setting loop bandwidth. series-resonant, fundamental crystal used input on-chip oscillator. output oscillator divided prior phase detector. With 16MHz crystal, this provides 1MHz reference frequency. operates over range 700MHz. output loop divider also applied phase detector. phase detector loop filter force output frequency times reference frequency adjusting control voltage. Note that some values (either high low) will achieve lock. output scaled divider prior being sent each LVPECL output buffers. divider provides output duty cycle. programmable features ICS8430-11 support input modes programmable loop divider output divider. input operational modes parallel serial. Figure shows timing diagram each mode. parallel mode nP_LOAD input initially LOW. data inputs through through passed directly ripple counter. LOW-to-HIGH transition nP_LOAD input, data latched ripple counter remains loaded until next transition nP_LOAD until serial event occurs. result, bits hardwired ripple counter specific default state that will automatically occur during power-up. TEST output when operating parallel input mode. relationship between frequency, crystal frequency loop divider defined follows: fxtal fVCO count required values through shown Table Programmable Frequency Function Table. frequency defined follows: fout fVCO fxtal Note that factor preceding equations result additional that placed feedback prior Serial operation occurs when nP_LOAD S_LOAD HIGH shift register loaded sampling S_DATA bits with rising edge S_CLOCK. contents shift register passed ripple counter when S_LOAD transitions from HIGH-to-LOW. serial mode used program bits test bits internal registers determine state TEST output follows: TEST Output S_Data clocked into register Output divider CMOS Fout
S_DATA S_CLOCK S_LOAD M0:M8, N0:N2 nP_LOAD
FIGURE PARALLEL SERIAL LOAD OPERATIONS
ICS8430BY-11
REV. JUNE 2001
ICS8430-11
700MHZ, JITTER LVPECL FREQUENCY SYNTHESIZER
Type Input Input Input Input Power Output Power Output Power Output Input Input Input Input Power Input Input Input Input Input Pullup Pulldown Pulldown Pulldown Pulldown Pulldown Description
TABLE DESCRIPTIONS
Number Name TEST FOUT1, nFOUT1 VCCO FOUT0, nFOUT0 S_CLOCK S_DATA S_LOAD VCCA XTAL_SEL REF_CLK XTAL1, XTAL2 nP_LOAD VCO_SEL
Pulldown counter/divider inputs. Data latched LOW-to-HIGH transistion nP_LOAD input. LVCMOS LVTTL interface levels. Pullup Pulldown Determines output divider value defined Table Function Table. LVCMOS LVTTL interface levels. Pullup Power supply ground pin. Connect ground. Test output which ACTIVE serial mode operation. Output driven parallel mode. LVCMOS interface levels. Core power supply pin. Differential output synthesizer. 3.3V LVPECL interface levels. Output power supply connection. Connect 3.3V. Differential output synthesizer. 3.3V LVPECL interface levels. Resets reference frequency output dividers. LVCMOS LVTTL interface levels. Clocks serial data present S_DATA input into shift register rising edge S_CLK. Shift register serial input. Data sampled rising edge S_CLK. Controls transition data from shift register into ripple counter. LVCMOS LVTTL interface levels. Analog power supply pin. Connect 3.3V. Selects between ystal reference inputs reference source. LVCMOS LVTTL interface levels. Selects XTAL inputs when HIGH. Selects REF_IN when LOW. Reference clock input. LVCMOS LVTTL interface levels. ystal oscillator inputs. Parallel load input. Determines when data present M8:M0 loaded into ripple counter, when data present N2:N0 sets output divide value. LVCMOS LVTTL interface levels. Determines whether synthesizer bypass mode. LVCMOS LVTTL interface levels.
Pulldown Pullup
ICS8430BY-11
REV. JUNE 2001
ICS8430-11
700MHZ, JITTER LVPECL FREQUENCY SYNTHESIZER
Test Conditions Minimum Typical Maximum Units
TABLE CHARACTERISTICS
Symbol Parameter REF_CLK, XTAL1, XTAL2 Input VCO_SEL, S_LOAD, Capacitance S_DATA, S_CLOCK, XTAL_SEL, M0:M8, N0:N2 Input Pullup Resistor Input Pulldown Resistor
RPULLUP RPULLDOWN
TABLE CRYSTAL CHARACTERISTICS
Parameter ystal Mode Oscillation Frequency Frequency Tolerance Frequency Stability Drive Level Equivalent Series Resistance (ESR) Shunt Capacitiance Load Capaacitance Series Inductance Operating Temperature Range Aging Test Conditions Minimum Typical Maximum Units
Fundamental
ICS8430BY-11
REV. JUNE 2001
ICS8430-11
700MHZ, JITTER LVPECL FREQUENCY SYNTHESIZER
INPUTS
TABLE PARALLEL
nP_LOAD
SERIAL MODES FUNCTION TABLE
Data Data S_LOAD S_CLOCK S_DATA Data Data Data Conditions Reset. counters reset. Data inputs passed directly ripple counter. TEST output forced LOW. Data latched into input registers remains loaded until next transition until serial event occurs. Serial input mode. Shift register loaded with data S_DATA each rising edge S_CLOCK. Contents shift register passed ripple counter. Parallel serial input affect shift registers.
Data Data
TABLE PROGRAMMABLE FREQUENCY FUNCTION TABLE (NOTE
Frequency (MHz) Count
NOTE Assumes 16MHz input frequency.
TABLE PROGRAMMABLE OUTPUT DIVIDER FUNCTION TABLE
Input Divider Value Output Frequency (MHz) 62.5 31.25 15.625 62.5 31.25 87.5 43.75 87.5
ICS8430BY-11
REV. JUNE 2001
ICS8430-11
700MHZ, JITTER LVPECL FREQUENCY SYNTHESIZER
4.6V -0.5V 0.5V -0.5V Vcco 0.5V 46°C/W -65°C 150°C
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCCX Inputs, Outputs, Package Thermal Impedance, Storage Temperature, TSTG
Stresses beyond those listed under Absolute Maximum Ratings cause permanent damage device. These ratings stress specifications only. Functional operation product these conditions conditions beyond those listed Characteristics Characteristics implied. Exposure absolute maximum rating conditions extended periods affect product reliability.
TABLE POWER SUPPLY CHARACTERISTICS, VCCA VCCO 3.3V±5%,
Symbol VCCA VCCO Parameter Power Supply Analog Voltage Ouput Voltage Power Supply Current VCCx 3.465V Test Conditions Minimum 3.135 3.135 3.135 Typical
70°C
Units
Maximum 3.465 3.465 3.465
TABLE LVCMOS CHARACTERISTICS, VCCA VCCO 3.3V±5%,
Symbol Input High Voltage Parameter REF_CLK VCO_SEL, S_LOAD, S_DATA, S_CLOCK, nP_LOAD, M0:M8, N0:N2, XTAL_SEL REF_CLK Input Voltage VCO_SEL, S_LOAD, S_DATA, S_CLOCK, nP_LOAD, M0:M8, N0:N2, XTAL_SEL M0-M7, S_CLOCK, S_DATA, S_LOAD, REF_CLK, nP_LOAD XTAL_SEL, VCO_SEL M0-M7, S_CLOCK, S_DATA, S_LOAD, REF_CLK, nP_LOAD XTAL_SEL, VCO_SEL Output High Voltage Output Voltage TEST TEST Test Conditions 3.135 VCCx 3.465V VCCx 3.465V VCCx 3.135V 3.135 VCCx 3.465V VCCx 3.465V VCCx 3.135V VCCx 3.465V VCCx 3.465V VCCx 3.465V, VCCx 3.465V, VCCx 3.135 VCCx 3.135 -150
70°C
Typical Maximum 3.765 Units
Minimum -0.3 -0.3 -0.3
Input High Current
Input Current
ICS8430BY-11
REV. JUNE 2001
ICS8430-11
700MHZ, JITTER LVPECL FREQUENCY SYNTHESIZER
TABLE LVPECL CHARACTERISTICS, VCCA VCCO 3.3V±5%,
Symbol VSWING Parameter Output High Voltage; NOTE Output Voltage; NOTE Peak-to-Peak Output Voltage Swing Test Conditions VCCx 3.3V VCCx 3.3V 3.135 VCCx 3.465V Minimum
70°C
Maximum 0.85 Units
Typical
NOTE Outputs terminated with power dissipation terminated output pair 32mW.
TABLE INPUT FREQUENCY CHARACTERISTICS, VCCA VCCO 3.3V±5%,
Symbol Parameter Maximum Input Frequency REF_CLK; NOTE1 XTAL1, XTAL2; NOTE1 S_CLOCK REF_CLK Measured points Test Conditions Minimum
70°C
Maximum Units
Typical
fMAXIN
Input Rise Time
Input Fall Time REF_CLK Measured point Input Reference REF_CLK Duty Cycle NOTE1: input ystal reference frequency range value must operate within 250MHz 700MHz range. Using minimum input frequency 14MHz, valid values 400. Using maximum frequency 25MHz, valid values 224.
TABLE CHARACTERISTICS, VCCA VCCO 3.3V±5%,
Symbol FMAX tjit(cc) tsk(o) Parameter Maximum Output Frequency Peak Cycle-to-Cycle Jitter Output Skew Output Duty Cycle Output Rise Time Output Fall Time FOUT0, nFOUT0 FOUT1, nFOUT1 FOUT0, nFOUT0 FOUT1, nFOUT1 nP_LOAD Setup Time S_DATA S_CLOCK S_CLOCK S_LOAD nP_LOAD Hold Time S_DATA S_CLOCK S_CLOCK S_LOAD tLOCK oscTOL
ICS8430BY-11
70°C
Minimum Typical Maximum Units 1000
Test Conditions 3.135 VCCx 3.465V
Lock Time Pulse Width nP_LOAD S_LOAD
ystal Oscillator Tolerance
REV. JUNE 2001
ICS8430-11
700MHZ, JITTER LVPECL FREQUENCY SYNTHESIZER
PACKAGE OUTLINE SUFFIX
-CSEATING PLANE
TABLE PACKAGE DIMENSIONS
JEDEC VARIATION DIMENSIONS MILLIMETERS SYMBOL
Reference Document: JEDEC Publication MS-026
ICS8430BY-11
MINIMUM
NOMINAL
MAXIMUM
1.60 0.05 1.35 0.30 0.09 9.00 BASIC 7.00 BASIC 5.60 9.00 BASIC 7.00 BASIC 5.60 0.80 BASIC 0.45 0.60 0.75 0.10 1.40 0.37 0.15 1.45 0.45 0.20
REV. JUNE 2001
ICS8430-11
700MHZ, JITTER LVPECL FREQUENCY SYNTHESIZER
Marking ICS8430BY-11 ICS8430BY-11 Package Lead LQFP Lead LQFP Tape Reel Count tray 1000 Temperature 70°C 70°C
TABLE ORDERING INFORMATION
Part/Order Number ICS8430BY-11 ICS8430BY-11T
ICS8430BY-11
REV. JUNE 2001

700MHZ, JITTER LVPECL FREQUENCY SYNTHESIZER FEATURES Fully i

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