S1C33 Family Data Sheets S1C33 Family S1C33000 Core S1C33209 S1C3
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PF1084-05
S1C33 Family Data Sheets
S1C33 Family S1C33000 Core S1C33209 S1C33T01 S1C33L01 S1C33S01 S1C33221/222 S1C33240 S1C33210 S1C33205/225/226/245 S1C33L03 S1C33 Family Development Environment S1C33 Family Middleware Firmware List Hardware Resources used Middleware S1C33 Family Technology PCM15 S1C33 Family S5U1C330R1S Middleware S1C33 Family S5U1C330M2S Middleware S1C33 Family S5U1C330V1S Middleware S1C33 Family S5U1C330M1S Middleware S1C33 Family S5U1C330S1S Middleware S1C33 Family S5U1C330T1S Middleware S1C33 Family S5U1C330V2S Middleware S1C33 Family S5U1C330J1S Middleware S1C33 Family S5U1C330C1S Middleware S1C33 Family S5U1C330G1S Middleware S1C33 Family S5U1C330P1S Middleware S1C33 Family S5U1C330H1S Middleware S1C33 Family S5U1C330S2S Middleware S1C33 Family S5U1C330U1S Middleware S1C33 Family S5U1C330G3S Middleware S1C33 Family Demonstration Evaluation Board S1C33 Family Tool Selection Guide
information product number change
Starting April 2001, product number been changed listed below. Please product number when place order. further information, please contact Epson sales representative.
Configuration product number
Devices 33209 00E1
Packing specification Specification Package form; QFP) Model number Model name microcomputer, digital products) Product classification (S1: semiconductor)
Development tools 33000 S5U1
Packing specification Version Version Tool type Corresponding model number Tool classification microcomputer use) Product classification (S5U1: development tool semiconductor products)
details about tool types, tables below. some manuals, tool types represented digit.) Actual versions written manuals.
Comparison table between Comparison table between previous previous number number development tools
S1C33 Family processors
Previous E0C33A104 E0C33202 E0C33204 E0C33208 E0C33209 E0C332T01 E0C332L01 E0C332L02 E0C332S08 E0C332129 E0C33264 E0C332F128 S1C33104 S1C33202 S1C33204 S1C33208 S1C33209 S1C33T01 S1C33L01 S1C33L02 S1C33S01 S1C33221 S1C33222 S1C33240
Development tools S1C33 Family
Previous ICE33 EM33-4M PRC33001 POD33001 ICD33 DMT33004 DMT33004PD DMT33005 DMT33005PD DMT33006LV DMT33006PDLV DMT33007 DMT33007PD DMT33008LV DMT33008PDLV DMT332S08LV DMT332S08PDLV DMT33209LV DMT33209PDLV DMT332F128LV DMT33MON DMT33MONLV DMT33AMP DMT33AMP2 DMT33AMP3 DMT33AMP4 DMT33CF S5U1C33104H S5U1C33104E S5U1C33104P1 S5U1C33104P2 S5U1C33000H S5U1C33104D1 S5U1C33104D2 S5U1C33208D1 S5U1C33208D2 S5U1C33L01D1 S5U1C33L01D2 S5U1C33208D3 S5U1C33208D4 S5U1C33T01D1 S5U1C33T01D2 S5U1C33S01D1 S5U1C33S01D2 S5U1C33209D1 S5U1C33209D2 S5U1C33240D1 S5U1C330M1D1 S5U1C330M2D1 S5U1C330A1D1 S5U1C330A2D1 S5U1C330A3D1 S5U1C330A4D1 S5U1C330C1D1 Previous DMT33LIF DMT33SMT DMT33LCD26 DMT33LCD37 EPOD33001 EPOD33001LV EPOD33208 EPOD33208LV EPOD332L01LV EPOD332T01 EPOD332T01LV EPOD33209 EPOD33209LV EPOD332128 EPOD332128LV EPOD332S08LV MEM33201 MEM33201LV MEM33202 MEM33202LV MEM33203 MEM33203LV MEM33DIP42 MEM33TSOP48 EPOD176CABLE EPOD100CABLE EPOD33SRAM5V EPOD33SRAM3V S5U1C330L1D1 S5U1C330S1D1 S5U1C330L2D1 S5U1C330L3D1 S5U1C33208E1 S5U1C33208E2 S5U1C33208E3 S5U1C33208E4 S5U1C33L01E1 S5U1C33T01E1 S5U1C33T01E2 S5U1C33209E1 S5U1C33209E2 S5U1C33220E1 S5U1C33220E2 S5U1C33S01E1 S5U1C33001M1 S5U1C33001M2 S5U1C33002M1 S5U1C33002M2 S5U1C33003M1 S5U1C33003M2 S5U1C330D1M1 S5U1C330T1M1 S5U1C33T00E31 S5U1C33S00E31 S5U1C33000S S5U1C33001S
Previous CC33 CF33 COSIM33 GRAPHIC33 HMM33 JPEG33 MON33 MELODY33 PEN33 ROS33 SOUND33 SMT33 TS33 USB33 VOX33 VRE33
S5U1C33000C S5U1C330C1S S5U1C330C2S S5U1C330G1S S5U1C330H1S S5U1C330J1S S5U1C330M2S S5U1C330M1S S5U1C330P1S S5U1C330R1S S5U1C330S1S S5U1C330S2S S5U1C330T1S S5U1C330U1S S5U1C330V1S S5U1C330V2S
DMT33CPLD400KLV S5U1C330C2D1
PF1130-03
S1C33 Family
32-bit Single Chip Microcomputer
DESCRIPTION
S1C33 Family microcomputer consists Seiko Epson original CMOS 32-bit RISC core, ROM, RAM, DMA, timers, SIO, PLL, other circuits. Featuring high-speed operation, power consumption, reduced code size, multiplication/accumulation function, this product used wide range applications, from equipment portable equipment. This product also available ASIC custom microcomputer.
S1C33000 CORE DESCRIPTION
60MHz (differs depending S1C33xxx model) 16-bit fixed code size, types instructions Immediate addressing mode extension with instruction Multiplication/accumulation function operation bits bits bits bits) executed cycles Register Sixteen 32-bit general-purpose registers, Five 32-bit special registers Memory space 28-bit (256MB) space Operating frequency Instruction
S1C33 FAMILY GENERAL-PURPOSE MICROCOMPUTER LIST
Voltage(V) Core S1C33209 QFP5-128 QFP15-128 ~3.6 ~5.5 S1C33L01 QFP18-176 1.8~5.5 ~3.6 (I/O, Bus) 3.0~5.5 (LCD I/F) S1C33T01 QFP18-176 1.8~5.5 ~3.6 (I/O, Bus) S1C33221 QFP5-128 ~3.6 ~5.5 S1C33222 Model S1C33S01 QFP15-100 S1C33240 QFP5-128 ~3.6 ~3.6 ~3.6 ~3.6 Same core ~5.5 Same core ~5.5 Main clock max. frequency clock (KB) 60MHz(3.3V) 32.768kHz 20MHz(2.0V) 50MHz(3.3V) 32.768kHz 20MHz(2.0V) (KB) 8/4/2 DMA(ch) Timer(ch) I/O(bit) (ch) 16bit 8bit (ch) (ch) Others
(VRAM)
Built-in LCDC equivalent S1D13705
60MHz(3.3V) 20MHz(2.0V) 50MHz(3.3V) 20MHz(2.0V)
32.768kHz 32.768kHz
selectable
S1C33210
QFP15-128
50MHz(3.3V) 20MHz(2.0V) 40MHz(3.3V) 20MHz(Flash access: wait) 50MHz
32.768kHz 32.768kHz
(Flash)
32.768kHz
S1C33205 QFP15-128 S1C33225 S1C33226 S1C33245
60MHz(3.3V) 20MHz(2.0V) 50MHz(3.3V) 20MHz(2.0V)
32.768kHz
I/F: I/F: HDLC:
40MHz(3.3V) (Flash) 20MHz(Flash access: wait) S1C33L03 QFP20-144 50MHz(3.3V) 32.768kHz ~3.6 ~5.5 20MHz(2.0V) LCDC: 25MHz(3.3V) Under development (This model under development, therefore contents above specifications revised final.)
~3.6
~5.5
Available None
S1C33 Family
S1C33 FAMILY CUSTOM MICROCOMPUTER
Available custom microcomputer incorporating S1C33 macros based S1X50000 series Epson embedded arrays.
peripheral macro (required)
macro
SRAM core macro (required)
User logic
Macro S1X50000
Flash
10-bit
S1C33 FAMILY DEVELOPMENT ENVIRONMENT LIST
Software Tools
Tool S5U1C33000C S5U1C330M2S S5U1C330M1D1 (5V) S5U1C330M2D1 (3.3V) Description compiler package (running under Windows 95/98 NT4.0) Includes compiler debugger utilities. evaluation version also available. Debug monitor Enables creation inexpensive debug environment using user resources (ROM 10KB, 2.5KB, 1ch.) connect debugger.
Basic Hardware Tool
Tool S5U1C33000H Description In-circuit debugger S1C33 chip with on-chip This reduced-pin connecting-type requiring only pins connection.
S1C33 Family
Hardware Expansion Tools
Tool S5U1C33209E1 (5V) S5U1C33209E2 (3.3V) S5U1C33L01E1 (3.3V) S5U1C33T01E1 (5V) S5U1C33T01E2 (3.3V) S5U1C33221E1 (5V) S5U1C33221E2 (3.3V) S5U1C33240E1 (5V) S5U1C33240E2 (3.3V) S5U1C33S01E1 (3.3V) S5U1C330D1M1 (5-3.3V) Description Emulation S1C33209 (with emulation memory board I/F) Note) With capacity emulate 256KB internal ROM. (maximum 50MHz, wait state) Emulation S1C33L01 (with emulation memory board I/F) Note) Supports development using internal emulation function. (maximum 50MHz, wait state) Emulation S1C33T01 (with emulation memory board I/F) Note) With capacity emulate 256KB internal ROM. (maximum 50MHz, wait state) Emulation S1C33221 (with emulation memory board I/F) Note) With capacity emulate 256KB internal ROM. (maximum 50MHz, wait state) Emulation S1C33240 (with emulation memory board I/F) Emulation S1C33S01 (with emulation memory board I/F) Note) With capacity emulate 256KB internal ROM. (maximum 50MHz, wait state) emulation board socket target board S5U1C33001Mx/S5U1C33002Mx connected emulate ROM. supports type 16M-bit ROMs 42-pin DIPs. Flash emulation board S5U1C33001Mx/S5U1C33002Mx connected 48-pin TSOP flash memory board pattern target board emulate flash memory. supports type 16M, 32Mbit flash memory 48-pin TSOPs. block emulation memory board (accessible with wait state 33MHz) When boards cascaded, blocks emulated. Powerful break functions break, breaks area breaks also added S5U1C33000H (with S5U1C33xxxEx connected). emulation memory board (accessible with wait state, 33MHz) When boards cascaded, blocks emulated. block emulation memory board (accessible with wait state 33MHz) When boards cascaded, blocks emulated. This board flex10k expanding break functions other functions same S5U1C33001Mx. Note: High-speed SRAM emulation rental option. S5U1C33001S (for 3.3V), S5U1C33000S (for
S5U1C33T1M1 (5-3.3V)
S5U1C33001M1 (5V) S5U1C33001M2 (3.3V)
S5U1C33002M1 (5V) S5U1C33002M2 (3.3V) S5U1C33003M1 (5V) S5U1C33003M2 (3.3V)
Simulation Emulation Tools
Tool S1C33 ASIC design Description Contains simulation model C33-macro provides simulation environment required create custom microcomputers. customized suit specifications your custom microcomputer. Containing simulation model S1C33209 etc., provides emulation environment with CPLD, co-simulation environment debugger. Supports software development, also including provisions external ASIC.
S5U1C330C2S
S1C33 Family
S1C33 FAMILY MIDDLEWARE FIRMWARE LIST
Classification Trade name Voice S5U1C330V1S S5U1C330G3S S5U1C330T1S S5U1C330V2S S5U1C330H1S Sound S5U1C330M1S S5U1C330S1S Image S5U1C330J1S S5U1C330G1S S5U1C330P1S S5U1C330R1S Debug tool S5U1C330M2S FLS33 S5U1C330C1S S5U1C330S2S S5U1C330U1S Contents Voice compression/expansion voice processing Voice compression/expansion G72SA, G723.1A Simple text speech Voice recognition High-performance Japanese voice recognition using phoneme model method simple melody output MIDI-like sound output based WAVE sound source JPEG compression/expansion (high-speed version under development) Graphics library Japanese handwritten character recognition µITRON3.0 compliant real-time Debug monitor running user board On-board/on-chip flash memory erase/programming routine executable using debugger (included with S5U1C33000C Ver.2.0 later) firmware compact flash memory Supports file (FAT12/16) file system supporting SmartMedia sample program
Evaluation versions available above products. Various demonstration version software applications also available demonstration board.
S1C33 Family
S1C33 FAMILY DEMONSTRATION/PROPTOTYPE BOARD LIST
Input voltage Operating S5U1C330M2S Flash SRAM area output supported Operating voltage frequency S5U1C33209D1 S1C33209 input 40MHz Flash S5U1C330M2D1 Board name 3.3V operation S5U1C33L01D1 S1C33L01 input S5U1C33L01D2 3.3V operation 32kHz 40MHz 32kHz 40MHz 32kHz 40MHz 32kHz 40MHz 32kHz 40MHz 32kHz Flash Flash Flash Flash Flash Others
S5U1C330AxD1 output S5U1C330M2D1 S5U1C33L01E1 S5U1C330AxD1 output With 12V, 28V, S5U1C330LxD -28V outputs S5U1C330M2D1 S5U1C330AxD1 output S5U1C330M2D1 S5U1C330AxD1 output S5U1C330M2D1 S5U1C330AxD1 output S5U1C330M2D1 S5U1C330AxD1 output
S5U1C33T01D1 S1C33T01 input 3.3V operation S5U1C33S01D1 S1C33S01 input 3.3V operation S5U1C33240D1 S1C33240 input 3.3V operation S5U1C33210D1 S1C33210 input 3.3V operation
Expansion Board
Board name S5U1C330A3D1 S5U1C330A4D1 S5U1C330L2D1 S5U1C330L3D1 S5U1C330C1D1 S5U1C330L1D1 S5U1C330S1D1 S5U1C330U1D1 S5U1C330C2D1 Power 3.3V 3.3V 3.3V 3.3V Function 8-32kHz sampling audio input/output board Supports PCM15, stereo output, S5U1C330M1S piezoelectric buzzer output. Audio input/output board Contains low-cost transistor amplifier supporting PCM15. demonstration board with 2.6-inch DTFD panel (exclusive S5U1C33L01D1) Note) demonstration board with 3.7-inch DTFD panel (exclusive S5U1C33L01D1) Note) Demonstration board compact flash Connected with connector. board Agilent Technologies (former 16500A Connected with connector. Memory card board smart medium S5U1C330S2S Connected with connector. Evaluation board macro that implemented ASIC ASIC emulation board Altera APEX20K (400,000 gates) installed socket (default). Interchaneable with 1000 (1,000,000 gates). Note: rental board only available because quantity limited.
S1C33 Family
S1C33 STARTUP GUIDE
following describes available materials them references when examine type S1C33 product choose when actually start developing your application system. Collection S1C33 Family data sheets First, take look list shown previously overall view S1C33 Family, including types microcomputers, development tools, middleware, demonstration boards. outline description each product, relevant part this collection data sheets. Each type microcomputer middleware outlined several pages. Manuals When need detailed information about microcomputer, development tool, middleware, demonstration board, refer manual that product. When manuals needed, please contact Seiko Epson local Seiko Epson distributor. Manuals format also included data described below. following lists typical manuals that needed first: S1C33000 Core Manual S1C33 Family Compiler Package Manual S1C33xxx Technical Manual (xxx denotes microcomputer type which includes, example, L01) S1C33 Family Application Note particular, S1C33 Family Application Note contains information write core S1C33 programs, well S1C33 peripheral function programming, information basic circuit board sound output features. Please sure read S1C33 Family Application Note before starting development. S1C33 Family data Obtain "S1C33 Family data from Seiko Epson. following included. Refer necessary data. Manuals PDFs S1C33 Family English Japanese) reports (regarding tools, etc.) Circuit diagrams demonstration boards (PDF) Photographs hardware tools demonstration boards Japanese only) Patches (e.g., function extensions fixes) latest versions development tools middleware Middleware demonstration software (demonstration samples that after downloading demonstration board) Evaluation versions development tools Primary tools included that start development before purchasing tools. Evaluation versions middleware Samples, execution files, tools included. Check this data what kinds samples tools available. Note that because binary libraries included, cannot this data development purposes using make utility. Before starting development, sure consult reports microcomputer used. Also, because reports updated and/or released from time time, sure latest information from Seiko Epson. reports distributed file named "reportdate.exe" (e.g., report00_09_20.exe). When this file executed, data expanded into "c:\s1c33\reprt" same form data
S1C33 Family
Evaluation development tools start development Since S1C33 Family wide range hardware tools available, have difficulty choosing appropriate product your needs. help, please refer "S1C33 Tool Selection Guide", provided this collection data sheets, when choosing desired tool. Also, recommend installing evaluation versions development tools from S1C33 Family data your computer following instructions from Chapter "Installation", S1C33 Family Compiler Package Manual, them according Section 3.2, "Tutorial". This will help accustomed series operations needed range tools from compiler debugger. debugger's simulator facility allows perform series processing functions-compiling, assembling, linking, debugging-without using target board. Furthermore, looking over S1C33 Family Application Note will prove helpful. Middleware evaluation S1C33 middleware made Seiko Epson demonstration version that demonstration board evaluation purposes. Install demonstration software from S1C33 Family data your computer executing file. Prepare necessary demonstration board equivalent, download demonstration software demonstration board, following instructions readme file. Note that evaluation version middleware included data although cannot used actual development. When using middleware, please also refer "List Hardware Resources used Middleware" this collection data sheets. Although need read respective manuals obtain details middleware, this list helps outline information hardware resources used each middleware. Resource assignments important items consider when designing your application board.
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PF881-03
S1C33000 Core
32-bit Single Chip Microcomputer
32-bit RISC Core High-code-efficient Instruction Multiplication Accumulation Instruction High-speed Operation Current Consumption DESCRIPTION
S1C33000 32-bit RISC-type core S1C33 Family microprocessors. S1C33 Family will developed using this core main unit implementing various peripheral circuits such RAM, ROM, DMA, converters. S1C33000 core high-code efficient instruction set, (multiplication accumulation) instruction features high-speed operation current consumption. suitable wide range embedded applications such portable equipment, equipment, digital signal processing systems various controllers.
FEATURES
Processor type Seiko Epson original 32-bit RISC core Operating frequency 60MHz (differs depending S1C33xxx model) Instruction 16-bit fixed code size types instructions with high linearity Principle instructions executed cycle. Multiplication accumulation instruction instruction bits bits bits bits) Executable cycles operation Register Sixteen 32-bit general-purpose registers Five 32-bit special registers Memory space 28-bit (256MB) space linear space including code, data areas. memory space divided into areas they accessed with select signals delivered from core. Immediate data extension Immediate data instruction codes extended bits using instruction. Interrupts Reset, external interrupts Four software exceptions instruction execution exceptions core fetches vectors trap table branch processing. Reset Cold reset (for resetting conditions) reset (resetting except port status) Trap table selectable from internal external memory when booting relocatable. Power down mode HALT instruction (stops core only.) instruction (stops circuits.) Others Little endian/Big endian format Harvard architecture
S1C33000 Core
MEMORY TRAP TABLE
Memory 0xFFFFFFF Area Area Area Area Area Area Area 0x1000000 Area 0x0C00000 Area Area Area Area Area Area 0x0100000 Area 0x0080000 Area 0x0060000 Area 0x0040000 Area 0x0000000 Area External memory External memory External memory External memory External memory External memory External memory External memory External memory External memory External memory External memory External External memory External memory On-chip Reserved Internal On-chip Area size 64MB 64MB 32MB 32MB 16MB 16MB 512KB 128KB 128KB 256KB Trap Table Reserved External maskable interrupt External maskable interrupt Software exception Software exception Reserved Address error Reserved Zero division Reserved Reset Address offset 1023 32-44 4-12
Trap table start address When booting from built-in ROM: 0x0080000 When booting from external memory: 0x0C00000 trap table relocated using trap table base register TTBR (memory-mapped register) after resetting CPU. Vectors will fetched from trap table booting interrupts.
REGISTERS
General-purpose registers (16)
Special registers
Program counter Processor status register Stack pointer Arithmetic operation register Arithmetic operation high register
(AHR, ALR: Option Multiplication Accumulation, Multiplication, Division)
INSTRUCTION
Instruction Format Operation
cycle lists number execution cycles assuming that instructions stored built-in access built-in RAM. Sample format: signX immX immediate data, register
Classification Relative branch Relative delayed branch Absolute branch Special branch Logic operation Arithmetic operation
Instruction jrgt, jrge, jrlt, jrle, jrugt, jruge, jrult, jrule, jreq, jrne, call jp.d, jrgt.d, jrge.d, jrlt.d, jrle.d, jrugt.d, jruge.d, jrult.d, jrule.d, jreq.d, jrne.d, call.d call, call.d, jp.d ret, ret.d, imm2, reti, brk, retb and, xor, add,
Sample format sing8 jp.d sing8
call
Cycle (branch) (call) Branches (sign8 Executes next instruction before (call) branching. Branches address indicated with %rb. Return, interrupt, etc. sign6 imm6 imm12
Operation Branches (sign8
%rd, %rd, sign6 %rd, %rd, imm6 %sp, imm12
S1C33000 Core
Classification Comparison
Instruction
Operation adc, with carry Multiplication mlt.h, mlt.uh bits) mlt.h %rd, mlt.w, mlt.uw bits) Division div0s, div0u, div1, div2s, div3s Shift
Sample format %rd, %rd, sign6 %rd,
Operation (changes flags only) sign6 carry flag
Cycle
Memory data load
Register data load
Conversion System Stack Scan Swap Extension
%alr %ahr:%alr Division performed according combination these instructions. srl, (logical shift) %rd, imm4 imm4 sra, (arithmetical shift) %rd, (rotate) shift count specified. ld.b (signed 8-bit load) ld.w %rd, [%sp+imm6] [%sp+imm6] (stack relative access) ld.ub (unsigned 8-bit load) ld.w [%sp+imm6], [%sp+imm6] ld.h (signed 16-bit load) ld.w %rd, [%rb] [%rb] (register indirect access) ld.uh (unsigned 16-bit load) ld.w %rd, [%rb]+ [%rb], (post inc.) ld.w (32-bit load) ld.w [%rb], [%rb] ld.w [%rb]+, [%rb] %rs, ld.w ld.w %rd, Copy between registers ld.w %rd, sign6 Immediate data substitution ld.w %rd, Copy from special register ld.w %ss, Copy special register ld.b, ld.ub, ld.h, ld.uh ld.b %rd, Type conversion btst, bset, bclr, bnot btst [%rb], imm3 test, set, clear negation nop, slp, operation, clock stop Repeats <%ahr:%alr= [%r14] [%r15] %ahr:%alr> %r13 times. pushn, popn pushn Continuous push/pop from scan0, scan1 scan0 %rd, Gets length within bits from MSB. swap, mirror operation 8-bit units swap, miror swap %rd, imm13 Extends immediate data instruction.
Immediate Extension with Instruction
Examples) Original instruction call sign8 Extension with Extension with EXTs imm13 imm13 call sign8 call sign21) imm13 call sign8 call sign31) Extended operation with sign21 Extended operation with EXTs sign31 %rd, %rs, imm26 Operand extension %rd, imm32 [%sp+imm32] Offset extension [%rb+imm28] Offset addition
Classification Relative branch 3-operand operation Operation Stack load Absolute load
Instruction jp,jrgt,jrge,jrlt jrle,jrugt,jruge,jrult,jrule, jreq,jrne,call delayed instructions add, sub, and, xor, not, add, sub, and, xor, not, cmp, ld.w ld.b, ld.ub, ld.h, ld.uh, ld.w ld.b, ld.ub, ld.h, ld.uh, ld.w
Original format sing8
%rd, ld.w ld.w ld.w ld.w ld.w ld.w btst
btst, bset, bclr, bnot
%rd, %rs, imm13 Operand extension %rd, imm6 /sign6 %rd, imm19/sign19 %rd, [%sp+imm6] [%sp+imm19] [%sp+imm6], Offset extension %rd, [%rb] [%rb+imm13] %rd, [%rb]+ Offset addition [%rb], [%rb]+, [%rb], imm3 [%rb+imm13] Offset addition
[%rb+imm26] Offset addition
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PF1185-02
S1C33209
32-bit Single Chip Microcomputer
32-bit S1C33000 RISC Core Multiply Accumulation Built-in 8K-byte 10-bit 4-ch. High-speed DMA, Intelligent DESCRIPTION
S1C33209 CMOS 32-bit microcomputer composed CMOS 32-bit RISC core, 8K-byte RAM, 4channel SIO, converter, timers, other circuits. S1C33209 features high-speed operation current consumption. suitable various portable equipment multimedia control systems. S1C33209 also provides function using internal (multiplication accumulation) operation function with converter, this makes possible achieve speech recognition voice synthesis systems.
FEATURES
CMOS 32-bit parallel processing S1C33000 RISC core Main clock 60MHz (Max., 15MHz external clock input) clock 32.768kHz (Typ., crystal) Instruction 16-bit fixed length, instructions (MAC instruction included, cycles) Internal size. 8,192 bytes Clock timer channel Programmable timer bits channels bits channels Watchdog timer Realized with 16-bit programmable timer Serial interface channels Clock synchronization type asynchronization type selectable. Usable infrared (IrDA) interface. 10-bit converter Successive approximation type, input channels High-speed channels Intelligent channels port Input port bits port bits Interrupt controller External interrupts types Internal interrupts types External interface 24-bit address bus, 16-bit data bus, chip enable pins DRAM burst connected directly. Shipping form QFP5-128pin/QFP15-128pin Supply voltage Core voltage 3.6V voltage 5.5V Current consumption SLEEP state 10µA (3.3V, 32.768kHz, clock timer state, Typ.) 2.5µA (2.0V, 32.768kHz, clock timer state, Typ.) state 65mA (3.3V, 50MHz Typ.)
S1C33209
BLOCK DIAGRAM
VDDE A[23:0] D[15:0] #WRL/#WR/#WE #WRH/#BSH #HCAS #LCAS #CE10IN, #CE10EX, #CE[9:3] #EMEMRD #WAIT(P30) #DRD(P20) #DWE(P21) #GAAS(P21) #GARD(P31) OSC3 OSC4 PLLS[1:0] PLLC
S1C33209
S1C33000
Core Control Unit
#RESET #NMI #X2SPD ICEMD DSIO EA10MD[1:0] BCLK #BUSREQ(P34) #BUSACK(P35) #BUSGET(P31) DST[2:0](P10-12) DPCO(P13) DCLK(P14)
OSC3/PLL
Interrupt Controller 16-bit Programmable Timer ch.) 8-bit Programmable Timer ch.) Serial Interface ch.) Converter ch.)
EXCLx(P10-13, P15, P16) TMx(P22-27)
Prescaler
OSC1 OSC2 FOSC1(P14)
OSC1
T8UFx(P10-13) SINx(P00, P04, P27, P33) SOUTx(P01, P05, P26, P16) #SCLKx(P02, P06, P25, P15) #SRDYx(P03, P07, P24, P32) AD0-7(K60-67) #ADTRG(K52) AVDDE K50-54 K60-67 P00-07 P10-16 P20-27 P30-35
Clock Timer Intelligent (128 ch.)
#DMAREQx(K50, K51, K53, K54) #DMAACKx(P32, P33, P04, P06) #DMAENDx(P15, P16, P05, P07)
High-speed ch.)
Input Port
Port
S1C33209
LAYOUT
QFP5-128pin
S1C33209
INDEX
name P24/TM2/#SRDY2 P25/TM3/#SCLK2 P26/TM4/SOUT2 P15/EXCL4/#DMAEND0/#SCLK3 P27/TM5/SIN2 BCLK P00/SIN0 P01/SOUT0 P03/#SRDY0 P31/#BUSGET/#GARD P32/#DMAACK0/#SRDY3 P33/#DMAACK1/SIN3 K54/#DMAREQ3 K53/#DMAREQ2 K52/#ADTRG K51/#DMAREQ1 P02/#SCLK0 VDDE K67/AD7 K66/AD6
name K65/AD5 K50/#DMAREQ0 K64/AD4 K63/AD3 K62/AD2 AVDDE K61/AD1 K60/AD0 P35/#BUSACK VDDE #CE9/#CE17/#CE17&18 OSC2 #CE7/#RAS0/#CE13/#RAS2 OSC1 #CE6/#CE7&8 #WRL/#WR/#WE #WRH/#BSH #CE10EX/#CE9&10EX #CE8/#RAS1/#CE14/#RAS3 #CE5/#CE15/#CE15&16 #CE4/#CE11/#CE11&12 P30/#WAIT/#CE4&5
name #RESET #NMI A0/#BSL P34/#BUSREQ/#CE6 #CE10IN #EMEMRD #HCAS #LCAS P16/EXCL5/#DMAEND1/SOUT3 VDDE
name ICEMD P04/SIN1/#DMAACK2 P05/SOUT1/#DMAEND2 P06/#SCLK1/DMAACK3 PLLC PLLS1 PLLS0 P07/#SRDY1/#DMAEND3 #X2SPD EA10MD0 EA10MD1 Connection) OSC4 P20/#DRD OSC3 P21/#DWE/#GAAS #CE3 P22/TM0 P23/TM1 DSIO P10/EXCL0/T8UF0/DST0 P11/EXCL1/T8UF1/DST1 P12/EXCL2/T8UF2/DST2 P13/EXCL3/T8UF3/DPCO P14/FOSC1/DCLK
S1C33209
QFP15-128pin
S1C33209
INDEX
name P26/TM4/SOUT2 P15/EXCL4/#DMAEND0/#SCLK3 P27/TM5/SIN2 BCLK P00/SIN0 P01/SOUT0 P03/#SRDY0 P31/#BUSGET/#GARD P32/#DMAACK0/#SRDY3 P33/#DMAACK1/SIN3 K54/#DMAREQ3 K53/#DMAREQ2 K52/#ADTRG K51/#DMAREQ1 P02/#SCLK0 VDDE K67/AD7 K66/AD6 K65/AD5 K50/#DMAREQ0 K64/AD4
name K63/AD3 K62/AD2 AVDDE K61/AD1 K60/AD0 P35/#BUSACK VDDE #CE9/#CE17/#CE17&18 OSC2 #CE7/#RAS0/#CE13/#RAS2 OSC1 #CE6/#CE7&8 #WRL/#WR/#WE #WRH/#BSH #CE10EX/#CE9&10EX #CE8/#RAS1/#CE14/#RAS3 #CE5/#CE15/#CE15&16 #CE4/#CE11/#CE11&12 P30/#WAIT/#CE4&5 #RESET #NMI A0/#BSL
name P34/#BUSREQ/#CE6 #CE10IN #EMEMRD #HCAS #LCAS P16/EXCL5/#DMAEND1/SOUT3 VDDE ICEMD
name P04/SIN1/#DMAACK2 P05/SOUT1/#DMAEND2 P06/#SCLK1/DMAACK3 PLLC PLLS1 PLLS0 P07/#SRDY1/#DMAEND3 #X2SPD EA10MD0 EA10MD1 Connection) OSC4 P20/#DRD OSC3 P21/#DWE/#GAAS #CE3 P22/TM0 P23/TM1 DSIO P10/EXCL0/T8UF0/DST0 P11/EXCL1/T8UF1/DST1 P12/EXCL2/T8UF2/DST2 P13/EXCL3/T8UF3/DPCO P14/FOSC1/DCLK P24/TM2/#SRDY2 P25/TM3/#SCLK2
PF1091-05
S1C33T01
32-bit Single Chip Microcomputer
High-speed 32-bit RISC Core Multiply Accumulation 8K-byte Built-in 10-bit 4-ch. SIO, 2-ch. High-speed DMA, Intelligent
DESCRIPTION
S1C33T01 CMOS 32-bit microcomputer composed CMOS 32-bit RISC core, 8K-byte RAM, DMA, 4-ch. SIO, 2-ch. I2C, ADC, timers, oscillators. S1C33T01 features high-speed operation current consumption. S1C33T01 also provides function using internal (multiplication accumulation) operation function with converter, this makes possible achieve speech recognition voice synthesis systems.
FEATURES
CMOS 32-bit parallel processing S1C33000 RISC core Main clock 60MHz (Max., 15MHz external clock input) clock 32.768kHz (Typ., crystal) Instruction 16-bit fixed length, instructions (MAC instruction included, cycles) Internal size. 8,192 bytes Clock timer channel Programmable timer bits channels bits channels timer Realized with 16-bit programmable timer Watchdog timer Realized with 16-bit programmable timer Serial interface channels Clock synchronization type asynchronization type selectable. Usable infrared (IrDA) interface. Single master type, channels (option) 10-bit converter Successive approximation type, input channels High-speed channels Intelligent channels port Input port bits port bits Interrupt controller External interrupts types Internal interrupts types External interface 24-bit address bus, 16-bit data bus, chip enable pins DRAM burst connected directly. Shipping form QFP18-176pin Supply voltage Core voltage 3.6V voltage 5.5V Current consumption SLEEP state 10µA (3.3V, 32.768kHz, clock timer state, Typ.) 2.5µA (2.0V, 32.768kHz, clock timer state, Typ.) state 65mA (3.3V, 50MHz Typ.)
S1C33T01
BLOCK DIAGRAM
VDDE BVDDE A[23:0] D[15:0] #WRL/#WR/#WE #WRH/#BSH #HCAS #LCAS #CE10IN, #CE10EX, #CE[9:3] #EMEMRD #WAIT(P30) #DRD(P20) #DWE(P21) #GAAS(P21) #GARD(P31) OSC3 OSC4 PLLS[1:0] PLLC
S1C33T01
S1C33000
Core Control Unit
#RESET #NMI #X2SPD ICEMD DSIO EA10MD[1:0] EA3MD BCLK #BUSREQ(P34) #BUSACK(P35) #BUSGET(P31) DST[2:0](P10-12) DPCO(P13) DCLK(P14)
OSC3/PLL
Interrupt Controller 16-bit Programmable Timer ch.) 8-bit Programmable Timer ch.) Serial Interface ch.) Converter ch.)
EXCLx(P10-13, P15, P16, P80-83) TMx(P22-27, P84-87)
Prescaler
OSC1 OSC2 FOSC1(P14)
OSC1
T8UFx(P10-13, P50, P51) SINx(P00, P04, P40, P44) SOUTx(P01, P05, P41, P46) #SCLKx(P02, P06, P42, P46) #SRDYx(P03, P07, P43, P47) AD0-7(K60-67) #ADTRG(K52) AVDDE SCLx(P70, P72) SDAx(P71, P73) P00-07 P10-16 P20-27 P30-35 P40-47 P50-57 P60-67 P70-77 P80-87
Clock Timer Intelligent (128 ch.)
#DMAREQx(K50, K51, K53, K54) #DMAACKx(P32, P33, P04, P06) #DMAENDx(P15, P16, P05, P07) K50-54 K60-67
I2CSMST
High-speed ch.) Port Input Port
S1C33T01
LAYOUT
QFP18-176pin
S1C33T01
INDEX
name #X2SPD EA10MD1 EA10MD0 EA3MD P47/#SRDY3 P46/#SCLK3 P45/SOUT3 P44/SIN3 P43/#SRDY2 P42/#SCLK2 P41/SOUT2 P40/SIN2 P07/#SRDY1/#DMAEND3 P06/#SCLK1/#DMAACK3 P05/SOUT1/#DMAEND2 P04/SIN1/#DMAACK2 VDDE P03/#SRDY0 P02/#SCLK0 P01/SOUT0 P00/SIN0 P33/#DMAACK1 P32/#DMAACK0 K54/#DMAREQ3 K53/#DMAREQ2 K52/#ADTRG K51/#DMAREQ1 K50/#DMAREQ0 OSC2 OSC1 ICEMD K67/AD7 K66/AD6 K65/AD5 K64/AD4 K63/AD3 K62/AD2 K61/AD1 K60/AD0 AVDDE
name P35/#BUSACK P34/#BUSREQ/#CE6 P31/#BUSGET/#GARD P30/#WAIT/#CE4&5 P21/#DWE/#GAAS P20/#DRD #CE9/#CE17 #CE8/#RAS1/#CE14/#RAS3 #CE7/#RAS0/#CE13/#RAS2 #CE6 #CE5/#CE15 #CE4/#CE11 BVDDE #CE3 #CE10IN #CE10EX BCLK #HCAS/#UWE #LCAS/#CAS #WRH/#BSH/#UWE #WRL/#WR/#WE/#LWE #EMEMRD A0/#BSL BVDDE
name BVDDE BVDDE P87/TM9 P86/TM8 P85/TM7 VDDE P84/TM6 P83/EXCL9 P82/EXCL8 P81/EXCL7 P80/EXCL6 P73/SDA1 P72/SCL1
name P71/SDA0 P70/SCL0 #NMI PLLS1 PLLS0 #RESET PLLC VDDE OSC4 OSC3 P51/T8UF5 P50/T8UF4 P16/EXCL5/#DMAEND1 P15/EXCL4/#DMAEND0 P14/FOSC1/DCLK P13/EXCL3/T8UF3/DPCO P12/EXCL2/T8UF2/DST2 P11/EXCL1/T8UF1/DST1 P10/EXCL0/T8UF0/DST0 DSIO P27/TM5 P26/TM4 P25/TM3 P24/TM2 P23/TM1 P22/TM0
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PF1032-06
S1C33L01
32-bit Single Chip Microcomputer
High-speed 32-bit RISC Core Multiply Accumulation Built-in Controller 10-bit Built-in Twin-clock Oscillator
DESCRIPTION
S1C33L01 CMOS 32-bit microcomputer composed CMOS 32-bit RISC core, ROM, RAM, DMA, timers, SIO, PLL, LCDC other circuits. S1C33L01 operated with high speed spend little current. With ADC, function, S1C33L01 suitable voice applications PDAs.
FEATURES
CMOS 32-bit parallel processing S1C33000 RISC core Main clock 50MHz (Max., 12.5MHz external clock input) clock 32.768kHz (Typ., crystal) Instruction 16-bit fixed length, instructions (MAC instruction included, cycles) Internal size 128K bytes Internal size. Data bytes VRAM bytes controller S1D13705 equivalent 4/8-bit monochrome/color interface Active-matrix TFT/D-TFD interface bits/pixel; 16-level gray-scale display bits/pixel; color display Clock timer channel Programmable timer bits channels bits channels timer Realized with 16-bit programmable timer Watchdog timer Realized with 16-bit programmable timer Serial interface channels Clock synchronization type asynchronization type selectable. Usable infrared (IrDA) interface. 10-bit converter Successive approximation type, input channels High-speed channels Intelligent channels port Input port bits port bits Pins shared with inputs outputs built-in peripheral circuits. Interrupt controller External interrupts types Internal interrupts types External interface 24-bit address bus, 16-bit data bus, chip enable pins DRAM burst connected directly. Shipping form QFP18-176pin chip Supply voltage Core voltage 3.6V voltage 5.5V Current consumption SLEEP state 10µA (3.3V, 32.768kHz, clock timer state, Typ.) 2.5µA (2.0V, 32.768kHz, clock timer state, Typ.) state 60mA (3.3V, 50MHz Typ.)
S1C33L01
BLOCK DIAGRAM
VDDE1 A[23:0] D[15:0] #WRL/#WR/#WE/#LWE #WRH/#BSH/#UWE #HCAS/#UWE #LCAS/#CAS #CE10IN, #CE10EX, #CE[9:3] #EMEMRD #WAIT(P30) #DRD(P20) #DWE(P21) #GAAS(P21) #GARD(P31) OSC3 OSC4 PLLS[1:0] PLLC
S1C33L01
S1C33000
Core Control Unit
#RESET #NMI #X2SPD ICEMD DSIO EA10MD[1:0] BCLK #BUSREQ(P34) #BUSACK(P35) #BUSGET(P31) DST[2:0](P10-12) DPCO(P13) DCLK(P14)
OSC3/PLL
Interrupt Controller 16-bit Programmable Timer ch.) 8-bit Programmable Timer ch.) Serial Interface ch.) Converter ch.)
EXCLx(P10-13, P15, P16) TMx(P22-27)
Prescaler
OSC1 OSC2 FOSC1(P14)
OSC1
T8UFx(P10-13) SINx(P00, P04) SOUTx(P01, P05) #SCLKx(P02, P06) #SRDYx(P03, P07) AD0-7(K60-67) #ADTRG(K52) AVDDE AVSS K50-54 K60-67 P00-07 P10-16 P20-27 P30-35 FPDAT[11:0] FPFRAME FPLINE FPSHIFT LCDPWR DRDY CLKI CKSEL[2:0] CNF3 GPIO0 VDDE2
Clock Timer Intelligent (128 ch.)
#DMAREQx(K50, K51, K53, K54) #DMAACKx(P32, P33, P04, P06) #DMAENDx(P15, P16, P05, P07)
High-speed ch.)
Input Port
128KB
Port
Controller (S1D13705) VRAM 40KB
S1C33L01
LAYOUT
QFP18-176pin
S1C33L01
INDEX
name VDDE1 A0/#BSL VDDE1
name BCLK #EMEMRD #WRL/#WR/#WE/#LWE #WRH/#BSH/#UWE VDDE1 #CE10EX #CE10IN #CE3 K67/AD7 K66/AD6 K65/AD5 AVDDE K64/AD4 K63/AD3 K62/AD2 AVSS K61/AD1 K60/AD0 K54/#DMAREQ3 K53/#DMAREQ2 K52/#ADTRG K51/#DMAREQ1 K50/#DMAREQ0 #LCAS/#CAS #HCAS/#UWE #CE9/#CE17 #CE8/#RAS1/#CE14/#RAS3 #CE7/#RAS0/#CE13/#RAS2 #CE5/#CE15 #CE4/#CE11 #CE6 VDDE1 N.C. N.C. N.C. N.C.
name N.C. GPIO0 FPDAT11/GPIO4/INVERSE FPDAT10/GPIO3 FPDAT9/GPIO2 VDDE2 FPDAT8/GPIO1 FPSHIFT FPDAT7 FPDAT6 FPDAT5 FPDAT4 FPDAT3 FPDAT2 FPDAT1 FPDAT0 FPLINE FPFRAME DRDY/MOD/FPSHIFT2 VDDE2 LCDPWR N.C. N.C. N.C. N.C. N.C. P35/#BUSACK P34/#BUSREQ/#CE6 P33/#DMAACK1 P32/#DMAACK0 P31/#BUSGET/#GARD P30/#WAIT/#CE4&5 P27/TM5 P26/TM4 P25/TM3 P24/TM2 P23/TM1 P22/TM0
name P21/#DWE/#GAAS P20/#DRD P16/EXCL5/#DMAEND1 P15/EXCL4/#DMAEND0 VDDE1 P14/FOSC1/DCLK P13/EXCL3/T8UF3/DPCO P12/EXCL2/T8UF2/DST2 P11/EXCL1/T8UF1/DST1 P10/EXCL0/T8UF0/DST0 P07/#SRDY1/#DMAEND3 P06/#SCLK1/DMAACK3 P05/SOUT1/#DMAEND2 P04/SIN1/#DMAACK2 OSC2 OSC1 P03/#SRDY0 P02/#SCLK0 P01/SOUT0 P00/SIN0 CNF3 CKSEL2 CKSEL1 CKSEL0 VDDE1 CLKI ICEMD OSC4 OSC3 EA10MD1 EA10MD0 #X2SPD PLLS1 PLLS0 #NMI PLLC #RESET DSIO
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PF1134-03
S1C33S01
32-bit Single Chip Microcomputer
High-speed 32-bit RISC Core Multiply Accumulation 8K-byte Built-in 2-ch. DESCRIPTION
S1C33S01 consists S1C33000 32-bit RISC type core, control unit, interrupt controller, timers, serial interface circuits, 8K-byte other circuits. also includes high-speed oscillation circuit, low-speed oscillation circuit allowing high-speed operation low-power operation with excellent clock functions. S1C33S01 also provides function, using internal (multiplication accumulation) operation function, makes possible design simply voice synthesis systems.
FEATURES
CMOS 32-bit parallel processing S1C33000 RISC core Main clock 50MHz (Max., 12.5MHz external clock input) clock 32.768kHz (Typ., crystal) Instruction 16-bit fixed length, instructions (MAC instruction included, cycles) Internal size. 8,192 bytes Clock timer channel Programmable timer bits channels bits channels Watchdog timer Realized with 16-bit programmable timer Serial interface channels Clock synchronization type asynchronization type selectable. Usable infrared (IrDA) interface. port port bits Pins shared with inputs outputs built-in peripheral circuits. Interrupt controller External interrupts types Internal interrupts types External interface 24-bit address (High-order bits shared with ports) 16-bit data chip enable pins (shared with ports) SRAM, DRAM burst connected directly. Shipping form QFP15-100pin Supply voltage 3.6V (single power supply) Current consumption SLEEP state 10µA (3.3V, 32.768kHz, clock timer state, Typ.) 2.5µA (2.0V, 32.768kHz, clock timer state, Typ.) state 49mA (3.3V, 60MHz Typ.)
S1C33S01
LAYOUT
QFP15-100pin
S1C33S01
INDEX
name #WRL/#WR/#WE #WRH/#BSH #EMEMRD #LCAS #HCAS
name A0/#BSL A20/P33
name A21/P34/#BUSREQ A22/P35/#BUSACK #CE9/P32 A23/P07/#SRDY1 P06/#SCLK1 P05/SOUT1 P04/SIN1 OSC1 OSC2 #RESET #NMI EA10MD0 EA10MD1 #CE8/P31/#BUSGET/#GARD P30/#WAIT P03/#SRDY0 P02/#SCLK0 P01/SOUT0 P00/SIN0 #CE5/P16/EXCL5 #CE4/P15/EXCL4 DSIO
name P14/FOSC1/DCLK P13/EXCL3/T8UF3/DPCO P12/EXCL2/T8UF2/DST2 P11/EXCL1/T8UF1/DST1 P10/EXCL0/T8UF0/DST0 PLLS0 PLLS1 PLLC #X2SPD OSC3 OSC4 ICEMD #CE10EX #CE10IN BCLK #CE6/P20/#DRD #CE7/P21/#DWE/#GAAS P22/TM0 P23/TM1 P24/TM2 P25/TM3 P26/TM4 P27/TM5
PF1186-02
S1C33221/222
32-bit Single Chip Microcomputer
High-speed 32-bit RISC Core Multiply Accumulation 10-bit Built-in High-speed DMA, Intelligent Twin-clock Oscillator
DESCRIPTION
S1C33221/222 CMOS 32-bit microcomputer composed CMOS 32-bit RISC core, ROM, RAM, DMA, timers, SIO, other circuits. S1C33221/222 operated with high speed spend little current. With ADC, function, S1C33221/222 suitable voice applications, PDAs products such printers.
FEATURES
CMOS 32-bit parallel processing S1C33000 RISC core Main clock 50MHz (Max., 12.5MHz external clock input) clock 32.768kHz (Typ., crystal) Instruction 16-bit fixed length, instructions (MAC instruction included, cycles) Internal size. 8,192 bytes Internal size 131,072 bytes (S1C33221), 65,536 bytes (S1C33222) Clock timer channel Programmable timer bits channels bits channels timer Realized with 16-bit programmable timer Watchdog timer Realized with 16-bit programmable timer Serial interface channels Clock synchronization type asynchronization type selectable. Usable infrared (IrDA) interface. 10-bit converter Successive approximation type, input channels High-speed channels Intelligent channels port Input port bits port bits Pins shared with inputs outputs built-in peripheral circuits. Interrupt controller External interrupts types Internal interrupts types External interface 24-bit address bus, 16-bit data bus, chip enable pins DRAM burst connected directly. Shipping form QFP5-128pin Supply voltage Core voltage 3.6V voltage 5.5V Current consumption SLEEP state 10µA (3.3V, 32.768kHz, clock timer state, Typ.) 2.5µA (2.0V, 32.768kHz, clock timer state, Typ.) state 70mA (3.3V, 50MHz Typ.)
This model under development, therefore contents above specifications revised final.
S1C33221/222
LAYOUT
QFP5-128pin
S1C33221/222
INDEX
name name P24/TM2 K65/AD5 K50/#DMAREQ0 P25/TM3 K64/AD4 P26/TM4 K63/AD3 P15/EXCL4/#DMAEND0 K62/AD2 P27/TM5 AVDDE BCLK K61/AD1 P00/SIN0 K60/AD0 P01/SOUT0 P03/#SRDY0 P31/#BUSGET/#GARD P32/#DMAACK0 P35/#BUSACK P33/#DMAACK1 VDDE #CE9/#CE17 K54/#DMAREQ3 OSC2 #CE7/#RAS0/#CE13/#RAS2 K53/#DMAREQ2 OSC1 #CE6 K52/#ADTRG K51/#DMAREQ1 #WRL/#WR/#WE P02/#SCLK0 #WRH/#BSH #CE10EX #CE8/#RAS1/#CE14/#RAS3 VDDE #CE5/#CE15 K67/AD7 #CE4/#CE11 K66/AD6 P30/#WAIT/#CE4&5
name #RESET #NMI A0/#BSL P34/#BUSREQ/#CE6 #CE10IN #EMEMRD #HCAS #LCAS P16/EXCL5/#DMAEND1 VDDE
name ICEMD P04/SIN1/#DMAACK2 P05/SOUT1/#DMAEND2 P06/#SCLK1/DMAACK3 PLLC PLLS1 PLLS0 P07/#SRDY1/#DMAEND3 #X2SPD EA10MD0 EA10MD1 N.C. OSC4 P20/#DRD OSC3 P21/#DWE/#GAAS #CE3 P22/TM0 P23/TM1 DSIO P10/EXCL0/T8UF0/DST0 P11/EXCL1/T8UF1/DST1 P12/EXCL2/T8UF2/DST2 P13/EXCL3/T8UF3/DPCO P14/FOSC1/DCLK
PF1148-03
S1C33240
32-bit Single Chip Microcomputer
High-speed 32-bit RISC Core Multiply Accumulation 10-bit Built-in High-speed DMA, Intelligent Twin-clock Oscillator Built-in Flash Memory
DESCRIPTION
S1C33240 CMOS 32-bit microcomputer composed CMOS 32-bit RISC core, Flash, RAM, DMA, timers, SIO, other circuits. S1C33240 operated with high speed spend little current. With ADC, function, S1C33240 suitable voice applications, PDAs products such printers.
FEATURES
CMOS 32-bit parallel processing S1C33000 RISC core Main clock 40MHz (Max., 10MHz external clock input) clock 32.768kHz (Typ., crystal) Instruction 16-bit fixed length, instructions (MAC instruction included, cycles) Internal size. 8,192 bytes Internal Flash memory size 131,072 bytes (Accessible with wait states 20MHz) erased programmed using S5U1C33000H S5U1C33000C. Clock timer channel Programmable timer bits channels bits channels timer Realized with 16-bit programmable timer Watchdog timer Realized with 16-bit programmable timer Serial interface channels Clock synchronization type asynchronization type selectable. Usable infrared (IrDA) interface. 10-bit converter Successive approximation type, input channels High-speed channels Intelligent channels port Input port bits port bits Pins shared with inputs outputs built-in peripheral circuits. Interrupt controller External interrupts types Internal interrupts types External interface 24-bit address bus, 16-bit data bus, chip enable pins DRAM burst connected directly. Shipping form QFP5-128pin Supply voltage Core voltage 3.6V voltage 5.5V Current consumption SLEEP state 16µA (3.3V, 32.768kHz, clock timer state, Typ.) state 65mA (3.3V, 40MHz Typ.)
This model under development, therefore contents above specifications revised final.
S1C33240
LAYOUT
QFP5-128pin
S1C33240
INDEX
name name P24/TM2 K65/AD5 K50/#DMAREQ0 P25/TM3 K64/AD4 P26/TM4 K63/AD3 P15/EXCL4/#DMAEND0 K62/AD2 P27/TM5 AVDDE BCLK K61/AD1 P00/SIN0 K60/AD0 P01/SOUT0 P03/#SRDY0 P31/#BUSGET/#GARD P32/#DMAACK0 P35/#BUSACK P33/#DMAACK1 VDDE #CE9/#CE17 K54/#DMAREQ3 OSC2 #CE7/#RAS0/#CE13/#RAS2 K53/#DMAREQ2 OSC1 #CE6 K52/#ADTRG K51/#DMAREQ1 #WRL/#WR/#WE P02/#SCLK0 #WRH/#BSH #CE10EX #CE8/#RAS1/#CE14/#RAS3 VDDE #CE5/#CE15 K67/AD7 #CE4/#CE11 K66/AD6 P30/#WAIT/#CE4&5
name #RESET #NMI A0/#BSL P34/#BUSREQ/#CE6 #CE10IN #EMEMRD #HCAS #LCAS P16/EXCL5/#DMAEND1 VDDE
name ICEMD P04/SIN1/#DMAACK2 P05/SOUT1/#DMAEND2 P06/#SCLK1/DMAACK3 PLLC PLLS1 PLLS0 P07/#SRDY1/#DMAEND3 #X2SPD EA10MD0 EA10MD1 EA10MD2 OSC4 P20/#DRD OSC3 P21/#DWE/#GAAS #CE3 P22/TM0 P23/TM1 DSIO P10/EXCL0/T8UF0/DST0 P11/EXCL1/T8UF1/DST1 P12/EXCL2/T8UF2/DST2 P13/EXCL3/T8UF3/DPCO P14/FOSC1/DCLK
PF1239-02
S1C33210 (Mobile Access Gateway
32-bit Single Chip Microcomputer
32-bit RISC HDLC Controller Three Serial (SIO) Interfaces Bytes Built-in Multiply-and-accumulate Instructions Built-in Analog-to-digital Converter High-speed Intelligent Power Consumption PDC, PHS, CdmaOne Interfaces1
These interfaces require software modem module.
DESCRIPTION
S1C33210 single-chip microcomputer consists S1C33000 CMOS 32-bit RISC core plus HDLC controller, three serial (SIO) interfaces, bytes built-in RAM, direct memory access (DMA) controller, timers, analog-to-digital converter, other components. device features both high-speed operation power consumption. HDLC controller, serial (SIO) interfaces, other components necessary mobile access make this device ideal data communications adapters, PDAs, other portable information equipment. multiply-and-accumulate instructions analog-to-digital converter support voice recognition, voice synthesis, other forms digital signal processing portable multimedia terminals.
FEATURES
CMOS with 32-bit parallel processing S1C33000 RISC Main clock 50MHz (Max., with built-in phase-locked loop) clock 32.768kHz (Typ.) crystal oscillator Instruction 16-bit fixed-length arithmetic, highly orthogonal 105-member instruction set, multiply-and-accumulate (MAC) instructions that execute cycles Built-in 8,192 bytes Clock timer channel Programmable timers bits channels bits channels timer Application 16-bit programmable timer Watchdog timer Application 16-bit programmable timer interface channel Control interface represents application serial (SIO) interface. interface channel Control interface represents application serial (SIO) interface. Supports both kbps. Built-in I.460 speed conversion. HDLC controller channel Serial interfaces channels Choice clock synchronous asynchronous operation. (ch0, ch2) (ch1 only supports asynchronous system.) Configurable infrared (IrDA) interfaces. 10-bit analog-to-digital converter Cumulative comparison operation, input channels. High-speed channels Intelligent channels General-purpose ports Input port bits port bits These pins double pins onboard peripherals. Interrupt controller External interrupts types Internal interrupts types External interfaces 24-bit address bus, 16-bit data bus, chip enable outputs. Direct connection DRAM burst ROM.
S1C33210 (Mobile Access Gateway
Package QFP15-128pin Supply voltages Internal operating voltage 3.6V levels 3.6V Power consumption SLEEP mode Typ. During normal operation 230mW Typ. 3.3V, 50MHz
BLOCK DIAGRAM
A[23:0] D[15:0] #WRL/#WR/#WE #WRH/#BSH #HCAS #LCAS #CE10EX #CE[9:4] #WAIT(P30) #DRD(P20) #DWE(P21) #GAAS(P21) #GARD(P31) OSC3 OSC4 PLLS[1:0] PLLC
S1C33210
S1C33000
Core Control Unit
#RESET #NMI #X2SPD DSIO EA10MD[1:0] BCLK #BUSREQ(P34) #BUSACK(P35) #BUSGET(P31) DST[2:0](P10-12) DPCO(P13) DCLK(P14)
OSC3/PLL
Interrupt Controller 16-bit Programmable Timer ch.) 8-bit Programmable Timer ch.) Serial Interface ch.)
EXCLx(P10-13, P15, P16) TMx(P22-27)
Prescaler
OSC1 OSC2 FOSC1(P14)
OSC1
T8UFx(P10-13) SINx(P00, P04, P27) SOUTx(P01, P05, P26) #SCLKx(P02, P25) #SRDYx(P03, P24) K50-52 K60-63 P00-05 P10-16 P20-27 P30-35 CNT1, CNT2 MSEL GOUT
Clock Timer Intelligent (128 ch.)
#DMAREQx(K50, K51) #DMAACKx(P32, P33) #DMAENDx(P15, P16)
Input Port
High-speed ch.)
Port
AD0-3(K60-63) #ADTRG(K52) AVDD
Mobile Access Interface Converter ch.)
S1C33210 (Mobile Access Gateway
LAYOUT
QFP15-128pin
S1C33210
INDEX
name P26/TM4/SOUT2 P27/TM5/SIN2 BCLK P00/SIN0 P01/SOUT0 P03/#SRDY0 P31/#BUSGET/#GARD P32/#DMAACK0 P33/#DMAACK1 P02/#SCLK0 K50/#DMAREQ0 #WRL/#WR/#WE #WRH/#BSH K51/#DMAREQ1 K63/AD3 K62/AD2 AVDD K61/AD1 K60/AD0
name K52/#ADTRG #CE10EX/#CE9&10EX #CE4/#CE11/#CE11&12 #RESET #NMI #CE9/#CE17/#CE17&18 #CE7/#RAS0/#CE13/#RAS2 OSC2 OSC1 #CE6/#CE7&8 #CE8/#RAS1/#CE14/#RAS3 A0/#BSL P35/#BUSACK #HCAS #LCAS P34/#BUSREQ/#CE6
name P30/#WAIT/#CE4&5 #CE5/#CE15/#CE15&16 P16/EXCL5/#DMAEND1 P04/SIN1/#DMAACK2 P05/SOUT1/#DMAEND2 P20/#DRD
name CNT2 CNT1 PLLC SCANEN PLLS1 PLLS0 MSEL GOUT OSC3 OSC4 EA10MD0 EA10MD1 #X2SPD P21/#DWE/#GAAS P22/TM0 P23/TM1 DSIO P10/EXCL0/T8UF0/DST0 P11/EXCL1/T8UF1/DST1 P12/EXCL2/T8UF2/DST2 P13/EXCL3/T8UF3/DPC0 P14/FOSC1/DCLK P24/TM2/#SRDY2 P25/TM3/#SCLK2 P15/EXCL4/#DMAEND0
S1C33210 (Mobile Access Gateway
FUNCTION
Pins Power Supply System
AVDD name Pull-up Function Power supply Power supply Analog system power supply (+); AVDD
Pins Clock Generator
name OSC1 OSC2 OSC3 OSC4 PLLS[1:0] PLLC 105, Pull-up Function Low-speed (OSC1) oscillation input Low-speed (OSC1) oscillation output High-speed (OSC3) oscillation input High-speed (OSC3) oscillation output set-up pins Capacitor connecting
Pins External Interface Signals
56-58, 63-66, 87-89, D[15:0] 36-38, 40-42, #CE10EX/#CE9&10EX #CE9/#CE17/#CE17&18 #CE8/#RAS1/#CE14/#RAS3 #CE7/#RAS0/#CE13/#RAS2 #CE6/#CE7&8 #CE5/#CE15/#CE15&16 #CE4/#CE11/#CE11&12 #WRL/#WR/#WE #WRH/#BSH #HCAS #LCAS BCLK P34/#BUSREQ/#CE6 P35/#BUSACK P30/#WAIT/#CE4&5 P20/#DRD P21/#DWE/#GAAS A0/#BSL A[23:1] P31/#BUSGET/#GARD EA10MD1 EA10MD0 name Pull-up Function Address (A0)/bus strobe (low byte) signal Address A23)
Data D15)
Area chip enable external memory Chip enable (area Chip enable (area 14)/DRAM strobe (Area Chip enable (area 13)/DRAM strobe (Area Area chip enable Chip enable (area Chip enable (area Read signal Write (low byte) signal/write signal/DRAM write signal Write (high byte) signal/bus strobe (high byte) signal DRAM column address strobe (high byte) signal DRAM column address strobe (low byte) signal clock output port/Bus release request input/Area chip enable port/Bus release request acknowledge output port/Wait cycle request input/Area chip enable port/DRAM read signal output successive mode port/DRAM write signal output successive mode/ Area address strobeoutput port/Bus status monitor signal output release request/ Area read signal output Pull-up Area boot mode selection
HSDMA Control Signal Pins
name K50/#DMAREQ0 K51/#DMAREQ1 P32/#DMAACK0 P33/#DMAACK1 P04/SIN1/#DMAACK2 P15/EXCL4/#DMAEND0 P16/EXCL5/#DMAEND1 P05/SOUT1/#DMAEND2 Pull-up Function Pull-up Input port/HSDMA Ch.0 request input Pull-up Input port/HSDMA Ch.1 request input port/HSDMA Ch.0 acknowledge output port/HSDMA Ch.1 acknowledge output port/Serial Ch.1 data input/ HSDMA Ch.2 acknowledge output port/16-bit timer event counter input/ HSDMA end-of-transfer signal output port/16-bit timer event counter input/ HSDMA Ch.1 end-of-transfer signal output port/Serial Ch.1data output/ HSDMA Ch.2 end-of-transfer signal output
S1C33210 (Mobile Access Gateway
Pins Internal Peripheral Circuits
name K52/#ADTRG K60/AD0 K61/AD1 K62/AD2 K63/AD3 P00/SIN0 P01/SOUT0 P02/#SCLK0 P03/#SRDY0 P04/SIN1 P05/SOUT1 P10/EXCL0/T8UF0/DST0 P11/EXCL1/T8UF1/DST1 P12/EXCL2/T8UF2/DST2 P13/EXCL3/T8UF3/DPCO P14/FOSC1/DCLK P15/EXCL4/#DMAEND0 P16/EXCL5/#DMAEND1 P20/#DRD P21/#DWE/#GAAS P22/TM0 P23/TM1 P24/TM2/#SRDY2 P25/TM3/#SCLK2 P26/TM4/SOUT2 P27/TM5/SIN2 CNT1 CNT2 MSEL GOUT Pull-up Function Pull-up Input port/A/D converter trigger input Input port/A/D converter Ch.0 input Input port/A/D converter Ch.1 input Input port/A/D converter Ch.2 input Input port/A/D converter Ch.3 input port/Serial Ch.0 data input port/Serial Ch.0 data output port/Serial Ch.0 clock input/output port/Serial Ch.0 ready signal output port/Serial Ch.1 data input port/Serial Ch.1 data output port/16-bit timer event counter input/ 8-bit timer output/DST0 signal output port/16-bit timer event counter input/ 8-bit timer output/DST1 signal output port/16-bit timer event counter input/ 8-bit timer output/DST2 signal output port/16-bit timer event counter input/ 8-bit timer output/DPCO signal output port/OSC1 clock output/DCLK signal output port/16-bit timer event counter input/ HSDMA Ch.0 end-of-transfer signal output port/16-bit timer event counter input/ HSDMA Ch.1 end-of-transfer signal output port/DRAM read signal output successive mode port/DRAM write signal output successive mode/ Area address strobe output port/16-bit timer output port/16-bit timer output port/16-bit timer output/Serial Ch.2 ready signal port/16-bit timer output/Serial Ch.2 clock port/16-bit timer output/Serial Ch.2 data output port/16-bit timer output/Serial Ch.2 data input output output output input input input input input Mobile control signal output Mobile control signal output Pull-up Serial Ch.3 operating setting input request output
Other Pins
name DSIO #X2SPD #NMI #RESET SCANEN Pull-up Function Pull-down Test Pull-up Serial debugging Clock doubling mode set-up Pull-up request input Pull-up Initial reset input Pull-down
Note: names indicates that signal active.
S1C33210 (Mobile Access Gateway
APPLICATIONS
Bluetooth/PDC Adapter
S1C33210
SIO(1/3) Discrete elements Discrete elements HDLC
SIO(2/3)
Bluetooth
CODEC
Program Memory call control X.25 (LAPB) V.42bis W-ARQ RFCOMM L2CAP command
PDC/PHS/cdmaOne
S1C33210 SIO(1/3) SIO(2/3) HDLC Controller Touch Panel RS232C DSUB
SIO(3/3)
Program Memory call control X.25 (LAPB) W-ARQ call control PIAFS 2.0/2.1/2.2 V.42 Applications Mail Applications User Interface Command
call control(cdmaOne) Telnet TCP/IP
PF1257-01
S1C33205/225/226/245
32-bit Single Chip Microcomputer
High-speed 32-bit RISC Core Built-in SDRAM Controller Multiply Accumulation 10-bit Built-in 8K-byte
DESCRIPTION
S1C33205/225/226/245 CMOS 32-bit microcomputer composed CMOS 32-bit RISC core, RAM, DMA, timers, SIO, other circuits. Featuring high-speed operation, current consumption, including SDRAM controller, this microcomputer allows direct connection external SDRAM, making ideal with PDAs other portable devices. addition, since microcomputer incorporates converter capable multiply-accumulate operations, digital signal processing such speech synthesis processing accomplished with single chip.
FEATURES
CMOS 32-bit parallel processing S1C33000 RISC core Main clock 60MHz (Max., 15MHz external clock input: S1C33205) 50MHz (Max., 12.5MHz external clock input: S1C33225/226/245) clock 32.768kHz (Typ., crystal) Instruction 16-bit fixed length, instructions (MAC instruction included, cycles) Internal size. 8,192 bytes Internal size 128K bytes (S1C33225), bytes (S1C33226) Internal Flash memory size 128K bytes (S1C33245) SDRAM controller Supports 16-bit 16-bit SDRAMs Capable access either bits Capable burst reads single writes Clock timer channel Programmable timer bits channels bits channels Watchdog timer Realized with 16-bit programmable timer timer Realized with 16-bit programmable timer Serial interface channels Clock synchronization type asynchronization type selectable. Usable infrared (IrDA) interface. 10-bit converter Successive approximation type, input channels High-speed channels Intelligent channels port Input port bits port bits Interrupt controller External interrupts types Internal interrupts types External interface 24-bit address bus, 16-bit data bus, chip enable pins DRAM, SDRAM burst connected directly. Shipping form QFP15-128pin Supply voltage Core voltage 3.6V voltage 5.5V Current consumption SLEEP state (3.3V, 32.768kHz, clock timer state, Typ.) state (3.3V, 50MHz Typ.)
This model under development, therefore contents above specifications revised final.
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PF1259-01
S1C33L03
32-bit Single Chip Microcomputer
High-speed 32-bit RISC Core Built-in Controller Built-in SDRAM Controller Multiply Accumulation 10-bit Built-in 8K-byte
DESCRIPTION
S1C33L03 CMOS 32-bit microcomputer composed CMOS 32-bit RISC core, RAM, DMA, timers, SIO, PLL, controller, SDRAM controller other circuits. S1C33L03 operated with high speed spend little current. With ADC, function, S1C33L03 suitable voice applications PDAs.
FEATURES
CMOS 32-bit parallel processing S1C33000 RISC core Main clock 50MHz (Max., 12.5MHz external clock input) clock 32.768kHz (Typ., crystal) Instruction 16-bit fixed length, instructions (MAC instruction included, cycles) Internal size. 8,192 bytes controller type 4/8-bit monochrome interface bits/pixel; 16-level gray-scale display SDRAM controller Supports 16-bit 16-bit SDRAMs Capable access either bits Capable burst reads single writes Clock timer channel Programmable timer bits channels bits channels Watchdog timer Realized with 16-bit programmable timer timer Realized with 16-bit programmable timer Serial interface channels Clock synchronization type asynchronization type selectable. Usable infrared (IrDA) interface. 10-bit converter Successive approximation type, input channels High-speed channels Intelligent channels port Input port bits port bits Interrupt controller External interrupts types Internal interrupts types External interface 24-bit address bus, 16-bit data bus, chip enable pins DRAM, SDRAM burst connected directly. Shipping form QFP20-144pin Supply voltage Core voltage (1.8 3.6V) voltage (1.8 5.5V) Current consumption HALT state state
This model under development, therefore contents above specifications revised final.
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PF1136-03
S1C33 Family Development Environment
Software tools
compiler with strong optimization capability Useful extended instructions based S1C33 instruction assembler source level debugger capable being connected various types debugging targets Supporting Windows 95/98/NT4.0 DESCRIPTION
S1C33 Family development tools provide following environment suitable developing applications that S1C33 Family microcomputer: Software development language using compiler optimized S1C33 architecture compiler strong optimization capability, makes possible compile source files with higher code efficiency Software development assembly language using extended instruction Pleasant debugging environment using debugger that supports assembly level debugging with which various debugging functions
DEVELOPMENT FLOW
source files file.c Assembly source files file.s
Work Bench wb33 Make file
Compiler gcc33
Preprocessor pp33
file.mak
file.ps
Make
Instruction Extender ext33 file.ms
Assembler as33 Object files file.o
Librarian lib33 file.lib Library files
ANSI Library Emulation Library ********.lib
Linker lk33 file.map file.sym file.par Parameter file file.srf Absolute object file
Debugger db33 Simulator
Disassembler dis33 Disassembly list file file.dis
Binary/HEX Converter hex33 file.sa data file
Other utilities
S5U1C330C2S
Debug Tool S5U1C33000H S5U1C330MxD
External data Writer
Internal data (Mask data file) SEIKO EPSON
Demo/Target Board
S1C33 Family Development Environment
FEATURES
Compiler Libraries Preprocessor Extended Instruction compiler optimized based 2.7.2 meet S1C33 architecture. compiler instruction extender realize high-code efficiency. Supports ANSI floating-point emulation libraries. Provides macro, #include, #define #ifdef functions assembly sources.
instruction extended S1C33 instructions into form easy use. Mainly supports extension immediate data offset values into bits, 3operand operations. Supports simple assembler coding. Principle extended instructions
Classification Extended branch Extended operation Function Branches entire address space Instruction format LABEL xadd reg, reg, 32-bit value Instruction xjp, xcall, xjrgt, xjrge, xjrne delayed branch instructions xadd, xsub, xand, xoor, xxor
3-operand operation with 32-bit immediate data Other extended operation 32-bit immediate data operation Extended immediate data 32-bit immediate data substitution substitution Extended shift Shift operation from bits Extended stack relative load Load store from/to stack area Extended absolute Load store from/to absolute address load addresses Extended operation operation absolute addresses
xcmp reg, 32-bit value xcmp, xnot xld.w reg, symbol+32-bit value xld.w xsrl reg, 0-32 xsrl reg, xsrl, xsll, xsra, xld.w reg, [sp+32bit value] xld.w, xld.ub, xld.b, xld.uh, xld.h xld.w reg, [symbol+32-bit value] xld.w, xld.ub, xld.b, xld.uh, xld.h btst reg, [symbol+32-bit value] btst, bset, bclr, bnot
Instruction Extender Assembler Linker Debugger
Expands extended instructions into optimized form according information delivered from linker. Supports relocatable assembly absolute assembly. Supports free mapping function that allows software cashing. Assembly source level debugger. Supports useful such seven multi-window tool bar. Supports software simulator (core memory models). S5U1C33000H, S5U1C330M2S, S5U1C330C2S connected. tool that allows mouse-based control software tools. Allows on-board debugging with target board serial communication using S5U1C330MxD1.
Work Bench Debug Monitor (S5U1C330M2S)
S1C33 Family Development Environment
Hardware tools
Reduced-pin type (minimum 4-pin) (S5U1C33000H) S1C33209 later models with on-chip Inexpensive debugging environment with debug monitor S5U1C330M2S S5U1C330MxD1 board S5U1C33xxxEx tools internal emulation S5U1C33xxxMx tools external memory emulation enhanced break function
DESCRIPTION
S1C33209 later models containing on-chip function, development environment with reduced-pin type which connected terget board with pins (minimum) pins (standard) provided. trace supported when connected with pins. S5U1C33000H also used ASIC microcomputers with built-in S1C33 macro. S5U1C330M2S S5U1C330MxD1 allows configuration inexpensive debug environment placing debug monitor S5U1C330M2S user connecting debugger through serial channel S5U1C330MxD1 board. (May used with S1C33209 later) Capable emulating internal ROMs S1C33209 later (maximum 50MHz, wait states), S5U1C33xxxEx tools support program development internal ROM. Capable emulating external flash memory, S5U1C33xxxMx tools support program development external ROM. S5U1C33001Mx provides S5U1C33000H with superior break function comparable that full-function ICE. Supports on-board flash erase/programming operation debug environments (S5U1C33000H S5U1C330M2S S5U1C330MxD1).
SYSTEM DIAGRAM
Basic Tools
S5U1C33000H
Serial Parallel S5U1C330MxD1
EPSON
1234
Serial
Debug S1C33 monitor chip
Flash S1C33 chip with on-chip
Flash
Expansion Tools
Connected socket TSOP pattern user board emulate flash memory
Connected pattern user board emulate chip with built-in
S5U1C330D1M1
S5U1C33001Mx
S5U1C33209Ex
emulation Break function (with internal emulation board connected)
S5U1C33L01E1
S5U1C330T1M1 S5U1C33002Mx
E0C332L01
emulation
External flash emulation boards
External memory emulation break enhancement boards
Internal emulation boards
E0C33208
EPOD33208
S1C33 Family Development Environment
S1C33 FAMILY DEVELOPMENT ENVIRONMENT LIST
Software Tools
Tool S5U1C33000H S5U1C330M2S S5U1C330M1D1 (5V) S5U1C330M2D1 (3.3V) Description In-circuit debugger S1C33 chip with on-chip This reduced-pin connecting-type requiring only pins connection. Debug monitor Enables creation inexpensive debug environment using user resources (ROM 10KB, 2.5KB, 1ch.) connect debugger.
Hardware Expansion Tools
Tool S5U1C33209E1 (5V) S5U1C33209E2 (3.3V) S5U1C33L01E1 (3.3V) S5U1C33T01E1 (5V) S5U1C33T01E2 (3.3V) S5U1C33221E1 (5V) S5U1C33221E2 (3.3V) S5U1C33240E1 (5V) S5U1C33240E2 (3.3V) S5U1C33S01E1 (3.3V) S5U1C330D1M1 (5-3.3V) Description Emulation S1C33209 (with emulation memory board I/F) Note) With capacity emulate 256KB internal ROM. (maximum 50MHz, wait state) Emulation S1C33L01 (with emulation memory board I/F) Note) Supports development using internal emulation function. (maximum 50MHz, wait state) Emulation S1C33T01 (with emulation memory board I/F) Note) With capacity emulate 256KB internal ROM. (maximum 50MHz, wait state) Emulation S1C33221 (with emulation memory board I/F) Note) With capacity emulate 256KB internal ROM. (maximum 50MHz, wait state) Emulation S1C33240 (with emulation memory board I/F) Emulation S1C33S01 (with emulation memory board I/F) Note) With capacity emulate 256KB internal ROM. (maximum 50MHz, wait state) emulation board socket target board S5U1C33001Mx/S5U1C33002Mx connected emulate ROM. supports type 16M-bit ROMs 42-pin DIPs. Flash emulation board S5U1C33001Mx/S5U1C33002Mx connected 48-pin TSOP flash memory board pattern target board emulate flash memory. supports type 16M, 32Mbit flash memory 48-pin TSOPs. block emulation memory board (accessible with wait state 33MHz) When boards cascaded, blocks emulated. Powerful break functions break, breaks area breaks also added S5U1C33000H (with S5U1C33xxxEx connected). emulation memory board (accessible with wait state, 33MHz) When boards cascaded, blocks emulated. block emulation memory board (accessible with wait state 33MHz) When boards cascaded, blocks emulated. This board flex10k expanding break functions other functions same S5U1C33001Mx. Note: High-speed SRAM emulation rental option. S5U1C33001S (for 3.3V), S5U1C33000S (for
S5U1C33T1M1 (5-3.3V)
S5U1C33001M1 (5V) S5U1C33001M2 (3.3V)
S5U1C33002M1 (5V) S5U1C33002M2 (3.3V) S5U1C33003M1 (5V) S5U1C33003M2 (3.3V)
S1C33 Family Development Environment
Simulation emulation tools
DESCRIPTION
S1C33 Family offers total system development environment that allows develop software, external ASICs, ASIC-incorporating custom microcomputers means simulation, emulation, prototype boards, actual This accomplished seamless linkage ordinary software development tools ASIC development environment where perform simulation emulation.
source
Assembly source
Software development
compiler Assembler Linker Debugger
S5U1C33000C
ASIC design Simulation model co-simulation model S5U1C330C2S S5U1C33000H S5U1C330MxD
macro .net, Custom microcomputer tool S1C33 ASIC design Emulation board S5U1C33xxxMx S5U1C330CxDx Prototype board S5U1C33xxxDx
S1C33 general-purpose microcomputer S1C33 custom microcomputer
External ASIC
Simulation environment
Emulation, prototype environment
Actual environment
ASIC, Hardware development
System development environment
S1C33 Family Development Environment
S5U1C330C2S
This tool provides co-simulation, emulation environments your source code, assembler source code, source code written Verilog language. separately available Verilog simulator (Verilog-XL, ModelSim), plusII, Quartus (Altera Corporation), S5U1C33001Mx, S5U330C2D1 required.
source Assembly source Verilog-HDL file
compiler Assembler Linker
S5U1C33000C
plus Debugger db33 core simulator model model
S5U1C33000H
PLI33 33209 full-model
PLI33 S5U1C33209E1 ASIC 33209 co-simulation others model
(other than CPU)
S1C33209
ASIC others
S5U1C33001M1 etc.
ASIC etc.
F10K100 Verilog simulator High-speed 33209 full-model co-simulation environment Linked with db33 debugger Supports standalone simulation without debugger (simple co-simulation) Verilog simulator High-speed co-simulation environment with higher core speed Linked with db33 debugger Emulation environment CPLD FPGA
S5U1C330C2D1 APEX20K400
Final product with actual
S1C33 ASIC DESIGN
Development environment custom microcomputers. This tool provides simulation environment aiming sign-off ASIC microcomputers. customized before shipment suit specifications your custom microcomputer.
Compiler Assembler Linker AS33 Simple assembler
S5U1C33000C
Model custom microcomputer
ASIC others
Verilog simulator
S1C33 Family Development Environment
PROTOTYPE TOOLS
Centered around S5U1C33xxxDx, these tools provide development environment which prototype evaluated beforehand. wide selection function-adding sub-boards helps support combination various prototypes. Main boards with S1C33 chip
S5U1C33209Dx
Function-adding sub-boards
S5U1C330AxD1
Audio board
S5U1C330U1D1
board S1C33209
S5U1C33L01Dx Note)
S1C33L01
S5U1C330C1D1
Compact flash board
S1C33L01
S5U1C33T01Dx Note) S5U1C330L2D1, S5U1C330L3D1
S1C33T01
(S5U1C330L3D1)
display board (connected S5U1C33L01Dx only)
S1C33T01
S5U1C33002Mx Note: Because mounted microcomputer upper compatibility, this tool also used S1C33209 development. board contains following types memory: Flash memory SRAM 20MHz high-speed clock available.
With SRAM Supports external ASIC emulation CPLD With SRAM Together, boards provide maximum memory
S5U1C33001Mx
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PF1132-03
S1C33 Family Middleware Firmware
S1C33 FAMILY MIDDLEWARE FIRMWARE LIST
Classification Trade name Voice S5U1C330V1S Contents (included technology) sample program operation boards Voice compression/expansion voice processing (VSX, ADPCM, VOX, VSC, PPC) S5U1C33209D1 S5U1C330A3D1 Voice compression/expansion (G729 Annex-A) Voice expansion (G723.1 Annex-A) S5U1C33209D1 S5U1C330A3D1 Simple text speech (VSX, VSX2) S5U1C33209D1 S5U1C330A3D12 Voice recognition S5U1C33209D1 S5U1C330A3D1 Voice recognition using phoneme model (Japanese only) S5U1C33209D1 S5U1C330A3D1 method simple melody output S5U1C33209D1 S5U1C330A3D1 MIDI-like sound output based WAVE sound source (PCM15) S5U1C33209D1 S5U1C330A3D1 JPEG compression/expansion S5U1C33209D1 Graphics library S5U1C33L01D1 S5U1C330L2D1/S5U1C330L3D1 µITRON3.0 compliant real-time S5U1C33xxxDx boards Debug monitor running user board S5U1C33xxxDx boards On-board/on-chip flash memory erase/programming routine executable using debugger (included with S5U1C33000C Ver.2.0 later) S5U1C33xxxDx boards Handwritten character recognition DMT33003 (made EHK) firmware compact flash memory, supports file S5U1C33L01D1 S5U1C330C1D1 firmware SmartMedia, supports file S5U1C33L01D1 S5U1C330S1D1 sample program S5U1C33209D1 S5U1C330U1D1 Model supported S1C332xx
S5U1C330G3S
S1C33xxx
S5U1C330T1S S5U1C330V2S S5U1C330H1S Sound S5U1C330M1S S5U1C330S1S Image S5U1C330J1S S5U1C330G1S Others S5U1C330R1S S5U1C330M2S FLS33
S1C332xx S1C332xx S1C332xx S1C332xx S1C332xx S1C332xx S1C33L01 S1C332xx S1C332xx S1C332xx
S5U1C330P1S S5U1C330C1S S5U1C330S2S S5U1C330U1S
S1C332xx S1C332xx S1C332xx S1C33xxx
S1C33 Family Middleware Firmware
VOICE COMPRESSION/EXPANSION VOICE PROCESSING TECHNOLOGY LIST
Technology name VSX2 ADPCM Contents Technology performing timebase silent compression based ADPCM Supports sampling rate 8kHz upgraded version supporting sampling rates 11.025 22.05kHz High-speed version ADPCM technology with same sound quality G726 Supports sampling rates 22.05kHz Technology realizing high voice compression rates using voice synthesis technology Supports sampling rate 8kHz Technology changing speed pitch voice factor Capable packing 10-bit data without changing original sound, using packed method Supports sampling rates 22.05kHz High-precision 15-bit technology using hybrid PWM, also capable stereo Supports sampling rates 48kHz G729 Annex-A Supports sampling rate 8kHz G723.1 Annex-A Supports sampling rate 8kHz Compression rate About About About About 1/10 Application package S5U1C330V1S S5U1C330T1S S5U1C330T1S S5U1C330V1S S5U1C330V1S
PPCM
About
S5U1C330V1S S5U1C330V1S
PCM15 G729 G723
About 1/10 About 1/10
Evaluation tool data S5U1C330G3S S5U1C330G3S
S1C33 Family Middleware Firmware
DEMONSTRATION SOFTWARE LIST
File name dm5s8jVx.exe Contents demonstration boards S5U1C330V1S Japanese, S5U1C330S1S, S5U1C330M1S, S5U1C330V2S, S5U1C330T1S Japanese (All bits, 8kHz output) S5U1C33209D1 S5U1C330A3D1 S5U1C330V1S English, S5U1C330S1S, S5U1C330M1S, S5U1C330V2S (All bits, 8kHz output) S5U1C33209D1 S5U1C330A3D1 VSX2 bits, 16kHz),VSX2 bits, 22kHz), text speech bits, 16kHz) (All contents Japanese) S5U1C33209D1 S5U1C330A3D1 MIDI-like sound output bits, 22kHz, stereo), melody differential outputs S5U1C33209D1 S5U1C330A3D1 PCM15 guitar sound bits, 32kHz, mono) S5U1C33209D1 S5U1C330A3D1 PCM15 beatmania bits, 32kHz, mono) S5U1C33209D1 S5U1C330A3D1 MIDI-like sound output bits, 32kHz stereo, mono) S5U1C33209D1 S5U1C330A3D1 display demonstration S5U1C330L2D1 panel S5U1C33L01D1 S5U1C330L2D1 display demonstration S5U1C330L3D1 panel S5U1C33L01D1 S5U1C330L3D1 Graphics, S5U1C33L01D1 S5U1C330L2D1, S5U1C33L01D1 S5U1C330L3D1 Compact flash S5U1C33L01D1 S5U1C330C1D1 Middleware demo collection (S5U1C330J1S, S5U1C330C1S, S5U1C330G1S, S5U1C330R1S, PCM15) S5U1C33L01D1 S5U1C330A3D1 S5U1C330C1D1 S5U1C330L2D1 Handwritten character recognition DMT33003 (made EHK) writer SmartMedia S5U1C33L01D1 S5U1C330S1D1 Voice recognition using phoneme model S5U1C33209D1 S5U1C330A3D1 G729, G723 playback S5U1C33209D1 S5U1C330A3D1 G729 recording/playback S5U1C33209D2 S5U1C33209E2 S5U1C330A3D1 S5U1C33000H1
dm5s8eVx.exe dm5s16Vx.exe dm7s22Vx.exe dm7s32Vx.exe dm7s3bVx.exe dm7s3cVx.exe dm6g26Vx.exe dm6g37Vx.exe dm6guiVx.exe dm6cfVx.exe dm6cmbVx.exe dm3pnVx.exe dm3smVx.exe dm7hmmVx.exe dm7s4Vx.exe dm7s5Vx.exe
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PF1194-02
List Hardware Resources used Middleware
following lists default hardware resources used each middleware. resources used changed modifying source program opened user. Refer each middleware manual details.
S5U1C330V1S, S5U1C330G3S
16-bit timer 16-bit timer 16-bit timer converter conversion trigger generation 10-bit output trigger generation Voice input 10-bit output Voice input
S5U1C330T1S
16-bit timer 16-bit timer 16-bit timer converter conversion trigger generation (VSX2 voice input) 10-bit output trigger generation Voice input (VSX2 voice input) 10-bit output Voice input
S5U1C330V2S
16-bit timer conversion trigger generation converter Voice input Voice input
S5U1C330M1S
single channel output 16-bit timers related port 3-channel simultaneous output 16-bit timers related ports direct driving piezoelectric buzzer 16-bit timers related ports
List Hardware Resources used Middleware
S5U1C330S1S
15-bit stereo output 16-bit timer 9-bit output, channel 16-bit timer 9-bit output, channel 16-bit timer 6-bit output, channel 16-bit timer 6-bit output, channel 16-bit timer Sampling trigger generation 9-bit output, channel 9-bit output, channel 6-bit output, channel 6-bit output, channel 15-bit mono output 16-bit timer 9-bit output 16-bit timer 6-bit output 16-bit timer Sampling trigger generation 9-bit output 6-bit output 10-bit mono output 16-bit timer 10-bit output 16-bit timer Sampling trigger generation 10-bit output
S5U1C330J1S
peripheral circuit used.
S5U1C330G1S
16-bit timer sampling
S5U1C330R1S
16-bit timer 8-bit timer channel System clock
S5U1C330M2S
serial interface channel related port
FLS33
peripheral circuit used.
S5U1C330C1S
Port input interrupt Port input interrupt Port input interrupt
S5U1C330U1S
XINT DMAREQ1 DMAACK1 high-speed channel transfer
PF1144-02
S1C33 Family Technology PCM15
High-precision technology S1C332xx series Maximum bits precision voice band using hybrid technology; output sampling frequencies 48kHz Able realize CD-quality sound using only microcomputer several components FEATURES
Seiko Epson's original hybrid technology allows product support maximum bits precision 8kHz 48kHz sampling frequencies, enabling CD-quality sound extremely cost. hybrid technology comprised following three technologies: Fine-PWM technology Control units half-clock cycles allows production vouice/music output with maximum bits precision even single channel. Dual technology Synthesizing channels above fine allows produce voice/music output with maximum bits precision. Software-adjusted technology correcting output through software processing, realizes 0.01% accurate high-precision linearity error. Support will provided wide range products, from uncompressed data sound reproduction voice expansion middleware released near future. Able accommodate stereo output. used microcomputers, from S1C332xx series ASIC microcomputers built macros. Ideally suited data banks with music functions, PDAs, electronic stationery, electronic toys, mobile audio equipment.
HARDWARE CONFIGURATION
S1C332xx chip
15-bit output
S1C33000 Core
PWM1 (16-bit timer PWM2 (16-bit timer
synthesis low-pass filter
Minimum configuration possible with just five
Speaker
Speaker
Corrected controlled software
Refer "S1C33 Family Application Note", details.
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PF1003-05
S1C33 Family S5U1C330R1S Middleware
Realtime middleware
Realtime S1C33 Family Suport µITRON Optimize S1C33 Family DESCRIPTION
S5U1C330R1S realtime operating system S1C33 Family single-chip microcomputers. Complies with µITRON3.0 specifications. Compact high-speed kernel optimized S1C33 Family. S5U1C330R1S released with CD-ROM including source code, library sample programs. customize S5U1C330R1S your system. Multiple tasks share common stack area (when processed parallel). minimize amount used your system your application. Using S5U1C330R1S your design enables quickly efficiently develop embedded applications printers, PDAs, products various types control equipment.
FEATURES
System Diagram
Application program
Task Task Task Task Task Task
S5U1C330R1S kernel
Synchronization Task Task-dependent System management synchronization management communication functions functions functions functions Time Interrupt Memory pool management management management functions functions functions
S1C33 Family microcomputer (Hardware)
Memory Requirements Speed Kernel size1: ROM: 9.8K bytes RAM: 2.4K bytes Dispatch time2: 13.6 (CPU: 40MHz, Bus: 20MHz)
Number tasks number priority levels number event flags number semaphore number mailboxes number message buffers number variable-size memory pools number fixed-size memory pools number cyclic handlers number alarm handlers Tasks same priority were switched over rot_rdq system call.
These standard values guide will vary according user's system environment make condition. value should evaluated actual system.
S1C33 Family S5U1C330R1S Middleware
System Call List
Classification System call Function
Task management
Task-dependent synchronization
Synchronization communication
Extended synchronization communication
System management Time management
Interrupt management Memory pool management
Implementationdependent functions
dis_dsp( Disable Dispatch ena_dsp( Enable Dispatch sta_tsk( Start Task ext_tsk( Exit Issuing Task ter_tsk( Terminate Other Task chg_pri( Change Task Priority rot_rdq( Rotate Tasks Ready Queue rel_wai( Release Wait Other Task get_tid( Task Identifier exd_tsk( Exit Delete Task ref_tsk( Reference Task Status slp_tsk( Sleep Task tslp_tsk( Sleep Task with Time-out wup_tsk( Wake Other Task sus_tsk( Suspend Other Task rsm_tsk( Resume Suspended Task can_wup( Cancel Wake Request wai_sem( Wait Semaphore preq_sem( Poll Request Semaphore twai_sem( Wait Semaphore with Timeout sig_sem( Signal Semaphore ref_sem( Reference Semaphore Status rcv_msg( Receive Message from Mailbox prcv_msg( Poll Receive Message from Mailbox trcv_msg( Receive Message from Mailbox with Timeout snd_msg( Send Messages Mailbox ref_mbx( Reference Mailbox Status wai_flg( Wait Event Flag pol_flg( Poll Event Flag twai_flg( Wait Event Flag with Timeout set_flg( Event Flag clr_flg( Clear Event Flag ref_flg( Reference Event Flag Status snd_mbf( Send Messages Message Buffer psnd_mbf( Poll Send Messages Message Buffer tsnd_mbf( Send Messages Message Buffer with Timeout rcv_mbf( Receive Messages from Message Buffer prcv_mbf( Poll Receive Messages from Message Buffer trcv_mbf( Receive Messages from Message Buffer with Timeout ref_mbf( Reference Message Buffer Status get_ver( Version Information ref_sys( Reference System Status set_tim( System Clock get_tim( System Clock dly_tsk( Delay Task def_cyc( Define Cyclic Handler act_cyc( Activate Cyclic Handler def_alm( Define Alarm Handler ref_cyc( Reference Cyclic Handler Status ref_alm( Reference Alarm Handler Status ret_tmr( Return from Cyclic/Alarm Handler loc_cpu( Lock unl_cpu( Unlock ret_int( Return from Interrupt Handler get_blk( Variable-size Memory Block pget_blk( Poll Variable-size Memory Block tget_blk( Variable-size Memory Block with Timeout rel_blk( Release Variable-size Memory Block get_blf( Fixed-size Memory Block pget_blf( Poll Fixed-size Memory Block tget_blf( Fixed-size Memory Block with Timeout rel_blf( Release Fixed-size Memory Block ref_mpl( Reference Variable-size Memory Pool Status ref_mpf( Reference Fixed-size Memory Pool Status ent_int( Initialize Interrupt Handler Value vcre_tsk( Create Task vcre_mbf( Create Message Buffer vcre_mpl( Create Variable-size Memory Pool vcre_mpf( Create Fixed-size Memory Pool sys_clk( System Clock vchg_semcnt( Change Semaphore Count Value vchk_timer( Check Time Management Function
PF1078-03
S1C33 Family S5U1C330M2S Middleware
Debug monitor
Debug monitor S1C33 Family Runs target board providing low-cost debug environment Controlled with debugger through S5U1C330MxD1 board FEATURES
S5U1C330M2S debug monitor program S1C33 Family. Works user board linking with user program. Approx. 10KB ROM, approx. 2.5KB required S5U1C330M2S operation. interrupt resource used. debug monitor target board controlled db33 debugger connected S5U1C330MxD1 board with RS232C cable. S5U1C330M1D1 system S5U1C330M2D1 3.3V system available. They support 115,200bps data transfer, connected user board with pins (standard) pins (minimum). S5U1C330M2S supports basic debug functions such program downloading Flash memory, memory dump, register read/write, stepping, program running, break function. S5U1C330M2S middleware including source codes provided with CD-ROM. Simple method S5U1C330M2S allows easy implementation with user program. debugging environment does need ICE. S5U1C330M2S debugging environment implemented final product.
DESCRIPTION
Hardware System
S5U1C330MxD1 interface board Terget board with S5U1C330M2S
S1C33xxx
Serial interface
EPSON
RS232C 115,200bps Debugger db33
External
External
(Flash memory)
12-5 connection
Software System
User software S5U1C330M2S library Hardware Application S5U1C330M2S library Start with m_mon_start (init functions) S1C33 chip 10KB 2.5KB RS232C Initialize, Read/Write SIO-S5U1C330MxD1
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PF968-05
S1C33 Family S5U1C330V1S Middleware
Voice compression decompression middleware
Voice compression decompression middleware S1C33 Family Voice compression, decompression, speed pitch change supported Real-time execution S1C33 chip FEATURES
Voice middleware S1C33 Family provided form linkable library CD-ROM. Compression, decompression, speaking part with (PWM) listening part with included library. Seiko Epson exclusive voice compression technologies provide voice compression decompression with high compression ratio. case VOX, 8MHz sampled voice compressed 8kbps standard 2kbps various compression ratios selected.) With voice processing technology VSC, voice speed changed from x1/4, voice pitch changed from (high) x1/3 (low). Supports ADPCM (40kbps, 32kbps, 24kbps, 16kbps). Suitable voice memos, data banks with voice, with voice, digital stationery with voice digital toys with voice.
HARDWARE CONFIGURATION
S1C33xxx
10-bit converter S1C33000 Core
8-bit converter using 16-bit programmable timer 16-bit programmable timer interface
POWER
Speaker
Internal
External
External
MEMORY REQUIREMENTS SPEED
Memory Requirements (byte) Internal wait) VSX: 5.3K ADPCM: 4.5K VOX: 5.8K
Speed (CPU occupancy during 20MHz operation) Playback Recording VSX: ADPCM: VOX:
S1C33 Family S5U1C330V1S Middleware
SOFTWARE CONFIGURATION
S5U1C330V1S Library Libraries with voice subroutines that called from user's application.
Application S5U1C330V1S library voxListen(), voxSpeak(), vscSpeak(), Hardware converter, converter, 16-bit timer
S5U1C330V1S Data Creation Tool This tool creates compressed voice data replay only. used with Windows95/NT4.0, higher versions. Flow (Example)
Recorder with high quality features such
tape, etc.
file
EPSON
Using sound card sound editor (commercially available) create edit sound file Normalize tool Compression tool Conversion tool
sound card equivalent high-quality sound card
Compressed voice data
(assembly source)
S5U1C330V1S Evaluation Tool This evaluation tool technology using sound board used with Windows95/NT4.0, higher versions.
evaluation tool evaluation tool ADPCM evaluation tool evaluation tool
Sound Blaster compatible sound card
EPSON
This middleware only available with (S1C33 Family). This specification change without notice.
PF1072-04
S1C33 Family S5U1C330M1S Middleware
Melody playing middleware
Melody playing middleware S1C33 Family Supports simple method similar general melody Max. 3-channel simultaneous outputs Supports S1C33 chip FEATURES
Middleware S1C33 Family provided linkable library. Melody output with 60Hz 4kHz waveforms using 16-bit timers. Melody tools allow input music evaluation melody output Compact data library size (melody data: bytes note, library: 1.5K bytes) that needs only small area. Suitable data banks, PDAs, toys with melody function.
HARDWARE CONFIGURATION
S1C33xxx
Max. S1C33000 Core 16-bit timer 16-bit timer 16-bit timer Transister drive Piezoelectric speaker
Speaker
Built-in
16-bit timer (for interrupt)
interface
External
External
RESOURCE
size size Timer Melody output Melody library approx. 1.5K bytes, Melody data approx. bytes note Approx. bytes 16-bit timer used generating interrupt 16-bit timer used each output channel
SOFTWARE CONFIGURATION
S5U1C330M1S Library Libraries with melody subroutines that called from user's application.
Application S5U1C330M1S library mdyOpen(), mdySet(), mdyStart(), Hardware 16-bit timers
S1C33 Family S5U1C330M1S Middleware
S5U1C330M1S Data Creation Tool This tool creates melody data. used with Windows 95/98/NT4.0, higher versions.
Flow (Example)
Musical notes
Enter melody keys each channel
Melody text file
EPSON
Melody assembler
Melody data (assembly source)
S5U1C330M1S Evaluation Tool This tool evaluating melody data used with Windows 95/98/NT4.0, higher versions.
Melody data
Evaluation tool
Evaluation data
EPSON
Sound card speaker
This middleware only available with (S1C33 Family). This specification change without notice.
PF1074-03
S1C33 Family S5U1C330S1S Middleware
Sound playing middleware
Sound playing middleware S1C33 Family Supports musical instruments with WAVE table method (monaural, 8kHz sampling)/40MHz playable real time FEATURES
Middleware S1C33 Family provided linkable library. Produces 15-bit stereo sound sampling frequency 32kHz. Sound tools allow input music evaluation sound output Also available converter converting MIDI files S5U1C330S1S sound files. Compact data library size (sound data: bytes note, instrument data: bytes (8kHz sampling) instrument) that needs only small area. Suitable data banks, PDAs, toys with sound function.
HARDWARE CONFIGURATION
S1C33xxx
S1C33000 Core
POWER
Speaker
Built-in
16-bit timer
interface
External
External
RESOURCE
Sound library approx. bytes, instrument bytes (8kHz sampling), sound data approx. bytes note size Approx. bytes library use, bytes each play channel. Timer 16-bit timer used generating interrupt Sound outputs (PWM) Uses 16-bit timers through (for 15-bit stereo output). size
INSTRUMENTS SUPPORTED
Supports types musical instruments given below standard feature. also create musical instrument data register entry S5U1C330S1S. Non-percussion instruments types) Piano, Harpsichord, Celesta, Organ, Guitar, Bass, Electric Guitar, Violin, Trumpet, Clarinet, Piccolo, Flute Percussion instruments types) Bass Drum, Side Stick, Snare, Tom, Crash Cymbal1, Hi-Hat, Bongo, Triangle
S1C33 Family S5U1C330S1S Middleware
SOFTWARE CONFIGURATION
S5U1C330S1S Library Libraries with sound subroutines that called from user's application.
Application S5U1C330S1S library Hardware (16-bit timer etc.)
S5U1C330S1S Data Creation Tool This tool creates sound data. used with Windows 95/98/NT4.0, higher versions. Flow (Example)
MIDI file Musical notes
Enter sound keys each channel
Sound text file
EPSON
Sound assembler
MIDI file converter
Sound data (assembly source)
S5U1C330S1S Evaluation Tool This tool evaluating sound data used with Windows 95/98/NT4.0, higher versions.
Sound evaluation tool
EPSON
Sound card speaker
This middleware only available with (S1C33 Family). This specification change without notice.
PF1138-02
S1C33 Family S5U1C330T1S Middleware
Text speech middleware
Text speech middleware S1C33 Family Generates more natural speech adjusting parameters each phoneme Comes with VSX2, high sampling rate version FEATURES
text-to-speech middleware S1C33 Family, this generates speech from Japanese text using phoneme data compressed (8kHz) VSX2 (11.025 22.05kHz). Available linkable library form. Speech also generated from your original registered words, with support other languages aside from Japanese. VSX2 speech compression/expansion technology supporting sampling rates 11.025kHz, 16kHz, 22.05kHz just been introduced. sound volume, pitch, length, silent length between phonemes individually adjusted each phoneme, more natural speech quality closer actual speech. Running S5U1C330T1S tools allow adjust output parameters well evaluate sound quality before final production. standard Japanese language phoneme data stored approximately 100KB memory (for sampling frequency 16kHz). library program about 15KB size. Ideally suited vending machines, PDA, electronic toys, electronic stationery.
HARDWARE CONFIGURATION
S1C33xxx
S1C33000 Core
converter
POWER
Speaker
Built-in
16-bit timer
interface
External
External
SOFTWARE CONFIGURATION
S5U1C330T1S Library
Appilcation S5U1C330T1S library (VSX2 function S5U1C330V1S library) Hardware (16-bit timer etc.)
S1C33 Family S5U1C330T1S Middleware
S5U1C330T1S Data Creation Tool This tool creates sentence data phoneme (word) data. used with Windows 95/98/NT4.0, higher versions. Flow (Example)
Text file
Sentence data making tools
tape, etc.
Speech sentence data
file
Using sound editor (commercially available) create edit sound file Phoneme data making tools
Speech phoneme data
EPSON
Sound card
S5U1C330T1S Evaluation Tool This tool used evaluate speech generated S5U1C330T1S, using sound board. used with Windows 95/98/NT4.0, higher versions.
Speech evaluation tool
EPSON
Sound card speaker
This middleware only available with (S1C33 Family). This specification change without notice.
PF1070-04
S1C33 Family S5U1C330V2S Middleware
Voice recognition engine middleware
Speech recognition middleware S1C33 Family Real-time execution S1C33 chip tools making speech recognition data
FEATURES
Speech recognition middleware S1C33 Family provided form linkable library. speech recognition engine listening routines using converter included library. Data decompression speaking routines with converter implemented using S5U1C330V1S library. Using Seiko Epson exclusive isolated word recognition technology, words recognized real-time. types recognition methods available; Speaker Independent Recognition which data created Speaker Dependent Recognition that allows direct word-registration products. tools evaluating speech recognition engine provided. Evaluation boards (S5U1C33209D1, S5U1C330A3D1, S5U1C330M1D1) provided. Suitable PDAs, digital stationeries digital toys.
HARDWARE CONFIGURATION
S1C33xxx
10-bit converter S1C33000 Core converter POWER Speaker
case speak
Built-in
16-bit timer
interface
External
External
MEMORY REQUIREMENTS SPEED
bytes Program bytes Dictionary data recognition (Cepstrum) 1,280 bytes/second Dictionary data recognition (VQCode) bytes/second Recognition speed 20MHz operation, recognition dictionary: words 0.54 seconds (Approximately seconds single dictionary entries such "Good morning" "Good afternoon")
S1C33 Family S5U1C330V2S Middleware
SOFTWARE CONFIGURATION
S5U1C330V2S Library
Application S5U1C330V2S library Option S5U1C330V1S library Hardware converter, 16-bit timer
S5U1C330V2S Data Creation Tool This tool creates speech recognition data. used with Windows95/98/NT4.0, higher versions. Flow (Example)
Collected speech data
JP11
file
Using sound editor (commercially available) create edit sound file Recognition data making tools
EPSON
Collect speech data similar product (S5U1C33xxxDx etc.)
Speech recognition data
(assembly source)
S5U1C330V2S Evaluation Tool This evaluation tool S5U1C330V2S recognition engine using sound board used with Windows95/98/NT4.0, higher versions with GUI.
Speech recognition evaluation tool
EPSON
Sound card
This middleware only available with (S1C33 Family). This specification change without notice.
PF970-05
S1C33 Family S5U1C330J1S Middleware
Image compression decompression middleware
JPEG image compression decompression middleware S1C33 Family Monochrome, RGB, image-processing function supported tools convert JPEG compressed image into data FEATURES
Image middleware S1C33 Family provided form linkable library CD-ROM. This middleware conforms JPEG baseline compatible with great deal JPEG data. Compress decompress image B/W, grayscale, color color. Compression ratios including <YCbCr> 4:4:4, 4:2:2 4:1:1 selected reduction-expanded function used. tools creating compressed JPEG image data evaluating image quality provided. S5U1C330J1S does interrupt peripheral functions. Suitable applications that capture display image data such digital cameras, PDA, digital stationery digital toys.
MEMORY REQUIREMENTS SPEED
bytes (for image pixels wide) bytes Compression decompression speed approx. seconds (20MHz operation, pixels)
SOFTWARE CONFIGURATION
S5U1C330J1S Library Library including subroutines that called from user's application. Compression decompression possible S1C33 chip.
Application S5U1C330J1S library jpegInit(), jpegDecode(), jpegEncode(),
S5U1C330J1S Data Creation Tool This tool creates compressed JPEG image data display only. used with Windows95/98/NT4.0, higher versions. Flow (Example)
Image
Create edit file using scanner digital camera
Scanner, digital camera
Bitmap (.bmp) file
EPSON
Tools format conversion compression
Compressed JPEG data
(assembler source)
S1C33 Family S5U1C330J1S Middleware
S5U1C330J1S Evaluation Tool This tool evaluating JPEG compression decompression quality With using tools, quality image files when compression ratio changed evaluated. used with Windows95/98/NT4.0, higher versions.
JPEG evaluation tool
EPSON
This middleware only available with (S1C33 Family). This specification change without notice.
PF1142-03
S1C33 Family S5U1C330C1S Middleware
Compact FLASH middleware
Compact FLASH middleware S1C33 Family Supports file system (compatible with MS-DOS Ver.6.x)
FEATURES
This middleware S1C33 Family, available linkable library form. Uses True mode interface with memory cards. FLASH card device driver allow compact FLASH FLASH cards. file system driver enables MS-DOS Ver.6.x compatible file exchange. format drivers compact FLASH FLASH also available. Ideally suited digital cameras, PDAs, electronic pocketbooks.
HARDWARE CONFIGURATION
S1C33xxx
S1C33000 Core interface Several ports Memory card
External
External
REQUIRED RESOURCES
space: approx. bytes space: approx. bytes following ports used controlling memory card. INTRQ
RECOMMENDED CARDS
MELCO MELCO HAGIWARE DATA EPSON compact FLASH 48MB compact FLASH compact FLASH 10MB compact FLASH 45MB compact FLASH RCF-C RCF-C 48MB HPC-CF08X PCCF-10MS SECF-A45
S1C33 Family S5U1C330C1S Middleware
SOFTWARE CONFIGURATION
Application file system driver file system format driver card device driver Hardware
Card Device Driver compact FLASH FLASH cards require card device driver. File System Device Driver (supports FAT12 FAT16) Permits MS-DOS Ver.6.x compatible file exchange character file names, with three extension characters). Support Japanese file names. standard ANSI-like (e.g., fopen() fred()). File System Format Driver This driver initializes file system make usable compact FLASH FLASH. File System Processing Speed (reference data) Measurement conditions: clock: 40MHz, clock: 20MHz, register, ROM: wait RAM: wait 1-MB file read 512-byte data written 2,048 times. MELCO compact FLASH RCF-C Format 0.11s file read 12.02s file write 15.63s EPSON 45MB compact FLASH SECF-A45 Format 0.59s file read 20.18s file write 28.38s This middleware only available with (S1C33 Family). This specification change without notice.
PF1140-03
S1C33 Family S5U1C330G1S Middleware
Graphic library
Graphics library S1C33 Family Supports various grayscales, from 8bpp colors monochrome Comes with user interface resources necessary implementation FEATURES
This graphics library S1C33 Family provided linkable library form. User interface resources required implementation also available. Supports various grayscales from 8bpp colors monochrome. Optimized with S1C33 Family; library fast compact. Allows advance evaluation using emulation library running Ideally suited applications making panels, including PDAs, electronic toys, electronic stationery.
HARDWARE CONFIGURATION
S1C33xxx
controller panel
S1C33000 Core
Graphic memory
Internal
interface
Extrnal
Extrnal
MEMORY REQUIREMENTS
Object related function (gpc33.lib) related function (gpcgui.o, gpcevent.o) 1-byte font (gpcfont1.o gpc33.lib) 2-byte font (gpcfont2.o gpc33.lib) Display driver (gpcdrv.o gpc33.lib) Code (ROM) bytes 4.2K bytes bytes 164K bytes bytes (RAM) bytes bytes bytes Stack bytes bytes
pop-up window used, (RAM) system takes about bytes.
S1C33 Family S5U1C330G1S Middleware
SOFTWARE CONFIGURATION
Application S5U1C330G1S library Hardware (LCD controller, panel etc.)
PRIMARY USER INTERFACE RESOURCES
Resorce Form window Pop-up window Text window Command button Check Radio button Description Standard window Used display alert information Displays text. Command execution button Square checked when selected Round button that selected from group buttons
PRIMARY GRAPHIC FUNCTIONS
Function gpcDrawPoint gpcDrawLine gpcDrawRect gpcFillRect gpcInvrertRect gpcDrawEllipse gpcFillEllipse gpcDrawCircle gpcFillCircle gpcDrawArc gpcDrawText gpcPutImage gpcGetImage Draws point. Draws line. Draws rectangle. Fills rectangle. Reverses displayed area. Draws ellipse. Fills ellipse. Draws circle. Fills circle. Draws arc. Outputs text. Outputs image. Captures image. Description
This middleware only available with (S1C33 Family). This specification change without notice.
PF1187-02
S1C33 Family S5U1C330P1S Middleware
writing recognition middleware
Handwritten character recognition middleware S1C33 Family Handwritten character recognition level supports "printed style writing" Handwritten character recognition level supports "simplified form writing"
FEATURES
Handwritten character recognition middleware S1C33 Family provided form linkable library. Useful handwritten character recognition both Japanese English. Handwritten character recognition level supports "printed style writing", allowing fast memoryefficient character recognition. Handwritten character recognition level supports "simplified form writing", providing higher recognition rate than level Suitable PDAs, personal organizers digital stationeries.
HARDWARE CONFIGURATION
S1C33xxx
converter channels S1C33000 Core Input port Touch panel
Built-in
16-bit timer
interface
External
External
REQUIRED RESOURCES
DMT33003 board made EHK, this middleware uses interrupt input port, channels converters, channel 16-bit timer.
channels converters used acquire coordinates character written touchpanel. 16-bit timer used interval time which acquire coordinates.
Memory requirements approx. 140KB Library (program) approx. 70KB Dictionary data Level recognition (English Japanese) approx. 200KB Dictionary data Level recognition (English) approx. 240KB Dictionary data Level recognition (Japanese) approx. 1500KB
S1C33 Family S5U1C330P1S Middleware
SOFTWARE CONFIGURATION
driver necessary acquire character stroke data must created user conformity with user's hardware configuration.
Application S5U1C330P1S library Handwritten character stroke data acquisition driver (created user suit user's hardware configuration) Hardware (Touch panel)
sample sources handwritten character stroke data acquisition driver DMT33003 board made public domain.
Japanese Handwritten character recognition results produced shift code displayed they are. English handwritten character recognition, recognition results shift code converted into ASCII code using ASCII code conversion functions. Character strings written laterally recognized using character extracting functions.
This middleware only available with (S1C33 Family). This specification change without notice.
PF1188-02
S1C33 Family S5U1C330H1S Middleware
Voice recognition phoneme model
Japanese speech recognition middleware S1C33 Family Real-time execution S1C33 chip Phoneme model supported FEATURES
Speech recognition middleware S1C33 Family provided form linkable library. speech recognition engine listening routines using converter included library. Speaking routines with converter implemented. Using Seiko Epson exclusive phoneme model recognition technology, about words recognized real-time. Capable selecting between kinds probability data phonemes according recognition rate memory used. Supports Japanese recognition. Voice recognition data created simply just writing words recognized text format. tools evaluating speech recognition engine provided. Evaluation boards provided. Suitable PDAs, digital stationeries digital toys.
HARDWARE CONFIGURATION
S1C33xxx
10-bit converter S1C33000 Core converter POWER Speaker
case speak
Built-in
16-bit timer
interface
External
External
MEMORY REQUIREMENTS SPEED
approx. bytes Library (Program) approx. bytes Recognition dictionary Four bytes vowel, bytes consonant Probability data phoneme approx. 200K bytes Probability data phoneme approx. 523K bytes Recognition speed 40MHz operation, recognition dictionary: words seconds (The dictionary configured with phonemes single entry such "Good morning" "Good afternoon.")
S1C33 Family S5U1C330H1S Middleware
SOFTWARE CONFIGURATION
S5U1C330H1S Library
Application S5U1C330H1S library Hardware converter, 16-bit timer
S5U1C330H1S Evaluation Tool This evaluation tool S5U1C330H1S recognition engine using sound board
Speech recognition evaluation tool
EPSON
Sound card
This middleware only available with (S1C33 Family). This specification change without notice.
PF1189-02
S1C33 Family S5U1C330S2S Middleware
SmartMedia middleware
SmartMedia middleware S1C33 Family Supports file system (compatible with MS-DOS Ver.6.x)
FEATURES
This middleware S1C33 Family, available linkable library form. Conforms SmartMedia specifications SSFDC Forum. file system driver enables MS-DOS Ver.6.x compatible file exchange. format driver SmartMedia also available. Ideally suited digital cameras, PDAs, electronic pocketbooks.
HARDWARE CONFIGURATION
S1C33xxx
S1C33000 Core interface Several ports SmartMedia card
External
External
REQUIRED RESOURCES
space: approx. bytes space: approx. bytes following ports used controlling SmartMedia Card Enable Address Latch Enable Command Latch Enable Write Protect Ready/Busy Write Protect Seal Card Detect
SUPPORTED MEMORY CARDS
SmartMedia card (4MB 64MB)
S1C33 Family S5U1C330S2S Middleware
SOFTWARE CONFIGURATION
SmartMedia Library
Application file system driver file system format driver File access driver SmartMedia control driver Hardware
allow modification SmartMedia control file access drivers (some part) suit customer hardware environment, source left partly open users.
File Access Driver, SmartMedia Control Driver Runs according SmartMedia (4MB 64MB). File System Device Driver (supports FAT12 FAT16) Permits MS-DOS Ver.6.x compatible file exchange character file names, with three extension characters). Support Japanese file names. standard ANSI-like (e.g., fopen() fred()). File System Format Driver This driver initializes file system make usable SmartMedia. This middleware only available with (S1C33 Family). This specification change without notice.
PF1263-01
S1C33 Family S5U1C330U1S Middleware
sample program
sample program S1C33 Family Supports bulk transfer interrupt transfer
FEATURES
Sample programs S1C33 Family, with source code. Includes mouse program using Interrupt transfer. Includes program-loader program using Bulk transfer. Also included device driver (Windows 98/2000 version) application program Bulk transfer. used develop equipment using Family.
HARDWARE CONFIGURATION
S1C33xxx
S1C33000 Core interface Several ports function controller
External
External
REQUIRED RESOURCES
space: space: port: approx. bytes approx. 0.5K bytes Mouse move Mouse move left, DMAREQ1 Mouse move down Mouse move right Mouse left button Mouse right button XINT DMAACK1 High-speed DMA:
S1C33 Family S5U1C330U1S Middleware
SOFTWARE CONFIGURATION
Windows application User's application Sample program S1C33, controller target devices Device driver driver host controller Personal computer
This program includes source code.
supported function controllers FLAC075 SPC7200. function controllers comply with USB1.1 specifications. S1C33's high-speed performs data transfers function controller's port interface highspeed data transfers. Includes Windows application driver head start software development target equipment. This middleware only available with (S1C33 Family). This specification change without notice.
PF1265-01
S1C33 Family S5U1C330G3S Middleware
G729, G723.1 real time codec middleware
G72x real time codec middleware S1C33 Family Real-time execution S1C33 chip Voice compression technologies G729, G723.1 supported FEATURES
G72x real time codec middleware S1C33 Family provided form linkable library. Uses voice compression technologies G729 Annex-A G723.1 Annex-A (decompression only) compress decompress voice data. following compression rates supported (based 8-kHz sampling): G729 8kbps G723.1 6.3kbps/5.3kbps Suitable voice memos, data banks with voice, with voice, digital stationery with voice digital toys with voice.
HARDWARE CONFIGURATION
S1C33xxx
10-bit converter S1C33000 Core
8-bit converter using 16-bit programmable timer 16-bit programmable timer interface
POWER
Speaker
Internal
External
External
MEMORY REQUIREMENTS SPEED
Memory Requirements (byte) G729 compression/decompression: G729 decompression only: G723.1 decompression only: Internal 7.5K 7.5K 7.3K External 4.7K 3.0K 2.5K 38.4K 20.0K 33.0K
Speed (CPU occupancy) G729 compression (50MHz): (measurement results when accessed with wait states) G729 decompression (40MHz): G723.1 decompression (40MHz):
S1C33 Family S5U1C330G3S Middleware
SOFTWARE CONFIGURATION
Application S5U1C330G3S library Hardware converter, converter, 16-bit timer
S5U1C330G3S Data Creation Tool This tool creates compressed voice data replay only. used with Windows95/NT4.0, higher versions. Flow (Example)
tape, etc.
file
EPSON
Using sound card sound editor (commercially available) create edit sound file Normalize tool Compression tool Conversion tool
Sound card
Compressed voice data
(assembly source)
G729 G723.1 require license fees. This middleware only available with (S1C33 Family). This specification change without notice.
PF1082-04
S1C33 Family Demonstration Evaluation Board
FEATURES
S5U1C33xxxDx evaluation board S1C33xxx. contains Flash memory RAM, 20MHz 32kHz oscillators. onboard Flash memory includes S5U1C330M2S debug monitor. provides debugging functions, such downloading program Flash memory, running, stepping, setting breaks, with S5U1C330MxD1 board db33 debugger demonstration boards support stand alone running program written Flash memory. S5U1C330A3D1, S5U1C330LxD1, S5U1C330C1D1 other expansion boards provide environment demonstration evaluating voice, graphic, comppact FLASH other middlewares. S5U1C33xxxD2 (S1C33xxx socket type) with S5U1C33xxxEx provide internal emulation function allowing evaluation development programs built-in models.
S1C33 FAMILY DEMO BOARD LIST
Input voltage supported Operating voltage S5U1C33209D1 S1C33209 input 3.3V operation S5U1C33L01D1 S1C33L01 input S5U1C33L
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